Repository: incubator-mynewt-core Updated Branches: refs/heads/nrf_cputime 34d901901 -> 244227b77 (forced update)
MYNEWT-683 SensorAPI: Add BNO055 driver - fix bno055_get_int_enable() was reading wrong enable values - fix indentation Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/repo Commit: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/commit/cebfd2e3 Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/tree/cebfd2e3 Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/diff/cebfd2e3 Branch: refs/heads/nrf_cputime Commit: cebfd2e3ee78466f712e50a40e3f3860981af0d9 Parents: e7934fa Author: Vipul Rahane <[email protected]> Authored: Thu Mar 23 17:22:50 2017 -0700 Committer: Vipul Rahane <[email protected]> Committed: Fri Mar 24 14:36:20 2017 -0700 ---------------------------------------------------------------------- .../sensors/bno055/include/bno055/bno055.h | 26 ++-- hw/drivers/sensors/bno055/src/bno055.c | 120 ++++++++++--------- 2 files changed, 74 insertions(+), 72 deletions(-) ---------------------------------------------------------------------- http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/cebfd2e3/hw/drivers/sensors/bno055/include/bno055/bno055.h ---------------------------------------------------------------------- diff --git a/hw/drivers/sensors/bno055/include/bno055/bno055.h b/hw/drivers/sensors/bno055/include/bno055/bno055.h index f04c2ae..c8bd5c6 100644 --- a/hw/drivers/sensors/bno055/include/bno055/bno055.h +++ b/hw/drivers/sensors/bno055/include/bno055/bno055.h @@ -104,14 +104,14 @@ extern "C" { #define BNO055_GYR_CFG_OPR_MODE_ADV_PWR_SAVE (0x4 << 5) /* Magnetometer config */ -#define BNO055_MAG_CFG_ODR_2HZ 0x0 -#define BNO055_MAG_CFG_ODR_6HZ 0x1 -#define BNO055_MAG_CFG_ODR_8HZ 0x2 -#define BNO055_MAG_CFG_ODR_10HZ 0x3 -#define BNO055_MAG_CFG_ODR_15HZ 0x4 -#define BNO055_MAG_CFG_ODR_20HZ 0x5 -#define BNO055_MAG_CFG_ODR_25HZ 0x6 -#define BNO055_MAG_CFG_ODR_30HZ 0x7 +#define BNO055_MAG_CFG_ODR_2HZ 0x0 +#define BNO055_MAG_CFG_ODR_6HZ 0x1 +#define BNO055_MAG_CFG_ODR_8HZ 0x2 +#define BNO055_MAG_CFG_ODR_10HZ 0x3 +#define BNO055_MAG_CFG_ODR_15HZ 0x4 +#define BNO055_MAG_CFG_ODR_20HZ 0x5 +#define BNO055_MAG_CFG_ODR_25HZ 0x6 +#define BNO055_MAG_CFG_ODR_30HZ 0x7 #define BNO055_MAG_CFG_OPR_MODE_LOWPWR (0x0 << 3) #define BNO055_MAG_CFG_OPR_MODE_REG (0x1 << 3) @@ -168,11 +168,11 @@ struct bno055 { }; struct bno055_rev_info { - uint8_t bri_accel_rev; - uint8_t bri_mag_rev; - uint8_t bri_gyro_rev; - uint8_t bri_bl_rev; - uint16_t bri_sw_rev; + uint8_t bri_accel_rev; + uint8_t bri_mag_rev; + uint8_t bri_gyro_rev; + uint8_t bri_bl_rev; + uint16_t bri_sw_rev; }; struct bno055_calib_info { http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/cebfd2e3/hw/drivers/sensors/bno055/src/bno055.c ---------------------------------------------------------------------- diff --git a/hw/drivers/sensors/bno055/src/bno055.c b/hw/drivers/sensors/bno055/src/bno055.c index 5f2993c..0e34987 100644 --- a/hw/drivers/sensors/bno055/src/bno055.c +++ b/hw/drivers/sensors/bno055/src/bno055.c @@ -1625,35 +1625,35 @@ bno055_get_int_duration(uint32_t intr, uint8_t *duration) mask = val = shift = 0; switch(intr) { - case BNO055_INT_GYR_HR_X_AXIS: - reg = BNO055_GYRO_DURN_X_ADDR; - break; - case BNO055_INT_GYR_HR_Y_AXIS: - reg = BNO055_GYRO_DURN_Y_ADDR; - break; - case BNO055_INT_GYR_HR_Z_AXIS: - reg = BNO055_GYRO_DURN_Z_ADDR; - break; - case BNO055_INT_ACC_HG: - reg = BNO055_ACCEL_HIGH_G_DURN_ADDR; - break; - case BNO055_INT_ACC_NM: - reg = BNO055_ACCEL_NO_MOTION_SET_ADDR; - mask = 0x3F; - shift = 1; - break; - case BNO055_INT_ACC_AM: - reg = BNO055_ACCEL_INTR_SETTINGS_ADDR; - mask = 0x3; - break; - case BNO055_INT_GYR_AM: - reg = BNO055_GYRO_INTR_SETTINGS_ADDR; - mask = 0xc; - shift = 2; - break; - default: - rc = SYS_EINVAL; - goto err; + case BNO055_INT_GYR_HR_X_AXIS: + reg = BNO055_GYRO_DURN_X_ADDR; + break; + case BNO055_INT_GYR_HR_Y_AXIS: + reg = BNO055_GYRO_DURN_Y_ADDR; + break; + case BNO055_INT_GYR_HR_Z_AXIS: + reg = BNO055_GYRO_DURN_Z_ADDR; + break; + case BNO055_INT_ACC_HG: + reg = BNO055_ACCEL_HIGH_G_DURN_ADDR; + break; + case BNO055_INT_ACC_NM: + reg = BNO055_ACCEL_NO_MOTION_SET_ADDR; + mask = 0x3F; + shift = 1; + break; + case BNO055_INT_ACC_AM: + reg = BNO055_ACCEL_INTR_SETTINGS_ADDR; + mask = 0x3; + break; + case BNO055_INT_GYR_AM: + reg = BNO055_GYRO_INTR_SETTINGS_ADDR; + mask = 0xc; + shift = 2; + break; + default: + rc = SYS_EINVAL; + goto err; } rc = bno055_read8(reg, &val); @@ -1689,35 +1689,35 @@ bno055_set_int_duration(uint32_t intr, uint8_t duration) val = mask = shift = 0; switch(intr) { - case BNO055_INT_GYR_HR_X_AXIS: - reg = BNO055_GYRO_DURN_X_ADDR; - break; - case BNO055_INT_GYR_HR_Y_AXIS: - reg = BNO055_GYRO_DURN_Y_ADDR; - break; - case BNO055_INT_GYR_HR_Z_AXIS: - reg = BNO055_GYRO_DURN_Z_ADDR; - break; - case BNO055_INT_ACC_HG: - reg = BNO055_ACCEL_HIGH_G_DURN_ADDR; - break; - case BNO055_INT_ACC_NM: - reg = BNO055_ACCEL_NO_MOTION_SET_ADDR; - mask = 0x3F; - shift = 1; - break; - case BNO055_INT_ACC_AM: - reg = BNO055_ACCEL_INTR_SETTINGS_ADDR; - mask = 0x3; - break; - case BNO055_INT_GYR_AM: - reg = BNO055_GYRO_INTR_SETTINGS_ADDR; - mask = 0x3; - shift = 2; - break; - default: - rc = SYS_EINVAL; - goto err; + case BNO055_INT_GYR_HR_X_AXIS: + reg = BNO055_GYRO_DURN_X_ADDR; + break; + case BNO055_INT_GYR_HR_Y_AXIS: + reg = BNO055_GYRO_DURN_Y_ADDR; + break; + case BNO055_INT_GYR_HR_Z_AXIS: + reg = BNO055_GYRO_DURN_Z_ADDR; + break; + case BNO055_INT_ACC_HG: + reg = BNO055_ACCEL_HIGH_G_DURN_ADDR; + break; + case BNO055_INT_ACC_NM: + reg = BNO055_ACCEL_NO_MOTION_SET_ADDR; + mask = 0x3F; + shift = 1; + break; + case BNO055_INT_ACC_AM: + reg = BNO055_ACCEL_INTR_SETTINGS_ADDR; + mask = 0x3; + break; + case BNO055_INT_GYR_AM: + reg = BNO055_GYRO_INTR_SETTINGS_ADDR; + mask = 0x3; + shift = 2; + break; + default: + rc = SYS_EINVAL; + goto err; } if (mask && duration > mask) { @@ -1877,7 +1877,7 @@ bno055_get_int_enable(uint8_t *intr) goto err; } - mask |= (val & BNO055_INT_EN_ACC_AM ? BNO055_INT_ACC_AM : 0); + mask = (val & BNO055_INT_EN_ACC_AM ? BNO055_INT_ACC_AM : 0); mask |= (val & BNO055_INT_EN_ACC_HG ? BNO055_INT_ACC_HG : 0); mask |= (val & BNO055_INT_EN_GYR_HR ? BNO055_INT_GYR_HR : 0); mask |= (val & BNO055_INT_EN_GYR_AM ? BNO055_INT_GYR_AM : 0); @@ -1892,6 +1892,8 @@ bno055_get_int_enable(uint8_t *intr) mask |= (val & BNO055_ACCEL_SMNM ? BNO055_INT_ACC_SM : BNO055_INT_ACC_NM); } + *intr = mask; + return 0; err: return rc;
