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commit 7d1b35b768b41398971d94aed97f5222b88f02d5
Author: Gregory Nutt <[email protected]>
AuthorDate: Sat Feb 29 18:05:21 2020 -0600

    boards/z20x/ez80/20x:  Updates
    
    boards/z80/ez80/z20x:  Add SPI chip selects for all available SPI definces.
---
 boards/z80/ez80/z20x/src/ez80_spi.c | 82 +++++++++++++++++++++++++++++++++----
 boards/z80/ez80/z20x/src/z20x.h     | 13 +++++-
 2 files changed, 87 insertions(+), 8 deletions(-)

diff --git a/boards/z80/ez80/z20x/src/ez80_spi.c 
b/boards/z80/ez80/z20x/src/ez80_spi.c
index 90d16cc..a77dd07 100644
--- a/boards/z80/ez80/z20x/src/ez80_spi.c
+++ b/boards/z80/ez80/z20x/src/ez80_spi.c
@@ -55,25 +55,46 @@
 
 void ez80_spidev_initialize(void)
 {
-#ifdef HAVE_MMCSD
+#if defined(HAVE_MMCSD) || defined(HAVE_XPT2046)
   uint8_t regval;
-
-  /* MMC/SD CS: Port PB2/nSS as output */
+  uint8_t pins;
+
+  /* SPI Devices on the z20x main board:
+   *
+   *   W25Q32JV CS: Port PB5 as output
+   *
+   * SPI Devices on LCD card:
+   *
+   *   MMC/SD CS: Port PB2/nSS as output
+   *   XPT2046 CS: PB1/T1_IN as output
+   *   SST25VF016 CS: Pulled high
+   */
+
+  pins    = 0;
+#ifdef HAVE_SPIFLASH
+  pins   |= EZ80_GPIOD5;
+#endif
+#ifdef HAVE_XPT2046
+  pins   |= EZ80_GPIOD1;
+#endif
+#ifdef HAVE_MMCSD
+  pins   |= EZ80_GPIOD2;
+#endif
 
   regval  = inp(EZ80_PB_DR);
-  regval |= EZ80_GPIOD2;
+  regval |= pins;
   outp(EZ80_PB_DR, regval);
 
   regval  = inp(EZ80_PB_ALT1);
-  regval &= ~EZ80_GPIOD2;
+  regval &= ~pins;
   outp(EZ80_PB_ALT1, regval);
 
   regval  = inp(EZ80_PB_ALT2);
-  regval &= ~EZ80_GPIOD2;
+  regval &= ~pins;
   outp(EZ80_PB_ALT2, regval);
 
   regval  = inp(EZ80_PB_DDR);
-  regval &= ~EZ80_GPIOD2;
+  regval &= ~pins;
   outp(EZ80_PB_DDR, regval);
 #endif
 }
@@ -104,6 +125,52 @@ void ez80_spidev_initialize(void)
 
 void ez80_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
 {
+#ifdef HAVE_SPIFLASH
+  if (devid == SPIDEV_FLASH(0))
+    {
+      uint8_t regval;
+
+      /* Set PB5 output */
+
+      regval  = inp(EZ80_PB_DR);
+
+      if (selected)
+        {
+          regval &= ~EZ80_GPIOD5;
+        }
+      else
+        {
+          regval |= EZ80_GPIOD5;
+        }
+
+      outp(EZ80_PB_DR, regval);
+      return;
+    }
+#endif
+
+#ifdef HAVE_XPT2046
+  if (devid == SPIDEV_TOUCHSCREEN(0))
+    {
+      uint8_t regval;
+
+      /* Set PB1/T1_IN output */
+
+      regval  = inp(EZ80_PB_DR);
+
+      if (selected)
+        {
+          regval &= ~EZ80_GPIOD1;
+        }
+      else
+        {
+          regval |= EZ80_GPIOD1;
+        }
+
+      outp(EZ80_PB_DR, regval);
+      return;
+    }
+#endif
+
 #ifdef HAVE_MMCSD
   if (devid == SPIDEV_MMCSD(0))
     {
@@ -123,6 +190,7 @@ void ez80_spiselect(FAR struct spi_dev_s *dev, uint32_t 
devid, bool selected)
         }
 
       outp(EZ80_PB_DR, regval);
+      return;
     }
 #endif
 }
diff --git a/boards/z80/ez80/z20x/src/z20x.h b/boards/z80/ez80/z20x/src/z20x.h
index 85161e85..51e389e 100644
--- a/boards/z80/ez80/z20x/src/z20x.h
+++ b/boards/z80/ez80/z20x/src/z20x.h
@@ -35,11 +35,22 @@
 
 /* Configuration */
 
-#define HAVE_MMCSD 1
+#define HAVE_SPIFLASH 1
+#define HAVE_MMCSD    1
+#define HAVE_XPT2046  1
+
+#if !defined(CONFIG_MTD_W25) || !defined(CONFIG_EZ80_SPI)
+#  undef HAVE_SPIFLASH
+#endif
+
 #if !defined(CONFIG_MMCSD_SPI) || !defined(CONFIG_EZ80_SPI)
 #  undef HAVE_MMCSD
 #endif
 
+#if !defined(CONFIG_INPUT_ADS7843E) || !defined(CONFIG_EZ80_SPI)
+#  undef HAVE_XPT2046
+#endif
+
 /* Helpers for accessing memory mapped registers */
 
 #define ez80_getreg8(a)   (*(volatile uint8_t *)(a))

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