davids5 opened a new pull request #1147:
URL: https://github.com/apache/incubator-nuttx/pull/1147
## Summary
1) 574b25 broke the internal DMA buffers usage that solved the following
problem: The DMA capable interface does not know the buffers extent. It
calculates it from size. The user may need to transfer less than a cacheline
bytes, but STILL have a DMA capable buffer. The user is therefore
forced to transfer more data then needed to "trick" the DMA capable
function. This is a wast of bus bandwidth and may not work will all devices.
The internal buffer, solve this issue.
2) Reduce clock sag while chip selected: The H7 tri-states the clock output
on SPI disable and unfortunately the Chip Select (CS) is active. So we keep
the device disabled for the minimum time, that meets the DMA setup sequence
criteria. If the clock line is not loaded, the may an issues, it the CLK line
is loaded at < 100K it could make the threshold of the device and add an extra
clock cycle.
## Impact
This restores the internal DMA buffers and documents the reasons for the
ordering of the code
to avoid chip select issues and future breakage.
## Testing
Using PX4
```
icm20649: transfer: 447774 events, 92658596us elapsed, 206.93us avg, min
176us max 252us 1.362us rms
icm20649: bad register: 0 events
icm20649: bad transfer: 0 events
icm20649: FIFO empty: 1 events
icm20649: FIFO overflow: 0 events
icm20649: FIFO reset: 1 events
icm20649: DRDY interval: 4925531 events, 120.66us avg, min 30us max 283us
31.929us rms
```
current master with Stiff pull down to visualize the timing
With PR and Stiff pull down to visualize the timing
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