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The following commit(s) were added to refs/heads/master by this push:
new 0e67a79b94 fix nxstyle
0e67a79b94 is described below
commit 0e67a79b94bcd1b9a4f27f88bc6f70a18b3dec01
Author: simbit18 <[email protected]>
AuthorDate: Fri May 3 14:59:54 2024 +0200
fix nxstyle
corrected comments in C89 style
---
arch/arm/src/imxrt/hardware/rt117x/imxrt117x_ccm.h | 8 ++++----
arch/arm/src/nrf52/hardware/nrf52_temp.h | 2 +-
arch/arm/src/nrf52/nrf52_ppi.h | 2 +-
arch/arm/src/nrf53/hardware/nrf53_temp.h | 2 +-
arch/arm/src/str71x/str71x_map.h | 2 +-
arch/arm/src/tiva/hardware/tiva_adc.h | 2 +-
arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h | 2 +-
arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c | 2 +-
include/nuttx/timers/pl031.h | 6 +++---
9 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/src/imxrt/hardware/rt117x/imxrt117x_ccm.h
b/arch/arm/src/imxrt/hardware/rt117x/imxrt117x_ccm.h
index 763c257ccb..f60b0095f5 100644
--- a/arch/arm/src/imxrt/hardware/rt117x/imxrt117x_ccm.h
+++ b/arch/arm/src/imxrt/hardware/rt117x/imxrt117x_ccm.h
@@ -754,7 +754,7 @@
#define CCM_CCGR_MU_A 20
#define CCM_CCGR_MU_B 21
#define CCM_CCGR_EDMA 22
-#define CCM_CCGR_DMA 22 //Note Added CTRL for
compatiblity
+#define CCM_CCGR_DMA 22 /* Note Added CTRL for
compatiblity */
#define CCM_CCGR_EDMA_LPSR 23
#define CCM_CCGR_ROMCP 24
#define CCM_CCGR_OCRAM 25
@@ -770,10 +770,10 @@
#define CCM_CCGR_IEE 35
#define CCM_CCGR_KEY_MANAGER 36
#define CCM_CCGR_PUF 36
-#define CCM_CCGR_OCOTP_CTRL 37 //Note Added CTRL for
compatiblity
+#define CCM_CCGR_OCOTP_CTRL 37 /* Note Added CTRL for
compatiblity */
#define CCM_CCGR_SNVS_HP 38
#define CCM_CCGR_SNVS 39
-#define CCM_CCGR_SNVS_LP 39 //Note Added CTRL for
compatiblity
+#define CCM_CCGR_SNVS_LP 39 /* Note Added CTRL for
compatiblity */
#define CCM_CCGR_CAAM 40
#define CCM_CCGR_JTAG_MUX 41
#define CCM_CCGR_CSTRACE 42
@@ -796,7 +796,7 @@
#define CCM_CCGR_ACMP2 59
#define CCM_CCGR_ACMP3 60
#define CCM_CCGR_ACMP4 61
-#define CCM_CCGR_PIT 62 // Renamed from PIT1 to PIT
for compatibility
+#define CCM_CCGR_PIT 62 /* Renamed from PIT1 to PIT
for compatibility */
#define CCM_CCGR_PIT2 63
#define CCM_CCGR_GPT1 64
#define CCM_CCGR_GPT2 65
diff --git a/arch/arm/src/nrf52/hardware/nrf52_temp.h
b/arch/arm/src/nrf52/hardware/nrf52_temp.h
index 850d70bdc9..439739ef67 100644
--- a/arch/arm/src/nrf52/hardware/nrf52_temp.h
+++ b/arch/arm/src/nrf52/hardware/nrf52_temp.h
@@ -95,4 +95,4 @@
#define NRF52_TEMP_INTENCLR_DATARDY (1 << 0) /* Read: Enabled */
-#endif // __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_TEMP_H
+#endif /* __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_TEMP_H */
diff --git a/arch/arm/src/nrf52/nrf52_ppi.h b/arch/arm/src/nrf52/nrf52_ppi.h
index f7b82b839b..f51d6e066d 100644
--- a/arch/arm/src/nrf52/nrf52_ppi.h
+++ b/arch/arm/src/nrf52/nrf52_ppi.h
@@ -171,4 +171,4 @@ void nrf52_ppi_grp_enable(uint8_t group, bool enable);
}
#endif
-#endif // __ARCH_ARM_SRC_NRF52_NRF52_PPI_H
+#endif /* __ARCH_ARM_SRC_NRF52_NRF52_PPI_H */
diff --git a/arch/arm/src/nrf53/hardware/nrf53_temp.h
b/arch/arm/src/nrf53/hardware/nrf53_temp.h
index 24f6e12ca1..2b0a1910cd 100644
--- a/arch/arm/src/nrf53/hardware/nrf53_temp.h
+++ b/arch/arm/src/nrf53/hardware/nrf53_temp.h
@@ -94,4 +94,4 @@
#define NRF53_TEMP_INTENCLR_DATARDY (1 << 0) /* Read: Enabled */
-#endif // __ARCH_ARM_SRC_NRF53_HARDWARE_NRF53_TEMP_H
+#endif /* __ARCH_ARM_SRC_NRF53_HARDWARE_NRF53_TEMP_H */
diff --git a/arch/arm/src/str71x/str71x_map.h b/arch/arm/src/str71x/str71x_map.h
index ad40e6f30a..597520a7b8 100644
--- a/arch/arm/src/str71x/str71x_map.h
+++ b/arch/arm/src/str71x/str71x_map.h
@@ -81,4 +81,4 @@
* Public Functions Prototypes
****************************************************************************/
-#endif // __ARCH_ARM_SRC_STR71X_STR71X_MAP_H
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_MAP_H */
diff --git a/arch/arm/src/tiva/hardware/tiva_adc.h
b/arch/arm/src/tiva/hardware/tiva_adc.h
index 78836b77a9..c1dc100534 100644
--- a/arch/arm/src/tiva/hardware/tiva_adc.h
+++ b/arch/arm/src/tiva/hardware/tiva_adc.h
@@ -943,4 +943,4 @@
#define ADC_CC_CS_PIOSC (0x001) /* PIOSC */
#define ADC_CC_CS_MOSC (0x002) /* MOSC */
-#endif // __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADC_H
+#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADC_H */
diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h
b/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h
index ead5615d20..5cc4d1d909 100644
--- a/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h
+++ b/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h
@@ -415,4 +415,4 @@
/* Flash Memory Protection Program Enable 0-15 (32-bit, bit-encoded) */
-#endif // __ARCH_ARM_SRC_TIVA_HARDWARE_TM4C_TM4C_FLASH_H
+#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TM4C_TM4C_FLASH_H */
diff --git a/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
b/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
index 0dd7b0dc2a..f33434a66c 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
@@ -109,7 +109,7 @@
#define DEFAULT_LISTEN_INTERVAL CONFIG_EXAMPLE_WIFI_LISTEN_INTERVAL
-#define RTC_CLK_CAL_FRACT 19 //!< Number of fractional bits in values
returned by rtc_clk_cal
+#define RTC_CLK_CAL_FRACT 19 /* Number of fractional bits in values returned
by rtc_clk_cal */
#define ets_timer _ETSTIMER_
diff --git a/include/nuttx/timers/pl031.h b/include/nuttx/timers/pl031.h
index 15a5290811..6f041d4a6e 100644
--- a/include/nuttx/timers/pl031.h
+++ b/include/nuttx/timers/pl031.h
@@ -18,8 +18,8 @@
*
****************************************************************************/
-#ifndef __INCLUDE_NUTTX_TIMER_PL031_H
-#define __INCLUDE_NUTTX_TIMER_PL031_H
+#ifndef __INCLUDE_NUTTX_TIMERS_PL031_H
+#define __INCLUDE_NUTTX_TIMERS_PL031_H
/****************************************************************************
* Public Function Prototypes
@@ -35,4 +35,4 @@
FAR struct rtc_lowerhalf_s *pl031_initialize(uintptr_t base, int irq);
-#endif //__INCLUDE_NUTTX_TIMER_PL031_H
+#endif /* __INCLUDE_NUTTX_TIMERS_PL031_H */
