lywind commented on issue #12687: URL: https://github.com/apache/nuttx/issues/12687#issuecomment-2230131835
> 1. Seems as expected, you need to confirm with vendor the behavior of **RAR(Reset all registers)** when lockstep is disabled, which is fixed on design phase. > 2. Zephyr does something similar, I think initializing the registers is necessary > [arch: arm: Rewrite Cortex-R reset vector function. zephyrproject-rtos/zephyr#20473](https://github.com/zephyrproject-rtos/zephyr/pull/20473) > > [ARM_ECM_0690721_Cortex_M33_DCLS.pdf](https://github.com/user-attachments/files/16233802/ARM_ECM_0690721_Cortex_M33_DCLS.pdf) > >  In fact, this is a Cortex-M7 MCU which is the ARM v7M-E architecture. And it does not have LOCKSTEP or RAR configurations. So I think it might not be the DCLS problem. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
