This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 06b3416384 arch/risc-v/src/common/riscv_initialstate.c: Fix stack 
pointer in coloration
06b3416384 is described below

commit 06b3416384f80a5992e1a79f54d8804af58ea9c2
Author: Jukka Laitinen <[email protected]>
AuthorDate: Tue Sep 24 13:13:59 2024 +0300

    arch/risc-v/src/common/riscv_initialstate.c: Fix stack pointer in coloration
    
    The logical CPU index should be retrieved with this_cpu(); the
    riscv_mhartid() returns the actual hart id of the SoC.
    
    For mpfs target for example, NuttX can run on a single HART, for example on 
mhartid 2, but there is still just one logical CPU for the NuttX.
    
    Signed-off-by: Jukka Laitinen <[email protected]>
---
 arch/risc-v/src/common/riscv_initialstate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/risc-v/src/common/riscv_initialstate.c 
b/arch/risc-v/src/common/riscv_initialstate.c
index 014ad62280..f787ed57b7 100644
--- a/arch/risc-v/src/common/riscv_initialstate.c
+++ b/arch/risc-v/src/common/riscv_initialstate.c
@@ -97,7 +97,7 @@ void up_initial_state(struct tcb_s *tcb)
 
   if (tcb->pid == IDLE_PROCESS_ID)
     {
-      tcb->stack_alloc_ptr = (void *)g_cpux_idlestack(riscv_mhartid());
+      tcb->stack_alloc_ptr = (void *)g_cpux_idlestack(this_cpu());
       tcb->stack_base_ptr  = tcb->stack_alloc_ptr;
       tcb->adj_stack_size  = SMP_STACK_SIZE;
 

Reply via email to