pussuw commented on code in PR #14596:
URL: https://github.com/apache/nuttx/pull/14596#discussion_r1825828752
##########
arch/arm/src/arm/arm_syscall.c:
##########
@@ -54,19 +54,23 @@
uint32_t *arm_syscall(uint32_t *regs)
{
- struct tcb_s *tcb = this_task();
+ struct tcb_s **running_task = &g_running_tasks[this_cpu()];
+ FAR struct tcb_s *tcb = this_task();
uint32_t cmd;
- int cpu;
/* Nested interrupts are not supported */
DEBUGASSERT(up_current_regs() == NULL);
+ if (*running_task != NULL)
+ {
+ (*running_task)->xcp.regs = regs;
Review Comment:
Understood.
I agree with changing the parameters for xxx_switchcontext to (rtcb, tcb),
which is exactly why I changed the parameters in RISC-V. It cannot be assumed
that the context switch routine only needs the integer register set.
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