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xiaoxiang pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
from 5cc5decd64 can/sja100: leave critical section properly
new 5300d77398 fix some arch miss update g_running_tasks
new 19b4911d7f arch: remove up_current_regs in common code
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Summary of changes:
arch/arm/src/arm/arm_sigdeliver.c | 2 +
arch/arm/src/arm/arm_syscall.c | 32 ++++++----------
arch/arm/src/armv6-m/arm_doirq.c | 16 ++++----
arch/arm/src/armv6-m/arm_svcall.c | 9 +++--
arch/arm/src/armv7-a/arm_sigdeliver.c | 2 +
arch/arm/src/armv7-a/arm_syscall.c | 23 +++++-------
arch/arm/src/armv7-m/arm_doirq.c | 16 ++++----
arch/arm/src/armv7-m/arm_svcall.c | 9 +++--
arch/arm/src/armv7-r/arm_sigdeliver.c | 2 +
arch/arm/src/armv7-r/arm_syscall.c | 25 +++++--------
arch/arm/src/armv8-m/arm_doirq.c | 16 ++++----
arch/arm/src/armv8-m/arm_svcall.c | 9 +++--
arch/arm/src/armv8-r/arm_sigdeliver.c | 2 +
arch/arm/src/armv8-r/arm_syscall.c | 24 +++++-------
arch/arm64/src/common/arm64_sigdeliver.c | 2 +
arch/arm64/src/common/arm64_syscall.c | 43 +++++++---------------
arch/avr/src/avr/avr_doirq.c | 7 ++++
arch/avr/src/avr/avr_switchcontext.c | 4 ++
arch/avr/src/avr32/avr_doirq.c | 7 ++++
arch/avr/src/avr32/avr_switchcontext.c | 4 ++
arch/ceva/src/common/ceva_doirq.c | 9 ++++-
arch/ceva/src/common/ceva_exit.c | 2 +
arch/hc/src/common/hc_doirq.c | 7 ++++
arch/hc/src/common/hc_switchcontext.c | 4 ++
arch/mips/src/mips32/mips_doirq.c | 7 ++++
arch/mips/src/pic32mx/pic32mx_decodeirq.c | 6 +++
arch/mips/src/pic32mx/pic32mx_exception.c | 6 +++
arch/mips/src/pic32mz/pic32mz_decodeirq.c | 7 ++++
arch/mips/src/pic32mz/pic32mz_exception.c | 6 +++
arch/misoc/src/lm32/lm32_doirq.c | 7 ++++
arch/misoc/src/minerva/minerva_doirq.c | 7 ++++
arch/or1k/src/common/or1k_doirq.c | 7 ++++
arch/or1k/src/common/or1k_switchcontext.c | 4 ++
arch/renesas/src/common/renesas_doirq.c | 7 ++++
arch/renesas/src/common/renesas_switchcontext.c | 4 ++
arch/risc-v/src/common/riscv_doirq.c | 4 +-
.../src/common/supervisor/riscv_perform_syscall.c | 4 +-
arch/sim/src/sim/sim_doirq.c | 7 ++++
arch/sim/src/sim/sim_switchcontext.c | 4 ++
arch/sparc/src/sparc_v8/sparc_v8_doirq.c | 7 ++++
arch/tricore/src/common/tricore_doirq.c | 7 ++++
arch/x86/src/common/x86_switchcontext.c | 4 ++
arch/x86/src/qemu/qemu_handlers.c | 10 ++++-
arch/x86_64/src/intel64/intel64_handlers.c | 15 +++++++-
arch/xtensa/src/common/xtensa_assert.c | 7 ++++
arch/xtensa/src/common/xtensa_irqdispatch.c | 20 +++++-----
arch/xtensa/src/common/xtensa_swint.c | 14 +++----
arch/z16/src/common/z16_doirq.c | 6 +++
arch/z16/src/common/z16_switchcontext.c | 4 ++
arch/z16/src/z16f/z16f_sysexec.c | 6 +++
arch/z80/src/common/z80_doirq.c | 7 ++++
arch/z80/src/common/z80_switchcontext.c | 4 ++
fs/procfs/fs_procfstcbinfo.c | 12 +++---
include/nuttx/sched.h | 8 ++++
libs/libc/gdbstub/lib_gdbstub.c | 2 +-
sched/init/nx_start.c | 2 +-
sched/misc/assert.c | 4 +-
sched/misc/coredump.c | 2 +-
sched/sched/sched.h | 6 ---
tools/gdb/thread.py | 2 +-
60 files changed, 341 insertions(+), 171 deletions(-)
