tmedicci commented on PR #14960:
URL: https://github.com/apache/nuttx/pull/14960#issuecomment-2504359017
> I'll trigger our internal CI. Please wait it to merge it.
We've found an issue with the backtrace dump feature applied to this PR. The
backtrace for the task's assertion does not work as expected with our test
application (please check below) when `CONFIG_ARCH_INTERRUPTSTACK=0`. In order
to test it, build the following application for ESP32, ESP32-S2 or ESP32-S3
(using `nsh`) with the following configs:
```
CONFIG_ARCH_INTERRUPTSTACK=0
CONFIG_INIT_STACKSIZE=3072
CONFIG_ESPAPPS_BACKTRACE=y
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SCHED_BACKTRACE=y
CONFIG_ALLSYMS=y
```
and then, run `backtrace task`:
```
nsh> backtrace task
The following instruction will cause an exception that will
trigxtensa_user_panic: User Exception: EXCCAUSE=001d task: backtrace
dump_assert_info: Current Version: NuttX 10.4.0 995a3fc00e Nov 27 2024
13:43:27 xtensa
dump_assert_info: Assertion failed user panic: at file: :0 task: backtrace
process: backtrace 0x400f0ae0
up_dump_register: PC: 400f0b08 PS: 00060730
up_dump_register: A0: 800e2e97 A1: 3ffe1400 A2: 00000000 A3:
3ffe0470
up_dump_register: A4: 3ffe0486 A5: 3ffaf450 A6: 00000000 A7:
00000000
up_dump_register: A8: 800f0b05 A9: 3ffe13d0 A10: 0000005a A11:
3ffafcd8
up_dump_register: A12: 00000059 A13: 3ffaf5a0 A14: 00000002 A15:
3ffafac8
up_dump_register: SAR: 00000018 CAUSE: 0000001d VADDR: 00000000
up_dump_register: LBEG: 4000c28c LEND: 4000c296 LCNT: 00000000
dump_stackinfo: User Stack:
dump_stackinfo: base: 0x3ffe0490
dump_stackinfo: size: 00004048
dump_stackinfo: sp: 0x3ffe1400
stack_dump: 0x3ffe13e0: 00000059 3ffaf5a0 00000002 3ffafac8 800e1de3
3ffe1420 400f0ae0 00000002
stack_dump: 0x3ffe1400: 3ffe0486 3ffaf450 00000000 00000000 00000000
3ffe1440 00000000 400f0ae0
stack_dump: 0x3ffe1420: 3ffe0470 3ffb1da4 00000000 3ffb0d2c 00000000
3ffe1460 00000000 00000000
stack_dump: 0x3ffe1440: 00000000 00000000 00000000 00000000 00000000
00000000 00000000 00000000
stack_dump: 0x3ffe1460: 00000000 00000000 00000000 00000000 00000000
00000000 00000000 00000000
xtensa_user_panic: User Exception: EXCCAUSE=001c task: backtrace
```
**The test application:**
```
/****************************************************************************
* Copyright 2021 Espressif Systems (Shanghai) CO LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include <arch/board/board.h>
#if defined(CONFIG_ARCH_CHIP_ESP32)
# include "esp32_irq.h"
# include "hardware/esp32_dport.h"
#elif defined(CONFIG_ARCH_CHIP_ESP32S2)
# include "esp32s2_irq.h"
# include "hardware/esp32s2_system.h"
#elif defined(CONFIG_ARCH_CHIP_ESP32S3)
# include "esp32s3_irq.h"
# include "hardware/esp32s3_system.h"
#elif defined (CONFIG_ARCH_CHIP_ESP32C3_GENERIC)
# include "espressif/esp_irq.h"
# include "riscv/interrupt.h"
# include "soc/system_reg.h"
#elif defined (CONFIG_ARCH_CHIP_ESP32C6) \
|| defined (CONFIG_ARCH_CHIP_ESP32H2)
# include "espressif/esp_irq.h"
# include "riscv/interrupt.h"
# include "soc/intpri_reg.h"
#else
# error "Unsupported Espressif SoC"
#endif
#if defined(CONFIG_ARCH_XTENSA)
# include "xtensa.h"
# include "xtensa_attr.h"
#else
# include "riscv_internal.h"
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if defined(CONFIG_ARCH_CHIP_ESP32)
# define SETUP_IRQ(cpu, periphid, priority, type) esp32_setup_irq(cpu,
periphid, priority, type)
#elif defined(CONFIG_ARCH_CHIP_ESP32S2)
# define SETUP_IRQ(cpu, periphid, priority, type)
esp32s2_setup_irq(periphid, priority, type)
#elif defined(CONFIG_ARCH_CHIP_ESP32S3)
# define SETUP_IRQ(cpu, periphid, priority, type) esp32s3_setup_irq(cpu,
periphid, priority, type)
#elif defined (CONFIG_ARCH_CHIP_ESP32C3_GENERIC) \
|| defined (CONFIG_ARCH_CHIP_ESP32C6) \
|| defined (CONFIG_ARCH_CHIP_ESP32H2)
# define SETUP_IRQ(cpu, periphid, priority, type) esp_setup_irq(periphid,
priority, type)
#else
# error "Unsupported Espressif SoC"
#endif
/* Software Interrupt */
#if defined(CONFIG_ARCH_CHIP_ESP32)
# define SWI_IRQ ESP32_IRQ_CPU_CPU3
# define SWI_PERIPH ESP32_PERIPH_CPU_CPU3
# define SWI_REG DPORT_CPU_INTR_FROM_CPU_3_REG
# define SWI_EN_BIT DPORT_CPU_INTR_FROM_CPU_3
# define SWI_TYPE ESP32_CPUINT_LEVEL
#elif defined(CONFIG_ARCH_CHIP_ESP32S2)
# define SWI_IRQ ESP32S2_IRQ_INT_FROM_CPU3
# define SWI_PERIPH ESP32S2_PERIPH_INT_FROM_CPU3
# define SWI_REG SYSTEM_CPU_INTR_FROM_CPU_3_REG
# define SWI_EN_BIT SYSTEM_CPU_INTR_FROM_CPU_3
# define SWI_TYPE ESP32S2_CPUINT_LEVEL
#elif defined(CONFIG_ARCH_CHIP_ESP32S3)
# define SWI_IRQ ESP32S3_IRQ_INT_FROM_CPU3
# define SWI_PERIPH ESP32S3_PERIPH_INT_FROM_CPU3
# define SWI_REG SYSTEM_CPU_INTR_FROM_CPU_3_REG
# define SWI_EN_BIT SYSTEM_CPU_INTR_FROM_CPU_3
# define SWI_TYPE ESP32S3_CPUINT_LEVEL
#elif defined(CONFIG_ARCH_CHIP_ESP32C3_GENERIC)
# define SWI_IRQ ESP_IRQ_FROM_CPU_INTR3
# define SWI_PERIPH FROM_CPU_INTR3_SOURCE
# define SWI_REG SYSTEM_CPU_INTR_FROM_CPU_3_REG
# define SWI_EN_BIT SYSTEM_CPU_INTR_FROM_CPU_3
# define SWI_TYPE INTR_TYPE_LEVEL
#elif defined(CONFIG_ARCH_CHIP_ESP32C6)
# define SWI_IRQ ESP_IRQ_FROM_CPU_INTR3
# define SWI_PERIPH FROM_CPU_INTR3_SOURCE
# define SWI_REG INTPRI_CPU_INTR_FROM_CPU_3_REG
# define SWI_EN_BIT INTPRI_CPU_INTR_FROM_CPU_3
# define SWI_TYPE INTR_TYPE_LEVEL
#elif defined(CONFIG_ARCH_CHIP_ESP32H2)
# define SWI_IRQ ESP_IRQ_FROM_CPU_INTR3
# define SWI_PERIPH FROM_CPU_INTR3_SOURCE
# define SWI_REG INTPRI_CPU_INTR_FROM_CPU_3_REG
# define SWI_EN_BIT INTPRI_CPU_INTR_FROM_CPU_3
# define SWI_TYPE INTR_TYPE_LEVEL
#else
# error "Unsupported Espressif SoC"
#endif
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static void usage(const char *progname);
static void assert_on_task(void);
static int assert_on_interrupt_handler(int irq, void *context, void *arg);
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
static void usage(const char *progname)
{
printf("Usage: %s <test_type>\n", progname);
printf(" test_type:\n");
printf(" task - Assert on task\n");
printf(" irq - Assert on interrupt handler\n");
}
static void assert_on_task(void)
{
int *p = NULL;
printf("The following instruction will cause an exception that will "
"trigger a task backtrace dump\n");
*p = 0;
}
static int assert_on_interrupt_handler(int irq, void *context, void *arg)
{
int *p = NULL;
modifyreg32(SWI_REG, SWI_EN_BIT, 0);
*p = 0;
return 0;
}
static void trigger_irq(void)
{
/* Trigger the interrupt */
modifyreg32(SWI_REG, 0, SWI_EN_BIT);
}
/****************************************************************************
* Public Functions
****************************************************************************/
int main(int argc, char *argv[])
{
if (argc != 2)
{
usage(argv[0]);
return EXIT_FAILURE;
}
if (strcmp(argv[1], "task") == 0)
{
assert_on_task();
}
else if (strcmp(argv[1], "irq") == 0)
{
int priority = 1; /* Set appropriate priority */
/* Setup the interrupt */
int ret = SETUP_IRQ(0, SWI_PERIPH, priority, SWI_TYPE);
if (ret < 0)
{
printf("Failed to setup IRQ: %d\n", ret);
return EXIT_FAILURE;
}
/* Attach the interrupt handler */
irq_attach(SWI_IRQ, assert_on_interrupt_handler, NULL);
/* Enable the interrupt */
up_enable_irq(SWI_IRQ);
/* Trigger the interrupt */
trigger_irq();
}
else
{
usage(argv[0]);
return EXIT_FAILURE;
}
return EXIT_SUCCESS;
}
```
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