pussuw commented on code in PR #15081: URL: https://github.com/apache/nuttx/pull/15081#discussion_r1877681293
########## arch/risc-v/include/irq.h: ########## @@ -703,6 +704,16 @@ irqstate_t up_irq_enable(void); int up_cpu_index(void) noinstrument_function; #endif /* CONFIG_ARCH_HAVE_MULTICPU */ +/**************************************************************************** + * Schedule acceleration macros + ****************************************************************************/ + +#ifdef CONFIG_RISCV_PERCPU_SCRATCH +#define up_current_regs() (this_task()->xcp.regs) +#define up_this_task() (((riscv_percpu_t *)READ_CSR(CSR_SCRATCH))->tcb) Review Comment: Another option would be the way you did it originally and simply agree that tcb must be the first element in the percpu structure. This is not unheard of. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
