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xiaoxiang pushed a commit to branch master
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The following commit(s) were added to refs/heads/master by this push:
new 3f3e6dd9b8 arch/arm/stm32/: Added enable/disable to timer low level
ops.
3f3e6dd9b8 is described below
commit 3f3e6dd9b82ccca71fb32a0bbfac877a6c677727
Author: Daniel P. Carvalho <[email protected]>
AuthorDate: Fri Jan 3 09:57:21 2025 -0300
arch/arm/stm32/: Added enable/disable to timer low level ops.
---
arch/arm/src/stm32/stm32_tim.c | 2 ++
arch/arm/src/stm32/stm32_tim.h | 4 ++++
arch/arm/src/stm32f0l0g0/stm32_tim.c | 9 +++++++++
arch/arm/src/stm32f0l0g0/stm32_tim.h | 4 ++++
arch/arm/src/stm32f7/stm32_tim.c | 2 ++
arch/arm/src/stm32f7/stm32_tim.h | 4 ++++
arch/arm/src/stm32h7/stm32_tim.c | 9 +++++++++
arch/arm/src/stm32h7/stm32_tim.h | 4 ++++
arch/arm/src/stm32l5/stm32l5_tim.c | 2 ++
arch/arm/src/stm32l5/stm32l5_tim.h | 4 ++++
arch/arm/src/stm32u5/stm32_tim.c | 2 ++
arch/arm/src/stm32u5/stm32_tim.h | 4 ++++
arch/arm/src/stm32wl5/stm32wl5_tim.c | 2 ++
arch/arm/src/stm32wl5/stm32wl5_tim.h | 4 ++++
14 files changed, 56 insertions(+)
diff --git a/arch/arm/src/stm32/stm32_tim.c b/arch/arm/src/stm32/stm32_tim.c
index 31ddf810c5..7f3e264270 100644
--- a/arch/arm/src/stm32/stm32_tim.c
+++ b/arch/arm/src/stm32/stm32_tim.c
@@ -360,6 +360,8 @@ static int stm32_tim_checkint(struct stm32_tim_dev_s *dev,
int source);
static const struct stm32_tim_ops_s stm32_tim_ops =
{
+ .enable = stm32_tim_enable,
+ .disable = stm32_tim_disable,
.setmode = stm32_tim_setmode,
.setclock = stm32_tim_setclock,
.setperiod = stm32_tim_setperiod,
diff --git a/arch/arm/src/stm32/stm32_tim.h b/arch/arm/src/stm32/stm32_tim.h
index 1916a34399..6e01e6693d 100644
--- a/arch/arm/src/stm32/stm32_tim.h
+++ b/arch/arm/src/stm32/stm32_tim.h
@@ -54,6 +54,8 @@
#define STM32_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
#define STM32_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
#define STM32_TIM_CHECKINT(d,s) ((d)->ops->checkint(d,s))
+#define STM32_TIM_ENABLE(d) ((d)->ops->enable(d))
+#define STM32_TIM_DISABLE(d) ((d)->ops->disable(d))
/****************************************************************************
* Public Types
@@ -153,6 +155,8 @@ struct stm32_tim_ops_s
{
/* Basic Timers */
+ void (*enable)(struct stm32_tim_dev_s *dev);
+ void (*disable)(struct stm32_tim_dev_s *dev);
int (*setmode)(struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode);
int (*setclock)(struct stm32_tim_dev_s *dev, uint32_t freq);
void (*setperiod)(struct stm32_tim_dev_s *dev, uint32_t period);
diff --git a/arch/arm/src/stm32f0l0g0/stm32_tim.c
b/arch/arm/src/stm32f0l0g0/stm32_tim.c
index ab2f5633ab..4b79d565f9 100644
--- a/arch/arm/src/stm32f0l0g0/stm32_tim.c
+++ b/arch/arm/src/stm32f0l0g0/stm32_tim.c
@@ -266,6 +266,13 @@ struct stm32_tim_priv_s
* Private Function prototypes
****************************************************************************/
+/* Timer helpers */
+
+static void stm32_tim_reload_counter(struct stm32_tim_dev_s *dev);
+static void stm32_tim_enable(struct stm32_tim_dev_s *dev);
+static void stm32_tim_disable(struct stm32_tim_dev_s *dev);
+static void stm32_tim_reset(struct stm32_tim_dev_s *dev);
+
/* Timer methods */
static int stm32_tim_setmode(struct stm32_tim_dev_s *dev,
@@ -298,6 +305,8 @@ static void stm32_tim_ackint(struct stm32_tim_dev_s *dev,
int source);
static const struct stm32_tim_ops_s stm32_tim_ops =
{
+ .enable = &stm32_tim_enable,
+ .disable = &stm32_tim_disable,
.setmode = &stm32_tim_setmode,
.setclock = &stm32_tim_setclock,
.getclock = &stm32_tim_getclock,
diff --git a/arch/arm/src/stm32f0l0g0/stm32_tim.h
b/arch/arm/src/stm32f0l0g0/stm32_tim.h
index a5d99347ce..967abca2a2 100644
--- a/arch/arm/src/stm32f0l0g0/stm32_tim.h
+++ b/arch/arm/src/stm32f0l0g0/stm32_tim.h
@@ -65,6 +65,8 @@
#define STM32_TIM_ENABLEINT(d,s) ((d)->ops->enableint(d,s))
#define STM32_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
#define STM32_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
+#define STM32_TIM_ENABLE(d) ((d)->ops->enable(d))
+#define STM32_TIM_DISABLE(d) ((d)->ops->disable(d))
/****************************************************************************
* Public Types
@@ -160,6 +162,8 @@ struct stm32_tim_ops_s
{
/* Basic Timers */
+ void (*enable)(struct stm32_tim_dev_s *dev);
+ void (*disable)(struct stm32_tim_dev_s *dev);
int (*setmode)(struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode);
int (*setclock)(struct stm32_tim_dev_s *dev, uint32_t freq);
uint32_t (*getclock)(struct stm32_tim_dev_s *dev);
diff --git a/arch/arm/src/stm32f7/stm32_tim.c b/arch/arm/src/stm32f7/stm32_tim.c
index 5e4724a150..524e9d83f4 100644
--- a/arch/arm/src/stm32f7/stm32_tim.c
+++ b/arch/arm/src/stm32f7/stm32_tim.c
@@ -1222,6 +1222,8 @@ static int stm32_tim_getcapture(struct stm32_tim_dev_s
*dev,
struct stm32_tim_ops_s stm32_tim_ops =
{
+ .enable = stm32_tim_enable,
+ .disable = stm32_tim_disable,
.setmode = stm32_tim_setmode,
.setclock = stm32_tim_setclock,
.setperiod = stm32_tim_setperiod,
diff --git a/arch/arm/src/stm32f7/stm32_tim.h b/arch/arm/src/stm32f7/stm32_tim.h
index d4dc454ea5..e09b9b569b 100644
--- a/arch/arm/src/stm32f7/stm32_tim.h
+++ b/arch/arm/src/stm32f7/stm32_tim.h
@@ -52,6 +52,8 @@
#define STM32_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
#define STM32_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
#define STM32_TIM_CHECKINT(d,s) ((d)->ops->checkint(d,s))
+#define STM32_TIM_ENABLE(d) ((d)->ops->enable(d))
+#define STM32_TIM_DISABLE(d) ((d)->ops->disable(d))
/****************************************************************************
* Public Types
@@ -149,6 +151,8 @@ struct stm32_tim_ops_s
{
/* Basic Timers */
+ void (*enable)(struct stm32_tim_dev_s *dev);
+ void (*disable)(struct stm32_tim_dev_s *dev);
int (*setmode)(struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode);
int (*setclock)(struct stm32_tim_dev_s *dev, uint32_t freq);
void (*setperiod)(struct stm32_tim_dev_s *dev, uint32_t period);
diff --git a/arch/arm/src/stm32h7/stm32_tim.c b/arch/arm/src/stm32h7/stm32_tim.c
index 76c499a61e..6ef544ba9a 100644
--- a/arch/arm/src/stm32h7/stm32_tim.c
+++ b/arch/arm/src/stm32h7/stm32_tim.c
@@ -251,6 +251,13 @@ struct stm32_tim_priv_s
* Private Function prototypes
****************************************************************************/
+/* Timer helpers */
+
+static void stm32_tim_reload_counter(struct stm32_tim_dev_s *dev);
+static void stm32_tim_enable(struct stm32_tim_dev_s *dev);
+static void stm32_tim_disable(struct stm32_tim_dev_s *dev);
+static void stm32_tim_reset(struct stm32_tim_dev_s *dev);
+
/* Timer methods */
static int stm32_tim_setmode(struct stm32_tim_dev_s *dev,
@@ -287,6 +294,8 @@ static int stm32_tim_checkint(struct stm32_tim_dev_s
*dev,
static const struct stm32_tim_ops_s stm32_tim_ops =
{
+ .enable = &stm32_tim_enable,
+ .disable = &stm32_tim_disable,
.setmode = &stm32_tim_setmode,
.setclock = &stm32_tim_setclock,
.setperiod = &stm32_tim_setperiod,
diff --git a/arch/arm/src/stm32h7/stm32_tim.h b/arch/arm/src/stm32h7/stm32_tim.h
index 38fbd04f7a..245386f9f0 100644
--- a/arch/arm/src/stm32h7/stm32_tim.h
+++ b/arch/arm/src/stm32h7/stm32_tim.h
@@ -52,6 +52,8 @@
#define STM32_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
#define STM32_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
#define STM32_TIM_CHECKINT(d,s) ((d)->ops->checkint(d,s))
+#define STM32_TIM_ENABLE(d) ((d)->ops->enable(d))
+#define STM32_TIM_DISABLE(d) ((d)->ops->disable(d))
/****************************************************************************
* Public Types
@@ -151,6 +153,8 @@ struct stm32_tim_ops_s
{
/* Basic Timers */
+ void (*enable)(struct stm32_tim_dev_s *dev);
+ void (*disable)(struct stm32_tim_dev_s *dev);
int (*setmode)(struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode);
int (*setclock)(struct stm32_tim_dev_s *dev, uint32_t freq);
void (*setperiod)(struct stm32_tim_dev_s *dev, uint32_t period);
diff --git a/arch/arm/src/stm32l5/stm32l5_tim.c
b/arch/arm/src/stm32l5/stm32l5_tim.c
index 1de30f9914..4e88e07e82 100644
--- a/arch/arm/src/stm32l5/stm32l5_tim.c
+++ b/arch/arm/src/stm32l5/stm32l5_tim.c
@@ -283,6 +283,8 @@ static int stm32l5_tim_checkint(struct stm32l5_tim_dev_s
*dev,
static const struct stm32l5_tim_ops_s stm32l5_tim_ops =
{
+ .enable = stm32l5_tim_enable,
+ .disable = stm32l5_tim_disable,
.setmode = stm32l5_tim_setmode,
.setclock = stm32l5_tim_setclock,
.getclock = stm32l5_tim_getclock,
diff --git a/arch/arm/src/stm32l5/stm32l5_tim.h
b/arch/arm/src/stm32l5/stm32l5_tim.h
index 903bb5cd80..f114ff9c61 100644
--- a/arch/arm/src/stm32l5/stm32l5_tim.h
+++ b/arch/arm/src/stm32l5/stm32l5_tim.h
@@ -52,6 +52,8 @@
#define STM32L5_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
#define STM32L5_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
#define STM32L5_TIM_CHECKINT(d,s) ((d)->ops->checkint(d,s))
+#define STM32_TIM_ENABLE(d) ((d)->ops->enable(d))
+#define STM32_TIM_DISABLE(d) ((d)->ops->disable(d))
/****************************************************************************
* Public Types
@@ -149,6 +151,8 @@ struct stm32l5_tim_ops_s
{
/* Basic Timers */
+ void (*enable)(struct stm32l5_tim_dev_s *dev);
+ void (*disable)(struct stm32l5_tim_dev_s *dev);
int (*setmode)(struct stm32l5_tim_dev_s *dev,
enum stm32l5_tim_mode_e mode);
int (*setclock)(struct stm32l5_tim_dev_s *dev, uint32_t freq);
diff --git a/arch/arm/src/stm32u5/stm32_tim.c b/arch/arm/src/stm32u5/stm32_tim.c
index 8f79b2aeb5..906230515f 100644
--- a/arch/arm/src/stm32u5/stm32_tim.c
+++ b/arch/arm/src/stm32u5/stm32_tim.c
@@ -283,6 +283,8 @@ static int stm32_tim_checkint(struct stm32_tim_dev_s *dev,
static const struct stm32_tim_ops_s stm32_tim_ops =
{
+ .enable = stm32_tim_enable,
+ .disable = stm32_tim_disable,
.setmode = stm32_tim_setmode,
.setclock = stm32_tim_setclock,
.getclock = stm32_tim_getclock,
diff --git a/arch/arm/src/stm32u5/stm32_tim.h b/arch/arm/src/stm32u5/stm32_tim.h
index ea82cbae0d..e043e98f0e 100644
--- a/arch/arm/src/stm32u5/stm32_tim.h
+++ b/arch/arm/src/stm32u5/stm32_tim.h
@@ -52,6 +52,8 @@
#define STM32U5_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
#define STM32U5_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
#define STM32U5_TIM_CHECKINT(d,s) ((d)->ops->checkint(d,s))
+#define STM32_TIM_ENABLE(d) ((d)->ops->enable(d))
+#define STM32_TIM_DISABLE(d) ((d)->ops->disable(d))
/****************************************************************************
* Public Types
@@ -143,6 +145,8 @@ struct stm32_tim_ops_s
{
/* Basic Timers */
+ void (*enable)(struct stm32_tim_dev_s *dev);
+ void (*disable)(struct stm32_tim_dev_s *dev);
int (*setmode)(struct stm32_tim_dev_s *dev,
enum stm32_tim_mode_e mode);
int (*setclock)(struct stm32_tim_dev_s *dev, uint32_t freq);
diff --git a/arch/arm/src/stm32wl5/stm32wl5_tim.c
b/arch/arm/src/stm32wl5/stm32wl5_tim.c
index 1657b24cf4..8a2ff45d86 100644
--- a/arch/arm/src/stm32wl5/stm32wl5_tim.c
+++ b/arch/arm/src/stm32wl5/stm32wl5_tim.c
@@ -285,6 +285,8 @@ static int stm32wl5_tim_checkint(struct stm32wl5_tim_dev_s
*dev,
static const struct stm32wl5_tim_ops_s stm32wl5_tim_ops =
{
+ .enable = stm32wl5_tim_enable,
+ .disable = stm32wl5_tim_disable,
.setmode = stm32wl5_tim_setmode,
.setclock = stm32wl5_tim_setclock,
.getclock = stm32wl5_tim_getclock,
diff --git a/arch/arm/src/stm32wl5/stm32wl5_tim.h
b/arch/arm/src/stm32wl5/stm32wl5_tim.h
index 3d7161c3b6..9826600b87 100644
--- a/arch/arm/src/stm32wl5/stm32wl5_tim.h
+++ b/arch/arm/src/stm32wl5/stm32wl5_tim.h
@@ -52,6 +52,8 @@
#define STM32WL5_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
#define STM32WL5_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
#define STM32WL5_TIM_CHECKINT(d,s) ((d)->ops->checkint(d,s))
+#define STM32_TIM_ENABLE(d) ((d)->ops->enable(d))
+#define STM32_TIM_DISABLE(d) ((d)->ops->disable(d))
/****************************************************************************
* Public Types
@@ -141,6 +143,8 @@ struct stm32wl5_tim_ops_s
{
/* Basic Timers */
+ void (*enable)(struct stm32wl5_tim_dev_s *dev);
+ void (*disable)(struct stm32wl5_tim_dev_s *dev);
int (*setmode)(struct stm32wl5_tim_dev_s *dev,
enum stm32wl5_tim_mode_e mode);
int (*setclock)(struct stm32wl5_tim_dev_s *dev, uint32_t freq);
