xiaoxiang781216 commented on code in PR #15522:
URL: https://github.com/apache/nuttx/pull/15522#discussion_r1914140351
##########
sched/misc/assert.c:
##########
@@ -836,10 +834,9 @@ void _assert(FAR const char *filename, int linenum,
reset_board(); /* Should not return. */
}
- flags = 0; /* suppress GCC warning */
if (os_ready)
{
- flags = spin_lock_irqsave(&g_assert_lock);
+ flags = enter_critical_section();
Review Comment:
> > Where do you get this conclusion? Each cpu has dedicated L1 data cache,
flusing main cpu doesn't flush the local cache on other cpu at all.
>
> L1 cache will have bus snooping monitoring, r/w will trigger flush,
otherwise the cache consistency cannot be guaranteed
Ok.
>
> > why do you think that holding csec will save the register to xcp->regs?
only two cases, thread will save the context to xcp->regs:
> >
> > 1. thread isn't running
> > 2. thread is executing the interrupt/syscall handler
> >
> > holding csec may happen in the normal thread context, how the context
save into xcp-.regs in this case? BTW, main cpu hold the critical section,
doesn't mean other cpu will try to hold the critical sction too.
>
> As long as any interrupt occurs, it will be saved in xcp->regs
but the interrupt mayn't happen at all. we need a reliable method to ensure
it always happen.
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: [email protected]
For queries about this service, please contact Infrastructure at:
[email protected]
