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The following commit(s) were added to refs/heads/master by this push:
new c6f4310331 arch/arm64/imx9: Guard EL3-only features when booting at EL1
c6f4310331 is described below
commit c6f431033138873fe911e6f844767efaecd4778a
Author: Theodore Karatapanis <tkaratapa...@census-labs.com>
AuthorDate: Mon May 26 22:09:17 2025 +0300
arch/arm64/imx9: Guard EL3-only features when booting at EL1
Boards that run the i.MX9 bootloader at EL1 must not touch EL3-only
configuration. Add Kconfig guards so that:
* DDR training (IMX9_DDR_TRAINING)
* FIQ decode support (ARM64_DECODEFIQ)
are selected only when ARCH_ARM64_EXCEPTION_LEVEL == 3.
Code in arm64_chip_boot() is also guarded with ARCH_ARM64_EXCEPTION_LEVEL
== 3
Signed-off-by: Theodore Karatapanis <tkaratapa...@census-labs.com>
---
arch/arm64/src/imx9/Kconfig | 6 +++---
arch/arm64/src/imx9/imx9_boot.c | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/src/imx9/Kconfig b/arch/arm64/src/imx9/Kconfig
index 1a663b96cf..ee0dd1627f 100644
--- a/arch/arm64/src/imx9/Kconfig
+++ b/arch/arm64/src/imx9/Kconfig
@@ -69,12 +69,12 @@ config IMX9_HAVE_ATF_FIRMWARE
config IMX9_BOOTLOADER
bool "Bootloader"
- select ARM64_DECODEFIQ
- select IMX9_DDR_TRAINING
+ select ARM64_DECODEFIQ if ARCH_ARM64_EXCEPTION_LEVEL = 3
+ select IMX9_DDR_TRAINING if ARCH_ARM64_EXCEPTION_LEVEL = 3
default n
---help---
Configure NuttX as the bootloader. NuttX will be compiled
- into OCRAM. It will run in EL3 secure state.
+ into OCRAM if we are in EL3.
config BOOTLOADER_SYS_CLOCK
int "Bootloader system clock for timer"
diff --git a/arch/arm64/src/imx9/imx9_boot.c b/arch/arm64/src/imx9/imx9_boot.c
index f0ed552d8c..9e9865302b 100644
--- a/arch/arm64/src/imx9/imx9_boot.c
+++ b/arch/arm64/src/imx9/imx9_boot.c
@@ -126,7 +126,7 @@ void arm64_el_init(void)
void arm64_chip_boot(void)
{
-#ifdef CONFIG_IMX9_BOOTLOADER
+#if defined(CONFIG_IMX9_BOOTLOADER) && CONFIG_ARCH_ARM64_EXCEPTION_LEVEL == 3
imx9_mix_powerup();
/* Before DDR init we need to initialize clocks and trdc */
