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The following commit(s) were added to refs/heads/master by this push:
new b0342c87ee arch/arm/src/samv7/sam_serial_spi.c: set correct SPI mode
during init
b0342c87ee is described below
commit b0342c87eeca5d00204f11d2141c0bf4cb93ead9
Author: Michal Lenc <michall...@seznam.cz>
AuthorDate: Mon Jun 2 09:07:43 2025 +0200
arch/arm/src/samv7/sam_serial_spi.c: set correct SPI mode during init
Bitfield CPHA has to be set to run SPI in mode 0. This is a default mode,
therefore it should be set during the peripheral initialization.
Signed-off-by: Michal Lenc <michall...@seznam.cz>
---
arch/arm/src/samv7/sam_serial_spi.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/src/samv7/sam_serial_spi.c
b/arch/arm/src/samv7/sam_serial_spi.c
index 5b24162618..b6ec15f834 100644
--- a/arch/arm/src/samv7/sam_serial_spi.c
+++ b/arch/arm/src/samv7/sam_serial_spi.c
@@ -818,9 +818,10 @@ struct spi_dev_s *sam_serial_spi_initialize(int port)
leave_critical_section(flags);
- /* Configure mode register. */
+ /* Configure mode register. Set master mode, 8 bits and SPI Mode 0 */
- regval = UART_MR_MODE_SPIMSTR | UART_MR_CLKO | UART_MR_CHRL_8BITS;
+ regval = UART_MR_MODE_SPIMSTR | UART_MR_CLKO | UART_MR_CHRL_8BITS |
+ UART_MR_CPHA;
serial_putreg(priv, SAM_UART_MR_OFFSET, regval);
/* Enable receiver & transmitter */
