hartmannathan commented on code in PR #16809: URL: https://github.com/apache/nuttx/pull/16809#discussion_r2257395268
########## arch/arm/src/stm32h7/stm32_capture.h: ########## @@ -0,0 +1,240 @@ +/**************************************************************************** + * arch/arm/src/stm32h7/stm32_capture.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32H7_STM32_CAPTURE_H +#define __ARCH_ARM_SRC_STM32H7_STM32_CAPTURE_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include "chip.h" +#include <arch/board/board.h> +#include "hardware/stm32_tim.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Helpers ******************************************************************/ + +#define STM32_CAP_SETSMC(d,cfg) ((d)->ops->setsmc(d,cfg)) +#define STM32_CAP_SETCLOCK(d,clk,max) ((d)->ops->setclock(d,clk,max)) +#define STM32_CAP_SETCHANNEL(d,ch,cfg) ((d)->ops->setchannel(d,ch,cfg)) +#define STM32_CAP_GETCAPTURE(d,ch) ((d)->ops->getcapture(d,ch)) +#define STM32_CAP_SETISR(d,hnd,arg) ((d)->ops->setisr(d,hnd,arg)) +#define STM32_CAP_ENABLEINT(d,s,on) ((d)->ops->enableint(d,s,on)) +#define STM32_CAP_ACKFLAGS(d,f) ((d)->ops->ackflags(d,f)) +#define STM32_CAP_GETFLAGS(d) ((d)->ops->getflags(d)) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/* Capture Device Structure */ + +struct stm32_cap_dev_s +{ + struct stm32_cap_ops_s *ops; +}; + +/* Capture input EDGE sources */ + +typedef enum +{ + /* Mapped */ + + STM32_CAP_MAPPED_MASK = (GTIM_CCMR1_CC1S_MASK), + STM32_CAP_MAPPED_TI1 = (GTIM_CCMR_CCS_CCIN1), + STM32_CAP_MAPPED_TI2 = (GTIM_CCMR_CCS_CCIN2), + +/* TODO STM32_CAP_MAPPED_TRC = (GTIM_CCMR_CCS_CCINTRC), */ + + /* Event prescaler */ + + STM32_CAP_INPSC_MASK = (GTIM_CCMR1_IC1PSC_MASK), + STM32_CAP_INPSC_NO = (0 << GTIM_CCMR1_IC1PSC_SHIFT), + STM32_CAP_INPSC_2EVENTS = (1 << GTIM_CCMR1_IC1PSC_SHIFT), + STM32_CAP_INPSC_4EVENTS = (2 << GTIM_CCMR1_IC1PSC_SHIFT), + STM32_CAP_INPSC_8EVENTS = (3 << GTIM_CCMR1_IC1PSC_SHIFT), + + /* Event prescaler */ + + STM32_CAP_FILTER_MASK = (GTIM_CCMR1_IC1F_MASK), + STM32_CAP_FILTER_NO = (0 << GTIM_CCMR1_IC1F_SHIFT), + + /* Internal clock with N time to confirm event */ + + STM32_CAP_FILTER_INT_N2 = (1 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_INT_N4 = (2 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_INT_N8 = (3 << GTIM_CCMR1_IC1F_SHIFT), + + /* DTS clock div by D with N time to confirm event */ + + STM32_CAP_FILTER_DTS_D2_N6 = (4 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_DTS_D2_N8 = (5 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_DTS_D4_N6 = (6 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_DTS_D4_N8 = (7 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_DTS_D8_N6 = (8 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_DTS_D8_N8 = (9 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_DTS_D16_N5 = (10 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_DTS_D16_N6 = (11 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_DTS_D16_N8 = (12 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_DTS_D32_N5 = (13 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_DTS_D32_N6 = (14 << GTIM_CCMR1_IC1F_SHIFT), + STM32_CAP_FILTER_DTS_D32_N8 = (15 << GTIM_CCMR1_IC1F_SHIFT), + + /* EDGE */ + + STM32_CAP_EDGE_MASK = (3 << 8), + STM32_CAP_EDGE_DISABLED = (0 << 8), + STM32_CAP_EDGE_RISING = (1 << 8), + STM32_CAP_EDGE_FALLING = (2 << 8), + STM32_CAP_EDGE_BOTH = (3 << 8), Review Comment: I wonder if the 8 could be replaced with a define to make the code more self-documenting? (I looked through the microcontroller reference manual and the `arch/arm/src/stm32h7/hardware/stm32_tim.h` header and these do not appear to be register bits? Perhaps they only pertain to the NuttX driver implementation, or I missed something...) -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: commits-unsubscr...@nuttx.apache.org For queries about this service, please contact Infrastructure at: us...@infra.apache.org
