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commit c0db55f45368712d2acd62baa140e2071c743f4a
Author: hujun5 <huj...@xiaomi.com>
AuthorDate: Tue Apr 15 18:30:29 2025 +0800
armv7a: change ARMV7A_SMP_BUSY_WAIT to ARM_BUSY_WAIT
On a system with multiple CPU cores, when the system is powered on,
multiple cores may start running simultaneously. In this case, software
is required to handle the startup logic for multi-core synchronization.
One approach is to use global variables.
however, the global variable region may not have been initialized yet.
In such scenarios, we can use a busywait flag to
implement the synchronization strategy.
Signed-off-by: hujun5 <huj...@xiaomi.com>
---
arch/arm/Kconfig | 20 ++++++++++++++++++++
arch/arm/src/armv7-a/Kconfig | 11 -----------
arch/arm/src/armv7-a/arm_head.S | 8 ++++----
3 files changed, 24 insertions(+), 15 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7da93153db..b519a94cec 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1279,6 +1279,26 @@ config ARM_FPU_ABI_SOFT
---help---
Pass float value via integer register (-mfloat-abi=softfp)
+config ARM_BUSY_WAIT
+ bool "Busy wait when boot"
+ default n
+ depends on ARCH_HAVE_MULTICPU
+ ---help---
+ On a system with multiple CPU cores, when the system is powered
on,
+ multiple cores may start running simultaneously. In this case,
software
+ is required to handle the startup logic for multi-core
synchronization.
+ One approach is to use global variables.
+ however, the global variable region may not have been
initialized yet.
+ In such scenarios, we can use a busywait flag to
+ implement the synchronization strategy.
+
+config ARM_BUSY_WAIT_FLAG_ADDR
+ hex "Busy wait flag address"
+ depends on ARM_BUSY_WAIT
+ ---help---
+ The busywait address is typically a region that is initialized
to 0
+ during the boot phase.
+
config ARM_DPFPU32
bool "FPU with 32 double-precision register"
default y
diff --git a/arch/arm/src/armv7-a/Kconfig b/arch/arm/src/armv7-a/Kconfig
index 519bf83425..8379088bc3 100644
--- a/arch/arm/src/armv7-a/Kconfig
+++ b/arch/arm/src/armv7-a/Kconfig
@@ -62,17 +62,6 @@ config ARMV7A_HAVE_L2CC
Selected by the configuration tool if the architecture supports
any
kind of L2 cache.
-config ARMV7A_SMP_BUSY_WAIT
- bool "Busy wait when SMP boot"
- default n
- depends on SMP
- ---help---
- Enables busy wait when SMP boot
-
-config ARMV7A_SMP_BUSY_WAIT_FLAG_ADDR
- hex "Busy wait flag address"
- depends on ARMV7A_SMP_BUSY_WAIT
-
config ARMV7A_HAVE_L2CC_PL310
bool
default n
diff --git a/arch/arm/src/armv7-a/arm_head.S b/arch/arm/src/armv7-a/arm_head.S
index 3da52909f3..cd7d527fbf 100644
--- a/arch/arm/src/armv7-a/arm_head.S
+++ b/arch/arm/src/armv7-a/arm_head.S
@@ -187,8 +187,8 @@ __start:
cmp r0, #0
beq __cpu0_start
-#ifdef CONFIG_ARMV7A_SMP_BUSY_WAIT
- ldr r2, =CONFIG_ARMV7A_SMP_BUSY_WAIT_FLAG_ADDR
+#ifdef CONFIG_ARM_BUSY_WAIT
+ ldr r2, =CONFIG_ARM_BUSY_WAIT_FLAG_ADDR
1:
ldr r1, [r2, #0]
cmp r1, #0
@@ -690,8 +690,8 @@ __cpu0_start:
/* finish busy wait */
-#ifdef CONFIG_ARMV7A_SMP_BUSY_WAIT
- ldr r0, =CONFIG_ARMV7A_SMP_BUSY_WAIT_FLAG_ADDR
+#ifdef CONFIG_ARM_BUSY_WAIT
+ ldr r0, =CONFIG_ARM_BUSY_WAIT_FLAG_ADDR
mov r1, #1
str r1, [r0]
dsb sy
