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commit ed751889deac8b1c97899ebf8822e67abff9c8fe
Author: Filipe Cavalcanti <filipe.cavalca...@espressif.com>
AuthorDate: Mon Jul 21 14:45:50 2025 -0300
arch/xtensa/esp32: Update E-Fuse driver
Updates E-Fuse driver for ESP32, now sharing a common implementation across
Xtensa devices.
Signed-off-by: Filipe Cavalcanti <filipe.cavalca...@espressif.com>
---
arch/xtensa/src/common/espressif/Make.defs | 3 +-
arch/xtensa/src/common/espressif/esp_efuse.c | 71 +++
arch/xtensa/src/common/espressif/esp_efuse.h | 20 +
arch/xtensa/src/esp32/Kconfig | 6 +-
arch/xtensa/src/esp32/Make.defs | 7 +-
arch/xtensa/src/esp32/esp32_efuse.c | 605 ---------------------
arch/xtensa/src/esp32/esp32_efuse.h | 93 ----
arch/xtensa/src/esp32/esp32_efuse_lowerhalf.c | 195 -------
arch/xtensa/src/esp32/esp32_start.c | 45 +-
arch/xtensa/src/esp32/hal.mk | 9 +-
.../esp32/esp32-devkitc/configs/efuse/defconfig | 60 +-
.../configs/wamr_wasi_debug/defconfig | 3 +-
.../xtensa/esp32/esp32-devkitc/src/esp32_bringup.c | 10 +-
.../esp32/esp32-pico-kit/src/esp32_bringup.c | 10 +-
.../lilygo_tbeam_lora_gps/src/esp32_bringup.c | 10 +-
.../xtensa/esp32/ttgo_eink5_v2/src/esp32_bringup.c | 8 +-
.../esp32/ttgo_lora_esp32/src/esp32_bringup.c | 10 +-
.../esp32/ttgo_t_display_esp32/src/esp32_bringup.c | 10 +-
18 files changed, 158 insertions(+), 1017 deletions(-)
diff --git a/arch/xtensa/src/common/espressif/Make.defs
b/arch/xtensa/src/common/espressif/Make.defs
index 03582f9a821..1d2fc041ea2 100644
--- a/arch/xtensa/src/common/espressif/Make.defs
+++ b/arch/xtensa/src/common/espressif/Make.defs
@@ -111,8 +111,9 @@ ifeq ($(CONFIG_ESPRESSIF_ADC),y)
CHIP_CSRCS += esp_adc.c
endif
-ifeq ($(CONFIG_ESPRESSIF_EFUSE),y)
CHIP_CSRCS += esp_efuse.c
+
+ifeq ($(CONFIG_ESPRESSIF_EFUSE),y)
LDFLAGS += -u esp_efuse_startup_include_func
endif
diff --git a/arch/xtensa/src/common/espressif/esp_efuse.c
b/arch/xtensa/src/common/espressif/esp_efuse.c
index e7066e07460..f0d4fa2def8 100644
--- a/arch/xtensa/src/common/espressif/esp_efuse.c
+++ b/arch/xtensa/src/common/espressif/esp_efuse.c
@@ -38,6 +38,12 @@
#include "esp_efuse.h"
#include "esp_efuse_utility.h"
+#ifdef CONFIG_ARCH_CHIP_ESP32
+#include "xtensa.h"
+#include "soc/apb_ctrl_reg.h"
+#include "esp_efuse_table.h"
+#endif
+
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
@@ -54,6 +60,8 @@ struct esp_efuse_lowerhalf_s
void *upper; /* Pointer to efuse_upperhalf_s */
};
+#ifdef CONFIG_ESPRESSIF_EFUSE
+
/****************************************************************************
* Private Functions Prototypes
****************************************************************************/
@@ -306,3 +314,66 @@ int esp_efuse_initialize(const char *devpath)
return ret;
}
+#endif
+
+/****************************************************************************
+ * Name: esp_efuse_hal_chip_revision
+ *
+ * Description:
+ * Returns the chip version in the format: Major * 100 + Minor.
+ * This function must be compiled even when CONFIG_ESPRESSIF_EFUSE is not
+ * defined, because it required used by esp32_start.c.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * The chip version as an unsigned 32-bit integer.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_CHIP_ESP32
+uint32_t esp_efuse_hal_chip_revision(void)
+{
+ uint8_t eco_bit0;
+ uint8_t eco_bit1;
+ uint8_t eco_bit2;
+ uint8_t minor_chip_version;
+ uint32_t combine_value;
+ uint32_t chip_ver = 0;
+
+ esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_REV1,
+ &eco_bit0,
+ ESP_EFUSE_CHIP_VER_REV1[0]->bit_count);
+ esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_REV2,
+ &eco_bit1,
+ ESP_EFUSE_CHIP_VER_REV2[0]->bit_count);
+ esp_efuse_read_field_blob(ESP_EFUSE_WAFER_VERSION_MINOR,
+ &minor_chip_version,
+ ESP_EFUSE_WAFER_VERSION_MINOR[0]->bit_count);
+
+ eco_bit2 = (getreg32(APB_CTRL_DATE_REG) & 0x80000000) >> 31;
+ combine_value = (eco_bit2 << 2) | (eco_bit1 << 1) | eco_bit0;
+
+ switch (combine_value)
+ {
+ case 0:
+ chip_ver = 0;
+ break;
+ case 1:
+ chip_ver = 1;
+ break;
+ case 3:
+ chip_ver = 2;
+ break;
+ case 7:
+ chip_ver = 3;
+ break;
+ default:
+ chip_ver = 0;
+ break;
+ }
+
+ return (chip_ver * 100) + minor_chip_version;
+}
+#endif
diff --git a/arch/xtensa/src/common/espressif/esp_efuse.h
b/arch/xtensa/src/common/espressif/esp_efuse.h
index 4d00ae1ac5e..6a380d9090b 100644
--- a/arch/xtensa/src/common/espressif/esp_efuse.h
+++ b/arch/xtensa/src/common/espressif/esp_efuse.h
@@ -115,6 +115,24 @@ typedef enum
* Public Functions Prototypes
****************************************************************************/
+/****************************************************************************
+ * Name: esp_efuse_hal_chip_revision
+ *
+ * Description:
+ * Returns the chip version in the format: Major * 100 + Minor.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * The chip version as an unsigned 32-bit integer.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_CHIP_ESP32
+uint32_t esp_efuse_hal_chip_revision(void);
+#endif
+
/****************************************************************************
* Name: esp_efuse_initialize
*
@@ -131,7 +149,9 @@ typedef enum
*
****************************************************************************/
+#ifdef CONFIG_ESPRESSIF_EFUSE
int esp_efuse_initialize(const char *devpath);
+#endif
#undef EXTERN
#if defined(__cplusplus)
diff --git a/arch/xtensa/src/esp32/Kconfig b/arch/xtensa/src/esp32/Kconfig
index 1e4a5056d08..0dac8a3afba 100644
--- a/arch/xtensa/src/esp32/Kconfig
+++ b/arch/xtensa/src/esp32/Kconfig
@@ -231,10 +231,8 @@ config ESP32_BT
No yet implemented
config ESP32_EFUSE
- bool "EFUSE support"
- default n
- ---help---
- Enable ESP32 efuse support.
+ bool
+ select ESPRESSIF_EFUSE
config ESP32_EMAC
bool "Ethernet MAC"
diff --git a/arch/xtensa/src/esp32/Make.defs b/arch/xtensa/src/esp32/Make.defs
index f404a08f0d1..fca6f11cb6b 100644
--- a/arch/xtensa/src/esp32/Make.defs
+++ b/arch/xtensa/src/esp32/Make.defs
@@ -115,11 +115,6 @@ CHIP_CSRCS += esp32_himem.c
CHIP_CSRCS += esp32_himem_chardev.c
endif
-CHIP_CSRCS += esp32_efuse.c
-ifeq ($(CONFIG_ESP32_EFUSE),y)
-CHIP_CSRCS += esp32_efuse_lowerhalf.c
-endif
-
ifeq ($(CONFIG_ESP32_EMAC),y)
CHIP_CSRCS += esp32_emac.c
endif
@@ -228,7 +223,7 @@ endif
ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
ifndef ESP_HAL_3RDPARTY_VERSION
- ESP_HAL_3RDPARTY_VERSION = e9a78c811578545e2bc673862d885a15bd6cbf67
+ ESP_HAL_3RDPARTY_VERSION = 96185c5348c747d2e15baef639d0b2a842ecd504
endif
ifndef ESP_HAL_3RDPARTY_URL
diff --git a/arch/xtensa/src/esp32/esp32_efuse.c
b/arch/xtensa/src/esp32/esp32_efuse.c
deleted file mode 100644
index d10d607852c..00000000000
--- a/arch/xtensa/src/esp32/esp32_efuse.c
+++ /dev/null
@@ -1,605 +0,0 @@
-/****************************************************************************
- * arch/xtensa/src/esp32/esp32_efuse.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <debug.h>
-#include <errno.h>
-#include <assert.h>
-#include <string.h>
-#include <sys/param.h>
-#include <nuttx/efuse/efuse.h>
-
-#include "xtensa.h"
-#include "esp32_efuse.h"
-#include "esp32_clockconfig.h"
-#include "hardware/esp32_apb_ctrl.h"
-#include "hardware/esp32_efuse.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#define EFUSE_CONF_WRITE 0x5a5a /* eFuse_pgm_op_ena, force no rd/wr dis. */
-#define EFUSE_CONF_READ 0x5aa5 /* eFuse_read_op_ena, release force. */
-#define EFUSE_CMD_PGM 0x02 /* Command to program. */
-#define EFUSE_CMD_READ 0x01 /* Command to read. */
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-uint32_t g_start_efuse_rdreg[4] =
-{
- EFUSE_BLK0_RDATA0_REG,
- EFUSE_BLK1_RDATA0_REG,
- EFUSE_BLK2_RDATA0_REG,
- EFUSE_BLK3_RDATA0_REG
-};
-
-uint32_t g_start_efuse_wrreg[4] =
-{
- EFUSE_BLK0_WDATA0_REG,
- EFUSE_BLK1_WDATA0_REG,
- EFUSE_BLK2_WDATA0_REG,
- EFUSE_BLK3_WDATA0_REG
-};
-
-/****************************************************************************
- * Private Prototypes
- ****************************************************************************/
-
-#ifdef CONFIG_ESP32_EFUSE
-static int esp_efuse_set_timing(void);
-void esp_efuse_burn_efuses(void);
-static uint32_t get_mask(uint32_t bit_count, uint32_t shift);
-static int get_reg_num(int bit_offset, int bit_count, int i_reg);
-static int get_count_bits_in_reg(int bit_offset, int bit_count, int i_reg);
-static int esp_efuse_get_field_size(const efuse_desc_t *field[]);
-static bool check_range_of_bits(int offset_in_bits, int size_bits);
-static int esp_efuse_get_number_of_items(int bits, int size_of_base);
-static uint32_t fill_reg(int bit_start_in_reg, int bit_count_in_reg,
- uint8_t *blob, int *filled_bits_blob);
-static int esp_efuse_process(const efuse_desc_t *field[], void *ptr,
- size_t ptr_size_bits,
- efuse_func_proc_t func_proc);
-static uint32_t esp_efuse_read_reg(uint32_t blk, uint32_t num_reg);
-static int esp_efuse_write_blob(uint32_t num_reg, int bit_offset,
- int bit_count, void *arr_in,
- int *bits_counter);
-static int esp_efuse_fill_buff(uint32_t num_reg, int bit_offset,
- int bit_count, void *arr_out,
- int *bits_counter);
-static void esp_efuse_write_reg(uint32_t blk, uint32_t num_reg,
- uint32_t value);
-#endif /* CONFIG_ESP32_EFUSE */
-
-static uint32_t efuse_hal_get_major_chip_version(void);
-static uint32_t efuse_hal_get_minor_chip_version(void);
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-#ifdef CONFIG_ESP32_EFUSE
-
-static int esp_efuse_set_timing(void)
-{
- uint32_t apb_freq_mhz = esp_clk_apb_freq() / 1000000;
- uint32_t clk_sel0;
- uint32_t clk_sel1;
- uint32_t dac_clk_div;
-
- if (apb_freq_mhz <= 26)
- {
- clk_sel0 = 250;
- clk_sel1 = 255;
- dac_clk_div = 52;
- }
- else
- {
- if (apb_freq_mhz <= 40)
- {
- clk_sel0 = 160;
- clk_sel1 = 255;
- dac_clk_div = 80;
- }
- else
- {
- clk_sel0 = 80;
- clk_sel1 = 128;
- dac_clk_div = 100;
- }
- }
-
- REG_SET_FIELD(EFUSE_DAC_CONF_REG, EFUSE_DAC_CLK_DIV, dac_clk_div);
- REG_SET_FIELD(EFUSE_CLK_REG, EFUSE_CLK_SEL0, clk_sel0);
- REG_SET_FIELD(EFUSE_CLK_REG, EFUSE_CLK_SEL1, clk_sel1);
- return OK;
-}
-
-/* return mask with required the number of ones with shift */
-
-static uint32_t get_mask(uint32_t bit_count, uint32_t shift)
-{
- uint32_t mask;
-
- if (bit_count != 32)
- {
- mask = (1 << bit_count) - 1;
- }
- else
- {
- mask = 0xffffffff;
- }
-
- return mask << shift;
-}
-
-/* return the register number in the array
- * return -1 if all registers for field was selected
- */
-
-static int get_reg_num(int bit_offset, int bit_count, int i_reg)
-{
- uint32_t bit_start = (bit_offset % 256);
- int num_reg = i_reg + bit_start / 32;
-
- if (num_reg > (bit_start + bit_count - 1) / 32)
- {
- return -1;
- }
-
- return num_reg;
-}
-
-/* Returns the number of bits in the register */
-
-static int get_count_bits_in_reg(int bit_offset, int bit_count, int i_reg)
-{
- int ret_count = 0;
- int num_reg = 0;
- int num_bit;
- int bit_start = (bit_offset % 256);
- int last_used_bit = (bit_start + bit_count - 1);
-
- for (num_bit = bit_start; num_bit <= last_used_bit; ++num_bit)
- {
- ++ret_count;
- if ((((num_bit + 1) % 32) == 0) || (num_bit == last_used_bit))
- {
- if (i_reg == num_reg++)
- {
- return ret_count;
- }
-
- ret_count = 0;
- }
- }
-
- return 0;
-}
-
-/* get the length of the field in bits */
-
-static int esp_efuse_get_field_size(const efuse_desc_t *field[])
-{
- int bits_counter = 0;
-
- if (field != NULL)
- {
- int i = 0;
-
- while (field[i] != NULL)
- {
- bits_counter += field[i]->bit_count;
- ++i;
- }
- }
-
- return bits_counter;
-}
-
-/* check range of bits for any coding scheme */
-
-static bool check_range_of_bits(int offset_in_bits, int size_bits)
-{
- int blk_offset = offset_in_bits % 256;
- int max_num_bit = blk_offset + size_bits;
-
- if (max_num_bit > 256)
- {
- return false;
- }
-
- return true;
-}
-
-/* Returns the number of array elements for placing these bits in an array
- * with the length of each element equal to size_of_base.
- */
-
-static int esp_efuse_get_number_of_items(int bits, int size_of_base)
-{
- return bits / size_of_base + (bits % size_of_base > 0 ? 1 : 0);
-}
-
-/* fill efuse register from array */
-
-static uint32_t fill_reg(int bit_start_in_reg, int bit_count_in_reg,
- uint8_t *blob, int *filled_bits_blob)
-{
- uint32_t reg_to_write = 0;
- uint32_t temp_blob_32;
- int shift_reg;
- int shift_bit = (*filled_bits_blob) % 8;
-
- if (shift_bit != 0)
- {
- temp_blob_32 = blob[(*filled_bits_blob) / 8] >> shift_bit;
- shift_bit = ((8 - shift_bit) < bit_count_in_reg) ?
- (8 - shift_bit) : bit_count_in_reg;
-
- reg_to_write = temp_blob_32 & get_mask(shift_bit, 0);
- (*filled_bits_blob) += shift_bit;
- bit_count_in_reg -= shift_bit;
- }
-
- shift_reg = shift_bit;
-
- while (bit_count_in_reg > 0)
- {
- temp_blob_32 = blob[(*filled_bits_blob) / 8];
- shift_bit = (bit_count_in_reg > 8) ? 8 : bit_count_in_reg;
- reg_to_write |= (temp_blob_32 & get_mask(shift_bit, 0)) << shift_reg;
- (*filled_bits_blob) += shift_bit;
- bit_count_in_reg -= shift_bit;
- shift_reg += 8;
- };
-
- return reg_to_write << bit_start_in_reg;
-}
-
-/* This function processes the field by calling the passed function */
-
-static int esp_efuse_process(const efuse_desc_t *field[], void *ptr,
- size_t ptr_size_bits,
- efuse_func_proc_t func_proc)
-{
- int err = OK;
- int bits_counter = 0;
- int field_len;
- int req_size;
- int i = 0;
-
- /* get and check size */
-
- field_len = esp_efuse_get_field_size(field);
- req_size = (ptr_size_bits == 0) ? field_len : \
- MIN(ptr_size_bits, field_len);
-
- while (err == OK && req_size > bits_counter && field[i] != NULL)
- {
- int i_reg = 0;
- int num_reg;
-
- if (check_range_of_bits(field[i]->bit_offset,
- field[i]->bit_count) == false)
- {
- minfo("Range of data does not match the coding scheme");
- err = -EINVAL;
- }
-
- while (err == OK && req_size > bits_counter &&
- (num_reg = get_reg_num(field[i]->bit_offset,
- field[i]->bit_count, i_reg)) != -1)
- {
- int num_bits = get_count_bits_in_reg(field[i]->bit_offset,
- field[i]->bit_count,
- i_reg);
- int bit_offset = field[i]->bit_offset;
-
- if ((bits_counter + num_bits) > req_size)
- {
- /* Limits the length of the field */
-
- num_bits = req_size - bits_counter;
- }
-
- err = func_proc(num_reg, bit_offset, num_bits, ptr, &bits_counter);
- ++i_reg;
- }
-
- i++;
- }
-
- DEBUGASSERT(bits_counter <= req_size);
- return err;
-}
-
-/* Fill registers from array for writing */
-
-static int esp_efuse_write_blob(uint32_t num_reg, int bit_offset,
- int bit_count, void *arr_in, int *bits_counter)
-{
- uint32_t block = (bit_offset / 256);
- uint32_t bit_start = (bit_offset % 256);
- uint32_t reg_to_write = fill_reg(bit_start, bit_count, (uint8_t *) arr_in,
- bits_counter);
-
- esp_efuse_write_reg(block, num_reg, reg_to_write);
-
- return OK;
-}
-
-/* Read efuse register */
-
-static uint32_t esp_efuse_read_reg(uint32_t blk, uint32_t num_reg)
-{
- DEBUGASSERT(blk >= 0 && blk < EFUSE_BLK_MAX);
- uint32_t value;
- uint32_t blk_start = g_start_efuse_rdreg[blk];
-
- DEBUGASSERT(num_reg <= 7);
-
- value = getreg32(blk_start + num_reg * 4);
- return value;
-}
-
-/* Read efuse register and write this value to array. */
-
-static int esp_efuse_fill_buff(uint32_t num_reg, int bit_offset,
- int bit_count, void *arr_out,
- int *bits_counter)
-{
- uint8_t *blob = (uint8_t *) arr_out;
- uint32_t efuse_block = (bit_offset / 256);
- uint32_t bit_start = (bit_offset % 256);
- uint32_t reg = esp_efuse_read_reg(efuse_block, num_reg);
- uint64_t reg_of_aligned_bits = (reg >> bit_start) & get_mask(bit_count, 0);
- int sum_shift = 0;
- int shift_bit = (*bits_counter) % 8;
-
- minfo("block = %" PRIu32 " | num_reg = %" PRIu32 ""
- " | bit_start = %" PRIu32 " | bit_count = %d\n",
- efuse_block, num_reg, bit_start, bit_count);
-
- if (shift_bit != 0)
- {
- blob[(*bits_counter) / 8] |= (uint8_t)(reg_of_aligned_bits << \
- shift_bit);
- shift_bit = ((8 - shift_bit) < bit_count) ? (8 - shift_bit) : \
- bit_count;
- (*bits_counter) += shift_bit;
- bit_count -= shift_bit;
- }
-
- while (bit_count > 0)
- {
- sum_shift += shift_bit;
- blob[(*bits_counter) / 8] |= (uint8_t)(reg_of_aligned_bits >> \
- sum_shift);
- shift_bit = (bit_count > 8) ? 8 : bit_count;
- (*bits_counter) += shift_bit;
- bit_count -= shift_bit;
- };
-
- return OK;
-}
-
-/* Write efuse register */
-
-static void esp_efuse_write_reg(uint32_t blk, uint32_t num_reg,
- uint32_t value)
-{
- uint32_t addr_wr_reg;
- uint32_t reg_to_write;
- uint32_t blk_start = g_start_efuse_wrreg[blk];
-
- DEBUGASSERT(blk >= 0 && blk < EFUSE_BLK_MAX);
-
- DEBUGASSERT(num_reg <= 7);
-
- /* The block 0 and register 7 doesn't exist */
-
- if (blk == 0 && num_reg == 7)
- {
- merr("Block 0 Register 7 doesn't exist!\n");
- return;
- }
-
- addr_wr_reg = blk_start + num_reg * 4;
- reg_to_write = getreg32(addr_wr_reg) | value;
-
- /* The register can be written in parts so we combine the new value
- * with the one already available.
- */
-
- putreg32(reg_to_write, addr_wr_reg);
-}
-
-#endif /* CONFIG_ESP32_EFUSE */
-
-/****************************************************************************
- * Name: efuse_hal_get_major_chip_version
- *
- * Description:
- * Retrieves the major version of the chip. It reads the version
- * information from specific registers and combines them to determine
- * the major version.
- *
- * Input Parameters:
- * None
- *
- * Returned Value:
- * The major version of the chip as an unsigned 32-bit integer.
- *
- ****************************************************************************/
-
-IRAM_ATTR static uint32_t efuse_hal_get_major_chip_version(void)
-{
- uint8_t eco_bit0;
- uint8_t eco_bit1;
- uint8_t eco_bit2;
- uint32_t combine_value;
- uint32_t chip_ver = 0;
-
- eco_bit0 = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_REV1);
- eco_bit1 = REG_GET_FIELD(EFUSE_BLK0_RDATA5_REG, EFUSE_RD_CHIP_VER_REV2);
- eco_bit2 = (getreg32(APB_CTRL_DATE_REG) & 0x80000000) >> 31;
- combine_value = (eco_bit2 << 2) | (eco_bit1 << 1) | eco_bit0;
-
- switch (combine_value)
- {
- case 0:
- chip_ver = 0;
- break;
- case 1:
- chip_ver = 1;
- break;
- case 3:
- chip_ver = 2;
- break;
- case 7:
- chip_ver = 3;
- break;
- default:
- chip_ver = 0;
- break;
- }
-
- return chip_ver;
-}
-
-/****************************************************************************
- * Name: efuse_hal_get_minor_chip_version
- *
- * Description:
- * Retrieves the minor version of the chip. It reads the version
- * information from a specific register.
- *
- * Input Parameters:
- * None
- *
- * Returned Value:
- * The minor version of the chip as an unsigned 32-bit integer.
- *
- ****************************************************************************/
-
-IRAM_ATTR static uint32_t efuse_hal_get_minor_chip_version(void)
-{
- return REG_GET_FIELD(EFUSE_BLK0_RDATA5_REG, EFUSE_RD_WAFER_VERSION_MINOR);
-}
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: esp_efuse_hal_chip_revision
- *
- * Description:
- * Returns the chip version in the format: Major * 100 + Minor.
- *
- * Input Parameters:
- * None
- *
- * Returned Value:
- * The chip version as an unsigned 32-bit integer.
- *
- ****************************************************************************/
-
-IRAM_ATTR uint32_t esp_efuse_hal_chip_revision(void)
-{
- return (efuse_hal_get_major_chip_version() * 100) +
- efuse_hal_get_minor_chip_version();
-}
-
-#ifdef CONFIG_ESP32_EFUSE
-
-/* Read value from EFUSE, writing it into an array */
-
-int esp_efuse_read_field(const efuse_desc_t *field[], void *dst,
- size_t dst_size_bits)
-{
- int err = OK;
-
- if (field == NULL || dst == NULL || dst_size_bits == 0)
- {
- err = -EINVAL;
- }
- else
- {
- memset((uint8_t *)dst, 0,
- esp_efuse_get_number_of_items(dst_size_bits, 8));
-
- err = esp_efuse_process(field, dst, dst_size_bits,
- esp_efuse_fill_buff);
- }
-
- return err;
-}
-
-/* Write array to EFUSE */
-
-int esp_efuse_write_field(const efuse_desc_t *field[],
- const void *src, size_t src_size_bits)
-{
- int err = OK;
-
- if (field == NULL || src == NULL || src_size_bits == 0)
- {
- err = -EINVAL;
- }
- else
- {
- err = esp_efuse_process(field, (void *)src, src_size_bits,
- esp_efuse_write_blob);
- }
-
- return err;
-}
-
-/* Burn values written to the efuse write registers */
-
-void esp_efuse_burn_efuses(void)
-{
- esp_efuse_set_timing();
-
- /* Permanently update values written to the efuse write registers */
-
- putreg32(EFUSE_CONF_WRITE, EFUSE_CONF_REG);
- putreg32(EFUSE_CMD_PGM, EFUSE_CMD_REG);
-
- while (getreg32(EFUSE_CMD_REG) != 0)
- {
- };
-
- putreg32(EFUSE_CONF_READ, EFUSE_CONF_REG);
- putreg32(EFUSE_CMD_READ, EFUSE_CMD_REG);
-
- while (getreg32(EFUSE_CMD_REG) != 0)
- {
- };
-}
-
-#endif /* CONFIG_ESP32_EFUSE */
diff --git a/arch/xtensa/src/esp32/esp32_efuse.h
b/arch/xtensa/src/esp32/esp32_efuse.h
deleted file mode 100644
index aa60c5b1dee..00000000000
--- a/arch/xtensa/src/esp32/esp32_efuse.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/****************************************************************************
- * arch/xtensa/src/esp32/esp32_efuse.h
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/efuse/efuse.h>
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-/* Type of eFuse blocks for ESP32 */
-
-typedef enum
-{
- EFUSE_BLK0 = 0, /* Reserved. */
- EFUSE_BLK1 = 1, /* Used for Flash Encryption. */
- EFUSE_BLK2 = 2, /* Used for Secure Boot. */
- EFUSE_BLK3 = 3, /* Uses for the purpose of the user. */
- EFUSE_BLK_MAX
-} esp_efuse_block_t;
-
-/* This is type of function that will handle the efuse field register.
- *
- * num_reg The register number in the block.
- * efuse_block Block number.
- * bit_start Start bit in the register.
- * bit_count The number of bits used in the register.
- * arr A pointer to an array or variable.
- * bits_counter Counter bits.
- *
- * return
- * - OK: The operation was successfully completed.
- * - other efuse component errors.
- */
-
-typedef int (*efuse_func_proc_t) (uint32_t num_reg,
- int starting_bit_num_in_reg,
- int num_bits_used_in_reg,
- void *arr, int *bits_counter);
-
-/****************************************************************************
- * Public Functions Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Name: esp_efuse_hal_chip_revision
- *
- * Description:
- * Returns the chip version in the format: Major * 100 + Minor.
- *
- * Input Parameters:
- * None
- *
- * Returned Value:
- * The chip version as an unsigned 32-bit integer.
- *
- ****************************************************************************/
-
-uint32_t esp_efuse_hal_chip_revision(void);
-
-#ifdef CONFIG_ESP32_EFUSE
-
-int esp_efuse_read_field(const efuse_desc_t *field[], void *dst,
- size_t dst_size_bits);
-
-int esp_efuse_write_field(const efuse_desc_t *field[],
- const void *src, size_t src_size_bits);
-
-void esp_efuse_burn_efuses(void);
-
-int esp32_efuse_initialize(const char *devpath);
-
-#endif /* CONFIG_ESP32_EFUSE */
diff --git a/arch/xtensa/src/esp32/esp32_efuse_lowerhalf.c
b/arch/xtensa/src/esp32/esp32_efuse_lowerhalf.c
deleted file mode 100644
index 59127bc0714..00000000000
--- a/arch/xtensa/src/esp32/esp32_efuse_lowerhalf.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/****************************************************************************
- * arch/xtensa/src/esp32/esp32_efuse_lowerhalf.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <stdlib.h>
-#include <debug.h>
-#include <assert.h>
-
-#include <nuttx/irq.h>
-#include <nuttx/kmalloc.h>
-#include <nuttx/efuse/efuse.h>
-
-#include "hardware/esp32_soc.h"
-#include "esp32_efuse.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-struct esp32_efuse_lowerhalf_s
-{
- const struct efuse_ops_s *ops; /* Lower half operations */
- void *upper; /* Pointer to efuse_upperhalf_s */
-};
-
-/****************************************************************************
- * Private Functions Prototypes
- ****************************************************************************/
-
-/* "Lower half" driver methods **********************************************/
-
-static int esp32_efuse_read_field(struct efuse_lowerhalf_s *lower,
- const efuse_desc_t *field[],
- uint8_t *data, size_t size);
-static int esp32_efuse_write_field(struct efuse_lowerhalf_s *lower,
- const efuse_desc_t *field[],
- const uint8_t *data,
- size_t size);
-static int efuse_ioctl(struct efuse_lowerhalf_s *lower, int cmd,
- unsigned long arg);
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/* "Lower half" driver methods */
-
-static const struct efuse_ops_s g_esp32_efuse_ops =
-{
- .read_field = esp32_efuse_read_field,
- .write_field = esp32_efuse_write_field,
- .ioctl = efuse_ioctl,
-};
-
-/* EFUSE lower-half */
-
-static struct esp32_efuse_lowerhalf_s g_esp32_efuse_lowerhalf =
-{
- .ops = &g_esp32_efuse_ops,
- .upper = NULL,
-};
-
-/****************************************************************************
- * Private functions
- ****************************************************************************/
-
-static int esp32_efuse_read_field(struct efuse_lowerhalf_s *lower,
- const efuse_desc_t *field[],
- uint8_t *data, size_t bits_len)
-{
- int ret = OK;
-
- /* Read the requested field */
-
- ret = esp_efuse_read_field(field, data, bits_len);
-
- return ret;
-}
-
-static int esp32_efuse_write_field(struct efuse_lowerhalf_s *lower,
- const efuse_desc_t *field[],
- const uint8_t *data, size_t bits_len)
-{
- irqstate_t flags;
- int ret = OK;
-
- flags = enter_critical_section();
-
- /* Write the blob data to the field */
-
- ret = esp_efuse_write_field(field, data, bits_len);
-
- /* Burn the EFUSEs */
-
- esp_efuse_burn_efuses();
-
- leave_critical_section(flags);
-
- return ret;
-}
-
-/****************************************************************************
- * Name: efuse_ioctl
- ****************************************************************************/
-
-static int efuse_ioctl(struct efuse_lowerhalf_s *lower,
- int cmd, unsigned long arg)
-{
- int ret = OK;
-
- switch (cmd)
- {
- /* We don't have proprietary EFUSE ioctls */
-
- default:
- {
- minfo("Unrecognized cmd: %d\n", cmd);
- ret = -ENOTTY;
- }
- break;
- }
-
- return ret;
-}
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: esp32_efuse_initialize
- *
- * Description:
- * Initialize the efuse driver. The efuse is initialized
- * and registered as 'devpath'.
- *
- * Input Parameters:
- * devpath - The full path to the efuse. This should
- * be of the form /dev/efuse
- *
- * Returned Values:
- * Zero (OK) is returned on success; a negated errno value is returned on
- * any failure.
- *
- ****************************************************************************/
-
-int esp32_efuse_initialize(const char *devpath)
-{
- struct esp32_efuse_lowerhalf_s *lower = NULL;
- int ret = OK;
-
- DEBUGASSERT(devpath);
-
- lower = &g_esp32_efuse_lowerhalf;
-
- /* Register the efuser upper driver */
-
- lower->upper = efuse_register(devpath,
- (struct efuse_lowerhalf_s *)lower);
-
- if (lower->upper == NULL)
- {
- /* The actual cause of the failure may have been a failure to allocate
- * perhaps a failure to register the efuser driver (such as if the
- * 'devpath' were not unique). We know here but we return EEXIST to
- * indicate the failure (implying the non-unique devpath).
- */
-
- ret = -EEXIST;
- goto errout;
- }
-
-errout:
- return ret;
-}
diff --git a/arch/xtensa/src/esp32/esp32_start.c
b/arch/xtensa/src/esp32/esp32_start.c
index 7f4538a0a10..e8518704678 100644
--- a/arch/xtensa/src/esp32/esp32_start.c
+++ b/arch/xtensa/src/esp32/esp32_start.c
@@ -36,7 +36,6 @@
#include "xtensa_attr.h"
#include "esp32_clockconfig.h"
-#include "esp32_efuse.h"
#include "esp32_region.h"
#include "esp32_start.h"
#include "esp32_spiram.h"
@@ -48,6 +47,7 @@
#include "hardware/esp32_rtccntl.h"
#include "rom/esp32_libc_stubs.h"
#include "espressif/esp_loader.h"
+#include "espressif/esp_efuse.h"
#include "esp_private/startup_internal.h"
#ifdef CONFIG_ESPRESSIF_SIMPLE_BOOT
@@ -226,27 +226,6 @@ static noreturn_function void __esp32_start(void)
showprogress('A');
- chip_rev = esp_efuse_hal_chip_revision();
-
- _info("ESP32 chip revision is v%" PRId32 ".%01ld\n",
- chip_rev / 100, chip_rev % 100);
-
- if (chip_rev < 300)
- {
-#ifndef ESP32_IGNORE_CHIP_REVISION_CHECK
- ets_printf("ERROR: NuttX supports ESP32 chip revision >= v3.0"
- " (chip revision is v%" PRId32 ".%01ld)\n",
- chip_rev / 100, chip_rev % 100);
- PANIC();
-#endif
- ets_printf("WARNING: NuttX supports ESP32 chip revision >= v3.0"
- " (chip is v%" PRId32 ".%01ld).\n"
- "Ignoring this error and continuing because "
- "`ESP32_IGNORE_CHIP_REVISION_CHECK` is set...\n"
- "THIS MAY NOT WORK! DON'T USE THIS CHIP IN PRODUCTION!\n",
- chip_rev / 100, chip_rev % 100);
- }
-
#if defined(CONFIG_ESP32_SPIRAM_BOOT_INIT)
if (esp_spiram_init() != OK)
{
@@ -301,9 +280,31 @@ static noreturn_function void __esp32_start(void)
showprogress('D');
+ chip_rev = esp_efuse_hal_chip_revision();
+
+ _info("ESP32 chip revision is v%" PRId32 ".%01ld\n",
+ chip_rev / 100, chip_rev % 100);
+
+ if (chip_rev < 300)
+ {
+#ifndef ESP32_IGNORE_CHIP_REVISION_CHECK
+ ets_printf("ERROR: NuttX supports ESP32 chip revision >= v3.0"
+ " (chip revision is v%" PRId32 ".%01ld)\n",
+ chip_rev / 100, chip_rev % 100);
+ PANIC();
+#endif
+ ets_printf("WARNING: NuttX supports ESP32 chip revision >= v3.0"
+ " (chip is v%" PRId32 ".%01ld).\n"
+ "Ignoring this error and continuing because "
+ "`ESP32_IGNORE_CHIP_REVISION_CHECK` is set...\n"
+ "THIS MAY NOT WORK! DON'T USE THIS CHIP IN PRODUCTION!\n",
+ chip_rev / 100, chip_rev % 100);
+ }
+
/* Bring up NuttX */
nx_start();
+
for (; ; ); /* Should not return */
}
diff --git a/arch/xtensa/src/esp32/hal.mk b/arch/xtensa/src/esp32/hal.mk
index e695fa54ddd..34b05b03cf9 100644
--- a/arch/xtensa/src/esp32/hal.mk
+++ b/arch/xtensa/src/esp32/hal.mk
@@ -94,15 +94,17 @@ ARCHSCRIPT +=
$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_api.c
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_utility.c
+CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_startup.c
+CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_fields.c
+CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_fields.c
+CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table.c
+CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_utility.c
# Please note that the following source file depends on
`CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD` and
`CONFIG_SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK`
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)efuse_controller$(DELIM)keys$(DELIM)without_key_purposes$(DELIM)three_key_blocks$(DELIM)esp_efuse_api_key.c
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali.c
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_cali_line_fitting.c
-CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_fields.c
-CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table.c
-CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_utility.c
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_app_format$(DELIM)esp_app_desc.c
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
@@ -200,7 +202,6 @@ ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_sys.c
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_spiflash.c
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_crc.c
- CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_fields.c
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)wdt_hal_iram.c
CHIP_CSRCS +=
chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mpu_hal.c
diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/efuse/defconfig
b/boards/xtensa/esp32/esp32-devkitc/configs/efuse/defconfig
index 0897da12bfa..04e1038a606 100644
--- a/boards/xtensa/esp32/esp32-devkitc/configs/efuse/defconfig
+++ b/boards/xtensa/esp32/esp32-devkitc/configs/efuse/defconfig
@@ -8,7 +8,6 @@
# CONFIG_ARCH_LEDS is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-CONFIG_ALLOW_BSD_COMPONENTS=y
CONFIG_ARCH="xtensa"
CONFIG_ARCH_BOARD="esp32-devkitc"
CONFIG_ARCH_BOARD_COMMON=y
@@ -16,84 +15,33 @@ CONFIG_ARCH_BOARD_ESP32_DEVKITC=y
CONFIG_ARCH_CHIP="esp32"
CONFIG_ARCH_CHIP_ESP32=y
CONFIG_ARCH_CHIP_ESP32WROVER=y
-CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_XTENSA=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
-CONFIG_DEBUG_ASSERTIONS=y
-CONFIG_DEBUG_FEATURES=y
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_MM=y
-CONFIG_DEBUG_MM_ERROR=y
-CONFIG_DEBUG_MM_WARN=y
-CONFIG_DEBUG_NET=y
-CONFIG_DEBUG_NET_ERROR=y
-CONFIG_DEBUG_NET_WARN=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEFAULT_TASK_STACKSIZE=4096
-CONFIG_DEV_URANDOM=y
-CONFIG_DRIVERS_IEEE80211=y
-CONFIG_DRIVERS_WIRELESS=y
-CONFIG_EFUSE=y
-CONFIG_ESP32_EFUSE=y
-CONFIG_ESP32_SPIFLASH=y
-CONFIG_ESP32_SPIFLASH_SPIFFS=y
-CONFIG_ESP32_STORAGE_MTD_SIZE=0x80000
CONFIG_ESP32_UART0=y
-CONFIG_ESPRESSIF_WIFI=y
+CONFIG_ESPRESSIF_EFUSE=y
CONFIG_FS_PROCFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IDLETHREAD_STACKSIZE=3072
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INIT_STACKSIZE=3072
CONFIG_INTELHEX_BINARY=y
-CONFIG_LINE_MAX=300
+CONFIG_LINE_MAX=64
CONFIG_MM_REGIONS=3
-CONFIG_NAME_MAX=48
-CONFIG_NETDB_DNSCLIENT=y
-CONFIG_NETDB_DNSCLIENT_NAMESIZE=64
-CONFIG_NETDEV_LATEINIT=y
-CONFIG_NETDEV_PHY_IOCTL=y
-CONFIG_NETDEV_WIRELESS_IOCTL=y
-CONFIG_NETUTILS_CJSON=y
-CONFIG_NETUTILS_IPERF=y
-CONFIG_NETUTILS_TELNETD=y
-CONFIG_NET_BROADCAST=y
-CONFIG_NET_ETH_PKTSIZE=1518
-CONFIG_NET_ICMP_SOCKET=y
-CONFIG_NET_PREALLOC_DEVIF_CALLBACKS=32
-CONFIG_NET_STATISTICS=y
-CONFIG_NET_TCP=y
-CONFIG_NET_TCP_DELAYED_ACK=y
-CONFIG_NET_TCP_WRITE_BUFFERS=y
-CONFIG_NET_UDP=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
-CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=2048
CONFIG_PREALLOC_TIMERS=4
-CONFIG_PTHREAD_MUTEX_TYPES=y
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
-CONFIG_SIG_DEFAULT=y
-CONFIG_SPI=y
-CONFIG_SPIFFS_NAME_MAX=48
-CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_SYSLOG_BUFFER=y
-CONFIG_SYSTEM_DHCPC_RENEW=y
CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_PING=y
-CONFIG_SYSTEM_STACKMONITOR=y
-CONFIG_TLS_TASK_NELEM=4
CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_WIRELESS=y
-CONFIG_WIRELESS_WAPI=y
-CONFIG_WIRELESS_WAPI_CMDTOOL=y
-CONFIG_WIRELESS_WAPI_INITCONF=y
diff --git
a/boards/xtensa/esp32/esp32-devkitc/configs/wamr_wasi_debug/defconfig
b/boards/xtensa/esp32/esp32-devkitc/configs/wamr_wasi_debug/defconfig
index c3edcae0a0b..3ad69fea284 100644
--- a/boards/xtensa/esp32/esp32-devkitc/configs/wamr_wasi_debug/defconfig
+++ b/boards/xtensa/esp32/esp32-devkitc/configs/wamr_wasi_debug/defconfig
@@ -36,13 +36,12 @@ CONFIG_DEV_URANDOM_XORSHIFT128=y
CONFIG_DISABLE_MQUEUE_SYSV=y
CONFIG_DRIVERS_IEEE80211=y
CONFIG_DRIVERS_WIRELESS=y
-CONFIG_EFUSE=y
-CONFIG_ESP32_EFUSE=y
CONFIG_ESP32_IRAM_HEAP=y
CONFIG_ESP32_RTC_HEAP=y
CONFIG_ESP32_SPIFLASH=y
CONFIG_ESP32_STORAGE_MTD_SIZE=0x280000
CONFIG_ESP32_UART0=y
+CONFIG_ESPRESSIF_EFUSE=y
CONFIG_ESPRESSIF_WIFI=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_LITTLEFS=y
diff --git a/boards/xtensa/esp32/esp32-devkitc/src/esp32_bringup.c
b/boards/xtensa/esp32/esp32-devkitc/src/esp32_bringup.c
index a2baea659d8..92513073755 100644
--- a/boards/xtensa/esp32/esp32-devkitc/src/esp32_bringup.c
+++ b/boards/xtensa/esp32/esp32-devkitc/src/esp32_bringup.c
@@ -34,15 +34,15 @@
#include <sys/types.h>
#include <debug.h>
#include <errno.h>
-#if defined(CONFIG_ESP32_EFUSE)
+#if defined(CONFIG_ESPRESSIF_EFUSE)
#include <nuttx/efuse/efuse.h>
#endif
#include <nuttx/fs/fs.h>
#include <nuttx/himem/himem.h>
#include <nuttx/board.h>
-#if defined(CONFIG_ESP32_EFUSE)
-#include "esp32_efuse.h"
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+#include "espressif/esp_efuse.h"
#endif
#include "esp32_partition.h"
@@ -237,8 +237,8 @@ int esp32_bringup(void)
}
#endif
-#if defined(CONFIG_ESP32_EFUSE)
- ret = esp32_efuse_initialize("/dev/efuse");
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+ ret = esp_efuse_initialize("/dev/efuse");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret);
diff --git a/boards/xtensa/esp32/esp32-pico-kit/src/esp32_bringup.c
b/boards/xtensa/esp32/esp32-pico-kit/src/esp32_bringup.c
index fad4100294d..9e30465aec3 100644
--- a/boards/xtensa/esp32/esp32-pico-kit/src/esp32_bringup.c
+++ b/boards/xtensa/esp32/esp32-pico-kit/src/esp32_bringup.c
@@ -36,14 +36,14 @@
#include <debug.h>
#include <errno.h>
-#if defined(CONFIG_ESP32_EFUSE)
+#if defined(CONFIG_ESPRESSIF_EFUSE)
#include <nuttx/efuse/efuse.h>
#endif
#include <nuttx/fs/fs.h>
#include <nuttx/himem/himem.h>
-#if defined(CONFIG_ESP32_EFUSE)
-#include "esp32_efuse.h"
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+#include "espressif/esp_efuse.h"
#endif
#include "esp32_partition.h"
@@ -145,8 +145,8 @@ int esp32_bringup(void)
}
#endif
-#if defined(CONFIG_ESP32_EFUSE)
- ret = esp32_efuse_initialize("/dev/efuse");
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+ ret = esp_efuse_initialize("/dev/efuse");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret);
diff --git a/boards/xtensa/esp32/lilygo_tbeam_lora_gps/src/esp32_bringup.c
b/boards/xtensa/esp32/lilygo_tbeam_lora_gps/src/esp32_bringup.c
index 3f70059d5d6..8b6539e9a2e 100644
--- a/boards/xtensa/esp32/lilygo_tbeam_lora_gps/src/esp32_bringup.c
+++ b/boards/xtensa/esp32/lilygo_tbeam_lora_gps/src/esp32_bringup.c
@@ -36,14 +36,14 @@
#include <debug.h>
#include <errno.h>
-#if defined(CONFIG_ESP32_EFUSE)
+#if defined(CONFIG_ESPRESSIF_EFUSE)
#include <nuttx/efuse/efuse.h>
#endif
#include <nuttx/fs/fs.h>
#include <nuttx/himem/himem.h>
-#if defined(CONFIG_ESP32_EFUSE)
-#include "esp32_efuse.h"
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+#include "espressif/esp_efuse.h"
#endif
#include "esp32_partition.h"
@@ -144,8 +144,8 @@ int esp32_bringup(void)
}
#endif
-#if defined(CONFIG_ESP32_EFUSE)
- ret = esp32_efuse_initialize("/dev/efuse");
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+ ret = esp_efuse_initialize("/dev/efuse");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret);
diff --git a/boards/xtensa/esp32/ttgo_eink5_v2/src/esp32_bringup.c
b/boards/xtensa/esp32/ttgo_eink5_v2/src/esp32_bringup.c
index 747840629a7..1fe258a9858 100644
--- a/boards/xtensa/esp32/ttgo_eink5_v2/src/esp32_bringup.c
+++ b/boards/xtensa/esp32/ttgo_eink5_v2/src/esp32_bringup.c
@@ -41,9 +41,9 @@
# include <nuttx/video/fb.h>
#endif
-#if defined(CONFIG_ESP32_EFUSE)
+#if defined(CONFIG_ESPRESSIF_EFUSE)
# include <nuttx/efuse/efuse.h>
-# include "esp32_efuse.h"
+# include "espressif/esp_efuse.h"
#endif
#include <nuttx/fs/fs.h>
@@ -181,8 +181,8 @@ int esp32_bringup(void)
}
#endif
-#if defined(CONFIG_ESP32_EFUSE)
- ret = esp32_efuse_initialize("/dev/efuse");
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+ ret = esp_efuse_initialize("/dev/efuse");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret);
diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_bringup.c
b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_bringup.c
index b184a6e3c56..a220104c9d5 100644
--- a/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_bringup.c
+++ b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_bringup.c
@@ -36,14 +36,14 @@
#include <debug.h>
#include <errno.h>
-#if defined(CONFIG_ESP32_EFUSE)
+#if defined(CONFIG_ESPRESSIF_EFUSE)
#include <nuttx/efuse/efuse.h>
#endif
#include <nuttx/fs/fs.h>
#include <nuttx/himem/himem.h>
-#if defined(CONFIG_ESP32_EFUSE)
-#include "esp32_efuse.h"
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+#include "espressif/esp_efuse.h"
#endif
#include "esp32_partition.h"
@@ -144,8 +144,8 @@ int esp32_bringup(void)
}
#endif
-#if defined(CONFIG_ESP32_EFUSE)
- ret = esp32_efuse_initialize("/dev/efuse");
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+ ret = esp_efuse_initialize("/dev/efuse");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret);
diff --git a/boards/xtensa/esp32/ttgo_t_display_esp32/src/esp32_bringup.c
b/boards/xtensa/esp32/ttgo_t_display_esp32/src/esp32_bringup.c
index 48a0272e213..67dbd5e2eb4 100644
--- a/boards/xtensa/esp32/ttgo_t_display_esp32/src/esp32_bringup.c
+++ b/boards/xtensa/esp32/ttgo_t_display_esp32/src/esp32_bringup.c
@@ -36,14 +36,14 @@
#include <debug.h>
#include <errno.h>
-#if defined(CONFIG_ESP32_EFUSE)
+#if defined(CONFIG_ESPRESSIF_EFUSE)
#include <nuttx/efuse/efuse.h>
#endif
#include <nuttx/fs/fs.h>
#include <nuttx/himem/himem.h>
-#if defined(CONFIG_ESP32_EFUSE)
-#include "esp32_efuse.h"
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+#include "espressif/esp_efuse.h"
#endif
#include "esp32_partition.h"
@@ -190,8 +190,8 @@ int esp32_bringup(void)
}
#endif
-#if defined(CONFIG_ESP32_EFUSE)
- ret = esp32_efuse_initialize("/dev/efuse");
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+ ret = esp_efuse_initialize("/dev/efuse");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret);
