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in repository https://gitbox.apache.org/repos/asf/nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 6ec759706da arch/arm/samv7: enable USART peripherals for SAMx7xJ series
6ec759706da is described below

commit 6ec759706da7294f30a18a337de44e0a3be388f0
Author: Michal Lenc <michall...@seznam.cz>
AuthorDate: Wed Sep 17 17:17:47 2025 +0200

    arch/arm/samv7: enable USART peripherals for SAMx7xJ series
    
    SAME70J and SAMV70J series (64 pin packages) have two USART peripherals
    and three UART peripherals. Ensure USART peripherals are enabled.
    
    This is consistent with datasheet, USART0 also physically tested
    on SAME70J21 MCU.
    
    Signed-off-by: Michal Lenc <michall...@seznam.cz>
---
 arch/arm/include/samv7/chip.h | 8 ++++----
 arch/arm/src/samv7/Kconfig    | 4 ++++
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/samv7/chip.h b/arch/arm/include/samv7/chip.h
index ad40c113a57..726f263f667 100644
--- a/arch/arm/include/samv7/chip.h
+++ b/arch/arm/include/samv7/chip.h
@@ -183,8 +183,8 @@
 #  define SAMV7_NDAC12                1             /* 1 12-bit DAC channel */
 #  define SAMV7_NTCCH                 12            /* 12 Timer/counter 
channels */
 #  define SAMV7_NTCCHIO               3             /* 3 Timer/counter 
channels I/O */
-#  define SAMV7_NUSART                0             /* No USARTs */
-#  define SAMV7_NUART                 5             /* 5 UARTs */
+#  define SAMV7_NUSART                2             /* 2 USARTs */
+#  define SAMV7_NUART                 3             /* 3 UARTs */
 #  define SAMV7_NQSPI                 0             /* No Quad SPI */
 #  define SAMV7_NQSPI_SPI             1             /* QSPI functions in SPI 
mode only */
 #  define SAMV7_NSPI                  0             /* No SPI */
@@ -354,8 +354,8 @@
 #  define SAMV7_NDAC12                1             /* 1 12-bit DAC channels */
 #  define SAMV7_NTCCH                 12            /* 12 Timer/counter 
channels */
 #  define SAMV7_NTCCHIO               3             /* 3 Timer/counter 
channels I/O */
-#  define SAMV7_NUSART                0             /* No USARTs */
-#  define SAMV7_NUART                 5             /* 5 UARTs */
+#  define SAMV7_NUSART                2             /* 2 USARTs */
+#  define SAMV7_NUART                 3             /* 3 UARTs */
 #  define SAMV7_NQSPI                 0             /* No Quad SPI */
 #  define SAMV7_NQSPI_SPI             1             /* QSPI functions in SPI 
mode only */
 #  define SAMV7_NSPI                  0             /* No SPI */
diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig
index 4535f681d4a..72cf5326099 100644
--- a/arch/arm/src/samv7/Kconfig
+++ b/arch/arm/src/samv7/Kconfig
@@ -217,6 +217,8 @@ config ARCH_CHIP_SAME70J
        select SAMV7_QSPI_IS_SPI
        select SAMV7_HAVE_USBFS
        select SAMV7_HAVE_ISI8
+       select SAMV7_HAVE_USART0
+       select SAMV7_HAVE_USART1
 
 config ARCH_CHIP_SAMV71
        bool
@@ -269,6 +271,8 @@ config ARCH_CHIP_SAMV71J
        select SAMV7_QSPI_IS_SPI
        select SAMV7_HAVE_USBFS
        select SAMV7_HAVE_ISI8
+       select SAMV7_HAVE_USART0
+       select SAMV7_HAVE_USART1
 
 config ARCH_CHIP_PIC32CZCA70
        bool

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