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simbit18 pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 4c03284a7d5e40ddcc8557a60e11eeaf31dafb3c
Author: Eren Terzioglu <eren.terzio...@espressif.com>
AuthorDate: Wed Jul 30 12:57:24 2025 +0200
boards/risc-v/esp32c6: Add lpcore support
Add lpcore board support for esp32c6
Signed-off-by: Eren Terzioglu <eren.terzio...@espressif.com>
---
.../esp32c6/common/scripts/esp32c6_flat_memory.ld | 5 ++
.../common/scripts/esp32c6_lpcore_sections.ld | 84 ++++++++++++++++++++++
.../esp32c6/esp32c6-devkitc/configs/ulp/defconfig | 51 +++++++++++++
.../esp32c6/esp32c6-devkitc/src/esp32c6_bringup.c | 13 ++++
4 files changed, 153 insertions(+)
diff --git a/boards/risc-v/esp32c6/common/scripts/esp32c6_flat_memory.ld
b/boards/risc-v/esp32c6/common/scripts/esp32c6_flat_memory.ld
index bc6e20634b9..fecae9cdebc 100644
--- a/boards/risc-v/esp32c6/common/scripts/esp32c6_flat_memory.ld
+++ b/boards/risc-v/esp32c6/common/scripts/esp32c6_flat_memory.ld
@@ -141,9 +141,14 @@ MEMORY
drom_seg (R) : org = 0x42000000, len = IDRAM0_2_SEG_SIZE
#endif
+#if CONFIG_ESPRESSIF_USE_LP_CORE
+ lp_ram_seg(RW) : org = 0x50000000 +
CONFIG_ESPRESSIF_ULP_COPROC_RESERVE_MEM_SIZE,
+ len = 0x4000 -
CONFIG_ESPRESSIF_ULP_COPROC_RESERVE_MEM_SIZE - RESERVE_RTC_MEM
+#else
/* RTC fast memory (executable). Persists over deep sleep. */
lp_ram_seg (RWX) : org = 0x50000000, len = 0x4000 - RESERVE_RTC_MEM
+#endif /* CONFIG_ESPRESSIF_USE_LP_CORE */
/* We reduced the size of lp_ram_seg by RESERVE_RTC_MEM value.
* It reserves the amount of LP memory that we use for this memory segment.
diff --git a/boards/risc-v/esp32c6/common/scripts/esp32c6_lpcore_sections.ld
b/boards/risc-v/esp32c6/common/scripts/esp32c6_lpcore_sections.ld
new file mode 100644
index 00000000000..3447ddcfa40
--- /dev/null
+++ b/boards/risc-v/esp32c6/common/scripts/esp32c6_lpcore_sections.ld
@@ -0,0 +1,84 @@
+/****************************************************************************
+ * boards/risc-v/esp32c6/common/scripts/esp32c6_lpcore_sections.ld
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+ENTRY(reset_vector)
+
+MEMORY
+{
+ /*first 128byte for exception/interrupt vectors*/
+
+ vector_table(RX) : ORIGIN = (0x50000000) , LENGTH = 0x80
+ ram(RWX) : ORIGIN = (0x50000000) + 0x80, LENGTH =
(CONFIG_ESPRESSIF_ULP_COPROC_RESERVE_MEM_SIZE & ~(0x8 - 1)) - 0x80 -
CONFIG_ESPRESSIF_ULP_SHARED_MEM_SIZE
+ shared_mem_ram(RW) : ORIGIN = (0x50000000) +
(CONFIG_ESPRESSIF_ULP_COPROC_RESERVE_MEM_SIZE & ~(0x8 - 1)) -
CONFIG_ESPRESSIF_ULP_SHARED_MEM_SIZE, LENGTH =
CONFIG_ESPRESSIF_ULP_SHARED_MEM_SIZE
+}
+
+SECTIONS
+{
+ .vector.text :
+ {
+ /*exception/interrupt vectors*/
+ __mtvec_base = .;
+ KEEP (*(.init.vector .init.vector.*))
+ } > vector_table
+
+ . = ORIGIN(ram);
+
+ .text ALIGN(4):
+ {
+ *(.text.vectors) /* Default reset vector must link to offset 0x80 */
+ *(.text)
+ *(.text*)
+ } >ram
+
+ .rodata ALIGN(4):
+ {
+ *(.rodata)
+ *(.rodata*)
+ } > ram
+
+ .data ALIGN(4):
+ {
+ *(.data)
+ *(.data*)
+ *(.sdata)
+ *(.sdata*)
+ } > ram
+
+ .bss ALIGN(4) :
+ {
+ *(.bss)
+ *(.bss*)
+ *(.sbss)
+ *(.sbss*)
+ PROVIDE(end = .);
+ } >ram
+
+ __stack_top = ORIGIN(ram) + LENGTH(ram);
+
+ . = ORIGIN(shared_mem_ram);
+ .shared_mem (ALIGN(4)) :
+ {
+ KEEP(*(.shared_mem))
+ } > shared_mem_ram
+}
diff --git a/boards/risc-v/esp32c6/esp32c6-devkitc/configs/ulp/defconfig
b/boards/risc-v/esp32c6/esp32c6-devkitc/configs/ulp/defconfig
new file mode 100644
index 00000000000..7e5c5bf91c1
--- /dev/null
+++ b/boards/risc-v/esp32c6/esp32c6-devkitc/configs/ulp/defconfig
@@ -0,0 +1,51 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that
includes your
+# modifications.
+#
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="esp32c6-devkitc"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32C6_DEVKITC=y
+CONFIG_ARCH_CHIP="esp32c6"
+CONFIG_ARCH_CHIP_ESP32C6=y
+CONFIG_ARCH_CHIP_ESP32C6WROOM1=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_BUILTIN=y
+CONFIG_DEV_GPIO=y
+CONFIG_ESPRESSIF_ESP32C6=y
+CONFIG_ESPRESSIF_GPIO_IRQ=y
+CONFIG_ESPRESSIF_ULP_PROJECT_PATH="Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/ulp_blink.bin"
+CONFIG_ESPRESSIF_USE_LP_CORE=y
+CONFIG_FS_PROCFS=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=0
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=29
+CONFIG_START_MONTH=11
+CONFIG_START_YEAR=2019
+CONFIG_SYSTEM_DUMPSTACK=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TESTING_GETPRIME=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_UART0_SERIAL_CONSOLE=y
diff --git a/boards/risc-v/esp32c6/esp32c6-devkitc/src/esp32c6_bringup.c
b/boards/risc-v/esp32c6/esp32c6-devkitc/src/esp32c6_bringup.c
index 59b421d5d51..aa3a2d804d3 100644
--- a/boards/risc-v/esp32c6/esp32c6-devkitc/src/esp32c6_bringup.c
+++ b/boards/risc-v/esp32c6/esp32c6-devkitc/src/esp32c6_bringup.c
@@ -133,6 +133,10 @@
# include "esp_board_mmcsd.h"
#endif
+#ifdef CONFIG_ESPRESSIF_USE_LP_CORE
+# include "espressif/esp_ulp.h"
+#endif
+
#include "esp32c6-devkitc.h"
/****************************************************************************
@@ -499,6 +503,15 @@ int esp_bringup(void)
}
#endif
+#ifdef CONFIG_ESPRESSIF_USE_LP_CORE
+
+ /* ULP initialization should be the handled later than
+ * peripherals to use supported peripherals properly on ULP core
+ */
+
+ esp_ulp_init();
+#endif
+
/* If we got here then perhaps not all initialization was successful, but
* at least enough succeeded to bring-up NSH with perhaps reduced
* capabilities.
