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commit 3893350287ce41edcdc778ac3603971b616bf24e Author: Eren Terzioglu <[email protected]> AuthorDate: Thu Oct 23 11:14:53 2025 +0200 Documentation/xtensa/esp32s3: Add ULP RISCV coprocessor wakeup docs Add ULP RISCV coprocessor wakeup docs for esp32s3 Signed-off-by: Eren Terzioglu <[email protected]> --- .../platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst | 4 ++++ Documentation/platforms/xtensa/esp32s3/index.rst | 3 +++ 2 files changed, 7 insertions(+) diff --git a/Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst b/Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst index 4a6dd901b6f..2b3185ddb14 100644 --- a/Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst +++ b/Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst @@ -647,6 +647,10 @@ GPIO will be used and the logic level that will trigger it:: [ ] RTC_GPIO<N> (0) PM EXT1 Wakeup Trigger Mode +To enable ULP coprocessor wakeup ``CONFIG_PM_ULP_WAKEUP`` option needs to be enabled. +After that, ULP core can wake up HP core using ``ulp_riscv_wakeup_main_processor`` function +which needs to be called in the ULP app. + Before switching PM status, you need to query the current PM status:: nsh> pmconfig diff --git a/Documentation/platforms/xtensa/esp32s3/index.rst b/Documentation/platforms/xtensa/esp32s3/index.rst index 159c1c5210e..d54de739ba9 100644 --- a/Documentation/platforms/xtensa/esp32s3/index.rst +++ b/Documentation/platforms/xtensa/esp32s3/index.rst @@ -1004,6 +1004,9 @@ this example will demonstrate how to add ULP code into a custom application: } } + /* If HP core is in sleep, this call will wake the HP core up */ + + ulp_riscv_wakeup_main_processor(); return 0; }
