kywwilson11 commented on code in PR #17239: URL: https://github.com/apache/nuttx/pull/17239#discussion_r2460361497
########## arch/arm/src/stm32h5/stm32_pwm.h: ########## @@ -0,0 +1,1061 @@ +/**************************************************************************** + * arch/arm/src/stm32h5/stm32_pwm.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32H5_STM32_PWM_H +#define __ARCH_ARM_SRC_STM32H5_STM32_PWM_H + +/* The STM32 does not have dedicated PWM hardware. Rather, pulsed output + * control is a capability of the STM32 timers. The logic in this file + * implements the lower half of the standard, NuttX PWM interface using the + * STM32 timers. That interface is described in include/nuttx/timers/pwm.h. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <nuttx/timers/pwm.h> + +#include "chip.h" + +#ifdef CONFIG_STM32H5_PWM +# include <arch/board/board.h> +# include "hardware/stm32_tim.h" +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* Timer devices may be used for different purposes. One special purpose is + * to generate modulated outputs for such things as motor control. + * If CONFIG_STM32H5_TIMn is defined then the CONFIG_STM32H5_TIMn_PWM must + * also be defined to indicate that timer "n" is intended to be used for + * pulsed output signal generation. + */ + +#ifndef CONFIG_STM32H5_TIM1 +# undef CONFIG_STM32H5_TIM1_PWM +#endif +#ifndef CONFIG_STM32H5_TIM2 +# undef CONFIG_STM32H5_TIM2_PWM +#endif +#ifndef CONFIG_STM32H5_TIM3 +# undef CONFIG_STM32H5_TIM3_PWM +#endif +#ifndef CONFIG_STM32H5_TIM4 +# undef CONFIG_STM32H5_TIM4_PWM +#endif +#ifndef CONFIG_STM32H5_TIM5 +# undef CONFIG_STM32H5_TIM5_PWM +#endif +#ifndef CONFIG_STM32H5_TIM8 +# undef CONFIG_STM32H5_TIM8_PWM +#endif +#ifndef CONFIG_STM32H5_TIM12 +# undef CONFIG_STM32H5_TIM12_PWM +#endif +#ifndef CONFIG_STM32H5_TIM13 +# undef CONFIG_STM32H5_TIM13_PWM +#endif +#ifndef CONFIG_STM32H5_TIM14 +# undef CONFIG_STM32H5_TIM14_PWM +#endif +#ifndef CONFIG_STM32H5_TIM15 +# undef CONFIG_STM32H5_TIM15_PWM +#endif +#ifndef CONFIG_STM32H5_TIM16 +# undef CONFIG_STM32H5_TIM16_PWM +#endif +#ifndef CONFIG_STM32H5_TIM17 +# undef CONFIG_STM32H5_TIM17_PWM +#endif + +/* The basic timers (timer 6 and 7) are not capable of generating output + * pulses + */ + +#undef CONFIG_STM32H5_TIM6_PWM +#undef CONFIG_STM32H5_TIM7_PWM + +/* Check if PWM support for any channel is enabled. */ + +#ifdef CONFIG_STM32H5_PWM + +/* PWM driver channels configuration */ + +#ifdef CONFIG_STM32H5_PWM_MULTICHAN + +#ifdef CONFIG_STM32H5_TIM1_CHANNEL1 +# define PWM_TIM1_CHANNEL1 1 +#else +# define PWM_TIM1_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32H5_TIM1_CHANNEL2 +# define PWM_TIM1_CHANNEL2 1 +#else +# define PWM_TIM1_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32H5_TIM1_CHANNEL3 +# define PWM_TIM1_CHANNEL3 1 +#else +# define PWM_TIM1_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32H5_TIM1_CHANNEL4 +# define PWM_TIM1_CHANNEL4 1 +#else +# define PWM_TIM1_CHANNEL4 0 +#endif +#ifdef CONFIG_STM32H5_TIM1_CHANNEL5 +# define PWM_TIM1_CHANNEL5 1 +#else +# define PWM_TIM1_CHANNEL5 0 +#endif +#ifdef CONFIG_STM32H5_TIM1_CHANNEL6 +# define PWM_TIM1_CHANNEL6 1 +#else +# define PWM_TIM1_CHANNEL6 0 +#endif +#define PWM_TIM1_NCHANNELS (PWM_TIM1_CHANNEL1 + PWM_TIM1_CHANNEL2 + \ + PWM_TIM1_CHANNEL3 + PWM_TIM1_CHANNEL4 + \ + PWM_TIM1_CHANNEL5 + PWM_TIM1_CHANNEL6) + +#ifdef CONFIG_STM32H5_TIM2_CHANNEL1 +# define PWM_TIM2_CHANNEL1 1 +#else +# define PWM_TIM2_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32H5_TIM2_CHANNEL2 +# define PWM_TIM2_CHANNEL2 1 +#else +# define PWM_TIM2_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32H5_TIM2_CHANNEL3 +# define PWM_TIM2_CHANNEL3 1 +#else +# define PWM_TIM2_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32H5_TIM2_CHANNEL4 +# define PWM_TIM2_CHANNEL4 1 +#else +# define PWM_TIM2_CHANNEL4 0 +#endif +#define PWM_TIM2_NCHANNELS (PWM_TIM2_CHANNEL1 + PWM_TIM2_CHANNEL2 + \ + PWM_TIM2_CHANNEL3 + PWM_TIM2_CHANNEL4) + +#ifdef CONFIG_STM32H5_TIM3_CHANNEL1 +# define PWM_TIM3_CHANNEL1 1 +#else +# define PWM_TIM3_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32H5_TIM3_CHANNEL2 +# define PWM_TIM3_CHANNEL2 1 +#else +# define PWM_TIM3_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32H5_TIM3_CHANNEL3 +# define PWM_TIM3_CHANNEL3 1 +#else +# define PWM_TIM3_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32H5_TIM3_CHANNEL4 +# define PWM_TIM3_CHANNEL4 1 +#else +# define PWM_TIM3_CHANNEL4 0 +#endif +#define PWM_TIM3_NCHANNELS (PWM_TIM3_CHANNEL1 + PWM_TIM3_CHANNEL2 + \ + PWM_TIM3_CHANNEL3 + PWM_TIM3_CHANNEL4) + +#ifdef CONFIG_STM32H5_TIM4_CHANNEL1 +# define PWM_TIM4_CHANNEL1 1 +#else +# define PWM_TIM4_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32H5_TIM4_CHANNEL2 +# define PWM_TIM4_CHANNEL2 1 +#else +# define PWM_TIM4_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32H5_TIM4_CHANNEL3 +# define PWM_TIM4_CHANNEL3 1 +#else +# define PWM_TIM4_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32H5_TIM4_CHANNEL4 +# define PWM_TIM4_CHANNEL4 1 +#else +# define PWM_TIM4_CHANNEL4 0 +#endif +#define PWM_TIM4_NCHANNELS (PWM_TIM4_CHANNEL1 + PWM_TIM4_CHANNEL2 + \ + PWM_TIM4_CHANNEL3 + PWM_TIM4_CHANNEL4) + +#ifdef CONFIG_STM32H5_TIM5_CHANNEL1 +# define PWM_TIM5_CHANNEL1 1 +#else +# define PWM_TIM5_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32H5_TIM5_CHANNEL2 +# define PWM_TIM5_CHANNEL2 1 +#else +# define PWM_TIM5_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32H5_TIM5_CHANNEL3 +# define PWM_TIM5_CHANNEL3 1 +#else +# define PWM_TIM5_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32H5_TIM5_CHANNEL4 +# define PWM_TIM5_CHANNEL4 1 +#else +# define PWM_TIM5_CHANNEL4 0 +#endif +#define PWM_TIM5_NCHANNELS (PWM_TIM5_CHANNEL1 + PWM_TIM5_CHANNEL2 + \ + PWM_TIM5_CHANNEL3 + PWM_TIM5_CHANNEL4) + +#ifdef CONFIG_STM32H5_TIM8_CHANNEL1 +# define PWM_TIM8_CHANNEL1 1 +#else +# define PWM_TIM8_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32H5_TIM8_CHANNEL2 +# define PWM_TIM8_CHANNEL2 1 +#else +# define PWM_TIM8_CHANNEL2 0 +#endif +#ifdef CONFIG_STM32H5_TIM8_CHANNEL3 +# define PWM_TIM8_CHANNEL3 1 +#else +# define PWM_TIM8_CHANNEL3 0 +#endif +#ifdef CONFIG_STM32H5_TIM8_CHANNEL4 +# define PWM_TIM8_CHANNEL4 1 +#else +# define PWM_TIM8_CHANNEL4 0 +#endif +#ifdef CONFIG_STM32H5_TIM8_CHANNEL5 +# define PWM_TIM8_CHANNEL5 1 +#else +# define PWM_TIM8_CHANNEL5 0 +#endif +#ifdef CONFIG_STM32H5_TIM8_CHANNEL6 +# define PWM_TIM8_CHANNEL6 1 +#else +# define PWM_TIM8_CHANNEL6 0 +#endif +#define PWM_TIM8_NCHANNELS (PWM_TIM8_CHANNEL1 + PWM_TIM8_CHANNEL2 + \ + PWM_TIM8_CHANNEL3 + PWM_TIM8_CHANNEL4 + \ + PWM_TIM8_CHANNEL5 + PWM_TIM8_CHANNEL6) + +#ifdef CONFIG_STM32H5_TIM12_CHANNEL1 +# define PWM_TIM12_CHANNEL1 1 +#else +# define PWM_TIM12_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32H5_TIM12_CHANNEL2 +# define PWM_TIM12_CHANNEL2 1 +#else +# define PWM_TIM12_CHANNEL2 0 +#endif +#define PWM_TIM12_NCHANNELS (PWM_TIM12_CHANNEL1 + PWM_TIM12_CHANNEL2) + +#ifdef CONFIG_STM32H5_TIM13_CHANNEL1 +# define PWM_TIM13_CHANNEL1 1 +#else +# define PWM_TIM13_CHANNEL1 0 +#endif +#define PWM_TIM13_NCHANNELS (PWM_TIM13_CHANNEL1) + +#ifdef CONFIG_STM32H5_TIM14_CHANNEL1 +# define PWM_TIM14_CHANNEL1 1 +#else +# define PWM_TIM14_CHANNEL1 0 +#endif +#define PWM_TIM14_NCHANNELS (PWM_TIM14_CHANNEL1) + +#ifdef CONFIG_STM32H5_TIM15_CHANNEL1 +# define PWM_TIM15_CHANNEL1 1 +#else +# define PWM_TIM15_CHANNEL1 0 +#endif +#ifdef CONFIG_STM32H5_TIM15_CHANNEL2 +# define PWM_TIM15_CHANNEL2 1 +#else +# define PWM_TIM15_CHANNEL2 0 +#endif +#define PWM_TIM15_NCHANNELS (PWM_TIM15_CHANNEL1 + PWM_TIM15_CHANNEL2) + +#ifdef CONFIG_STM32H5_TIM16_CHANNEL1 +# define PWM_TIM16_CHANNEL1 1 +#else +# define PWM_TIM16_CHANNEL1 0 +#endif +#define PWM_TIM16_NCHANNELS PWM_TIM16_CHANNEL1 + +#ifdef CONFIG_STM32H5_TIM17_CHANNEL1 +# define PWM_TIM17_CHANNEL1 1 +#else +# define PWM_TIM17_CHANNEL1 0 +#endif +#define PWM_TIM17_NCHANNELS PWM_TIM17_CHANNEL1 + +#else /* !CONFIG_PWM_MULTICHAN */ + +/* For each timer that is enabled for PWM usage, we need the following + * additional configuration settings: + * + * CONFIG_STM32H5_TIMx_CHANNEL - Specifies the timer output channel + * {1,..,4} + * PWM_TIMx_CHn - One of the values defined in chip/stm32*_pinmap.h. + * In the case where there are multiple pin selections, the correct + * setting must be provided in the arch/board/board.h file. + * + * NOTE: + * The STM32 timers are each capable of generating different signals on + * each of the four channels with different duty cycles. That capability + * is not supported by this driver: Only one output channel per timer. + */ + +#ifdef CONFIG_STM32H5_TIM1_PWM +# if !defined(CONFIG_STM32H5_TIM1_CHANNEL) +# error "CONFIG_STM32H5_TIM1_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM1_CHANNEL == 1 +# define CONFIG_STM32H5_TIM1_CHANNEL1 1 +# define CONFIG_STM32H5_TIM1_CH1MODE CONFIG_STM32H5_TIM1_CHMODE +# elif CONFIG_STM32H5_TIM1_CHANNEL == 2 +# define CONFIG_STM32H5_TIM1_CHANNEL2 1 +# define CONFIG_STM32H5_TIM1_CH2MODE CONFIG_STM32H5_TIM1_CHMODE +# elif CONFIG_STM32H5_TIM1_CHANNEL == 3 +# define CONFIG_STM32H5_TIM1_CHANNEL3 1 +# define CONFIG_STM32H5_TIM1_CH3MODE CONFIG_STM32H5_TIM1_CHMODE +# elif CONFIG_STM32H5_TIM1_CHANNEL == 4 +# define CONFIG_STM32H5_TIM1_CHANNEL4 1 +# define CONFIG_STM32H5_TIM1_CH4MODE CONFIG_STM32H5_TIM1_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM1_CHANNEL" +# endif +# define PWM_TIM1_NCHANNELS 1 +#endif + +#ifdef CONFIG_STM32H5_TIM2_PWM +# if !defined(CONFIG_STM32H5_TIM2_CHANNEL) +# error "CONFIG_STM32H5_TIM2_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM2_CHANNEL == 1 +# define CONFIG_STM32H5_TIM2_CHANNEL1 1 +# define CONFIG_STM32H5_TIM2_CH1MODE CONFIG_STM32H5_TIM2_CHMODE +# elif CONFIG_STM32H5_TIM2_CHANNEL == 2 +# define CONFIG_STM32H5_TIM2_CHANNEL2 1 +# define CONFIG_STM32H5_TIM2_CH2MODE CONFIG_STM32H5_TIM2_CHMODE +# elif CONFIG_STM32H5_TIM2_CHANNEL == 3 +# define CONFIG_STM32H5_TIM2_CHANNEL3 1 +# define CONFIG_STM32H5_TIM2_CH3MODE CONFIG_STM32H5_TIM2_CHMODE +# elif CONFIG_STM32H5_TIM2_CHANNEL == 4 +# define CONFIG_STM32H5_TIM2_CHANNEL4 1 +# define CONFIG_STM32H5_TIM2_CH4MODE CONFIG_STM32H5_TIM2_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM2_CHANNEL" +# endif +# define PWM_TIM2_NCHANNELS 1 +#endif + +#ifdef CONFIG_STM32H5_TIM3_PWM +# if !defined(CONFIG_STM32H5_TIM3_CHANNEL) +# error "CONFIG_STM32H5_TIM3_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM3_CHANNEL == 1 +# define CONFIG_STM32H5_TIM3_CHANNEL1 1 +# define CONFIG_STM32H5_TIM3_CH1MODE CONFIG_STM32H5_TIM3_CHMODE +# elif CONFIG_STM32H5_TIM3_CHANNEL == 2 +# define CONFIG_STM32H5_TIM3_CHANNEL2 1 +# define CONFIG_STM32H5_TIM3_CH2MODE CONFIG_STM32H5_TIM3_CHMODE +# elif CONFIG_STM32H5_TIM3_CHANNEL == 3 +# define CONFIG_STM32H5_TIM3_CHANNEL3 1 +# define CONFIG_STM32H5_TIM3_CH3MODE CONFIG_STM32H5_TIM3_CHMODE +# elif CONFIG_STM32H5_TIM3_CHANNEL == 4 +# define CONFIG_STM32H5_TIM3_CHANNEL4 1 +# define CONFIG_STM32H5_TIM3_CH4MODE CONFIG_STM32H5_TIM3_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM3_CHANNEL" +# endif +# define PWM_TIM3_NCHANNELS 1 +#endif + +#ifdef CONFIG_STM32H5_TIM4_PWM +# if !defined(CONFIG_STM32H5_TIM4_CHANNEL) +# error "CONFIG_STM32H5_TIM4_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM4_CHANNEL == 1 +# define CONFIG_STM32H5_TIM4_CHANNEL1 1 +# define CONFIG_STM32H5_TIM4_CH1MODE CONFIG_STM32H5_TIM4_CHMODE +# elif CONFIG_STM32H5_TIM4_CHANNEL == 2 +# define CONFIG_STM32H5_TIM4_CHANNEL2 1 +# define CONFIG_STM32H5_TIM4_CH2MODE CONFIG_STM32H5_TIM4_CHMODE +# elif CONFIG_STM32H5_TIM4_CHANNEL == 3 +# define CONFIG_STM32H5_TIM4_CHANNEL3 1 +# define CONFIG_STM32H5_TIM4_CH3MODE CONFIG_STM32H5_TIM4_CHMODE +# elif CONFIG_STM32H5_TIM4_CHANNEL == 4 +# define CONFIG_STM32H5_TIM4_CHANNEL4 1 +# define CONFIG_STM32H5_TIM4_CH4MODE CONFIG_STM32H5_TIM4_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM4_CHANNEL" +# endif +# define PWM_TIM4_NCHANNELS 1 +#endif + +#ifdef CONFIG_STM32H5_TIM5_PWM +# if !defined(CONFIG_STM32H5_TIM5_CHANNEL) +# error "CONFIG_STM32H5_TIM5_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM5_CHANNEL == 1 +# define CONFIG_STM32H5_TIM5_CHANNEL1 1 +# define CONFIG_STM32H5_TIM5_CH1MODE CONFIG_STM32H5_TIM5_CHMODE +# elif CONFIG_STM32H5_TIM5_CHANNEL == 2 +# define CONFIG_STM32H5_TIM5_CHANNEL2 1 +# define CONFIG_STM32H5_TIM5_CH2MODE CONFIG_STM32H5_TIM5_CHMODE +# elif CONFIG_STM32H5_TIM5_CHANNEL == 3 +# define CONFIG_STM32H5_TIM5_CHANNEL3 1 +# define CONFIG_STM32H5_TIM5_CH3MODE CONFIG_STM32H5_TIM5_CHMODE +# elif CONFIG_STM32H5_TIM5_CHANNEL == 4 +# define CONFIG_STM32H5_TIM5_CHANNEL4 1 +# define CONFIG_STM32H5_TIM5_CH4MODE CONFIG_STM32H5_TIM5_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM5_CHANNEL" +# endif +# define PWM_TIM5_NCHANNELS 1 +#endif + +#ifdef CONFIG_STM32H5_TIM8_PWM +# if !defined(CONFIG_STM32H5_TIM8_CHANNEL) +# error "CONFIG_STM32H5_TIM8_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM8_CHANNEL == 1 +# define CONFIG_STM32H5_TIM8_CHANNEL1 1 +# define CONFIG_STM32H5_TIM8_CH1MODE CONFIG_STM32H5_TIM8_CHMODE +# elif CONFIG_STM32H5_TIM8_CHANNEL == 2 +# define CONFIG_STM32H5_TIM8_CHANNEL2 1 +# define CONFIG_STM32H5_TIM8_CH2MODE CONFIG_STM32H5_TIM8_CHMODE +# elif CONFIG_STM32H5_TIM8_CHANNEL == 3 +# define CONFIG_STM32H5_TIM8_CHANNEL3 1 +# define CONFIG_STM32H5_TIM8_CH3MODE CONFIG_STM32H5_TIM8_CHMODE +# elif CONFIG_STM32H5_TIM8_CHANNEL == 4 +# define CONFIG_STM32H5_TIM8_CHANNEL4 1 +# define CONFIG_STM32H5_TIM8_CH4MODE CONFIG_STM32H5_TIM8_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM8_CHANNEL" +# endif +# define PWM_TIM8_NCHANNELS 1 +#endif + +#ifdef CONFIG_STM32H5_TIM12_PWM +# if !defined(CONFIG_STM32H5_TIM12_CHANNEL) +# error "CONFIG_STM32H5_TIM12_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM12_CHANNEL == 1 +# define CONFIG_STM32H5_TIM12_CHANNEL1 1 +# define CONFIG_STM32H5_TIM12_CH1MODE CONFIG_STM32H5_TIM12_CHMODE +# elif CONFIG_STM32H5_TIM12_CHANNEL == 2 +# define CONFIG_STM32H5_TIM12_CHANNEL2 1 +# define CONFIG_STM32H5_TIM12_CH2MODE CONFIG_STM32H5_TIM12_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM12_CHANNEL" +# endif +# define PWM_TIM12_NCHANNELS 1 +#endif + +#ifdef CONFIG_STM32H5_TIM13_PWM +# if !defined(CONFIG_STM32H5_TIM13_CHANNEL) +# error "CONFIG_STM32H5_TIM13_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM13_CHANNEL == 1 +# define CONFIG_STM32H5_TIM13_CHANNEL1 1 +# define CONFIG_STM32H5_TIM13_CH1MODE CONFIG_STM32H5_TIM13_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM13_CHANNEL" +# endif +# define PWM_TIM13_NCHANNELS 1 +#endif + +#ifdef CONFIG_STM32H5_TIM14_PWM +# if !defined(CONFIG_STM32H5_TIM14_CHANNEL) +# error "CONFIG_STM32H5_TIM14_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM14_CHANNEL == 1 +# define CONFIG_STM32H5_TIM14_CHANNEL1 1 +# define CONFIG_STM32H5_TIM14_CH1MODE CONFIG_STM32H5_TIM14_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM14_CHANNEL" +# endif +# define PWM_TIM14_NCHANNELS 1 +#endif + +#ifdef CONFIG_STM32H5_TIM15_PWM +# if !defined(CONFIG_STM32H5_TIM15_CHANNEL) +# error "CONFIG_STM32H5_TIM15_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM15_CHANNEL == 1 +# define CONFIG_STM32H5_TIM15_CHANNEL1 1 +# define CONFIG_STM32H5_TIM15_CH1MODE CONFIG_STM32H5_TIM15_CHMODE +# elif CONFIG_STM32H5_TIM15_CHANNEL == 2 +# define CONFIG_STM32H5_TIM15_CHANNEL2 1 +# define CONFIG_STM32H5_TIM15_CH2MODE CONFIG_STM32H5_TIM15_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM15_CHANNEL" +# endif +# define PWM_TIM15_NCHANNELS 1 +#endif + +#ifdef CONFIG_STM32H5_TIM16_PWM +# if !defined(CONFIG_STM32H5_TIM16_CHANNEL) +# error "CONFIG_STM32H5_TIM16_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM16_CHANNEL == 1 +# define CONFIG_STM32H5_TIM16_CHANNEL1 1 +# define CONFIG_STM32H5_TIM16_CH1MODE CONFIG_STM32H5_TIM16_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM16_CHANNEL" +# endif +# define PWM_TIM16_NCHANNELS 1 +#endif + +#ifdef CONFIG_STM32H5_TIM17_PWM +# if !defined(CONFIG_STM32H5_TIM17_CHANNEL) +# error "CONFIG_STM32H5_TIM17_CHANNEL must be provided" +# elif CONFIG_STM32H5_TIM17_CHANNEL == 1 +# define CONFIG_STM32H5_TIM17_CHANNEL1 1 +# define CONFIG_STM32H5_TIM17_CH1MODE CONFIG_STM32H5_TIM17_CHMODE +# else +# error "Unsupported value of CONFIG_STM32H5_TIM17_CHANNEL" +# endif +# define PWM_TIM17_NCHANNELS 1 +#endif + +#endif /* CONFIG_STM32H5_PWM_MULTICHAN */ + +#ifdef CONFIG_STM32H5_TIM1_CH1OUT +# define PWM_TIM1_CH1CFG GPIO_TIM1_CH1OUT +#else +# define PWM_TIM1_CH1CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM1_CH1NOUT +# define PWM_TIM1_CH1NCFG GPIO_TIM1_CH1NOUT +#else +# define PWM_TIM1_CH1NCFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM1_CH2OUT +# define PWM_TIM1_CH2CFG GPIO_TIM1_CH2OUT +#else +# define PWM_TIM1_CH2CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM1_CH2NOUT +# define PWM_TIM1_CH2NCFG GPIO_TIM1_CH2NOUT +#else +# define PWM_TIM1_CH2NCFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM1_CH3OUT +# define PWM_TIM1_CH3CFG GPIO_TIM1_CH3OUT +#else +# define PWM_TIM1_CH3CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM1_CH3NOUT +# define PWM_TIM1_CH3NCFG GPIO_TIM1_CH3NOUT +#else +# define PWM_TIM1_CH3NCFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM1_CH4OUT +# define PWM_TIM1_CH4CFG GPIO_TIM1_CH4OUT +#else +# define PWM_TIM1_CH4CFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM2_CH1OUT +# define PWM_TIM2_CH1CFG GPIO_TIM2_CH1OUT +#else +# define PWM_TIM2_CH1CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM2_CH2OUT +# define PWM_TIM2_CH2CFG GPIO_TIM2_CH2OUT +#else +# define PWM_TIM2_CH2CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM2_CH3OUT +# define PWM_TIM2_CH3CFG GPIO_TIM2_CH3OUT +#else +# define PWM_TIM2_CH3CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM2_CH4OUT +# define PWM_TIM2_CH4CFG GPIO_TIM2_CH4OUT +#else +# define PWM_TIM2_CH4CFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM3_CH1OUT +# define PWM_TIM3_CH1CFG GPIO_TIM3_CH1OUT +#else +# define PWM_TIM3_CH1CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM3_CH2OUT +# define PWM_TIM3_CH2CFG GPIO_TIM3_CH2OUT +#else +# define PWM_TIM3_CH2CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM3_CH3OUT +# define PWM_TIM3_CH3CFG GPIO_TIM3_CH3OUT +#else +# define PWM_TIM3_CH3CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM3_CH4OUT +# define PWM_TIM3_CH4CFG GPIO_TIM3_CH4OUT +#else +# define PWM_TIM3_CH4CFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM4_CH1OUT +# define PWM_TIM4_CH1CFG GPIO_TIM4_CH1OUT +#else +# define PWM_TIM4_CH1CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM4_CH2OUT +# define PWM_TIM4_CH2CFG GPIO_TIM4_CH2OUT +#else +# define PWM_TIM4_CH2CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM4_CH3OUT +# define PWM_TIM4_CH3CFG GPIO_TIM4_CH3OUT +#else +# define PWM_TIM4_CH3CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM4_CH4OUT +# define PWM_TIM4_CH4CFG GPIO_TIM4_CH4OUT +#else +# define PWM_TIM4_CH4CFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM5_CH1OUT +# define PWM_TIM5_CH1CFG GPIO_TIM5_CH1OUT +#else +# define PWM_TIM5_CH1CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM5_CH2OUT +# define PWM_TIM5_CH2CFG GPIO_TIM5_CH2OUT +#else +# define PWM_TIM5_CH2CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM5_CH3OUT +# define PWM_TIM5_CH3CFG GPIO_TIM5_CH3OUT +#else +# define PWM_TIM5_CH3CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM5_CH4OUT +# define PWM_TIM5_CH4CFG GPIO_TIM5_CH4OUT +#else +# define PWM_TIM5_CH4CFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM8_CH1OUT +# define PWM_TIM8_CH1CFG GPIO_TIM8_CH1OUT +#else +# define PWM_TIM8_CH1CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM8_CH1NOUT +# define PWM_TIM8_CH1NCFG GPIO_TIM8_CH1NOUT +#else +# define PWM_TIM8_CH1NCFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM8_CH2OUT +# define PWM_TIM8_CH2CFG GPIO_TIM8_CH2OUT +#else +# define PWM_TIM8_CH2CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM8_CH2NOUT +# define PWM_TIM8_CH2NCFG GPIO_TIM8_CH2NOUT +#else +# define PWM_TIM8_CH2NCFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM8_CH3OUT +# define PWM_TIM8_CH3CFG GPIO_TIM8_CH3OUT +#else +# define PWM_TIM8_CH3CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM8_CH3NOUT +# define PWM_TIM8_CH3NCFG GPIO_TIM8_CH3NOUT +#else +# define PWM_TIM8_CH3NCFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM8_CH4OUT +# define PWM_TIM8_CH4CFG GPIO_TIM8_CH4OUT +#else +# define PWM_TIM8_CH4CFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM12_CH1OUT +# define PWM_TIM12_CH1CFG GPIO_TIM12_CH1OUT +#else +# define PWM_TIM12_CH1CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM12_CH2OUT +# define PWM_TIM12_CH2CFG GPIO_TIM12_CH2OUT +#else +# define PWM_TIM12_CH2CFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM13_CH1OUT +# define PWM_TIM13_CH1CFG GPIO_TIM13_CH1OUT +#else +# define PWM_TIM13_CH1CFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM14_CH1OUT +# define PWM_TIM14_CH1CFG GPIO_TIM14_CH1OUT +#else +# define PWM_TIM14_CH1CFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM15_CH1OUT +# define PWM_TIM15_CH1CFG GPIO_TIM15_CH1OUT +#else +# define PWM_TIM15_CH1CFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM15_CH1NOUT +# define PWM_TIM15_CH1NCFG GPIO_TIM15_CH1NOUT +#else +# define PWM_TIM15_CH1NCFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM15_CH2OUT +# define PWM_TIM15_CH2CFG GPIO_TIM15_CH2OUT +#else +# define PWM_TIM15_CH2CFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM16_CH1OUT +# define PWM_TIM16_CH1CFG GPIO_TIM16_CH1OUT +#else +# define PWM_TIM16_CH1CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM16_CH1NOUT +# define PWM_TIM16_CH1NCFG GPIO_TIM16_CH1NOUT +#else +# define PWM_TIM16_CH1NCFG 0 +#endif + +#ifdef CONFIG_STM32H5_TIM17_CH1OUT +# define PWM_TIM17_CH1CFG GPIO_TIM17_CH1OUT +#else +# define PWM_TIM17_CH1CFG 0 +#endif +#ifdef CONFIG_STM32H5_TIM17_CH1NOUT +# define PWM_TIM17_CH1NCFG GPIO_TIM17_CH1NOUT +#else +# define PWM_TIM17_CH1NCFG 0 +#endif + +/* Complementary outputs support */ + +#if defined(CONFIG_STM32H5_TIM1_CH1NOUT) || defined(CONFIG_STM32H5_TIM1_CH2NOUT) || \ + defined(CONFIG_STM32H5_TIM1_CH3NOUT) +# define HAVE_TIM1_COMPLEMENTARY +#endif +#if defined(CONFIG_STM32H5_TIM8_CH1NOUT) || defined(CONFIG_STM32H5_TIM8_CH2NOUT) || \ + defined(CONFIG_STM32H5_TIM8_CH3NOUT) +# define HAVE_TIM8_COMPLEMENTARY +#endif +#if defined(CONFIG_STM32H5_TIM15_CH1NOUT) +# define HAVE_TIM15_COMPLEMENTARY +#endif +#if defined(CONFIG_STM32H5_TIM16_CH1NOUT) +# define HAVE_TIM16_COMPLEMENTARY +#endif +#if defined(CONFIG_STM32H5_TIM17_CH1NOUT) +# define HAVE_TIM17_COMPLEMENTARY +#endif +#if defined(HAVE_TIM1_COMPLEMENTARY) || defined(HAVE_TIM8_COMPLEMENTARY) || \ + defined(HAVE_TIM15_COMPLEMENTARY) || defined(HAVE_TIM16_COMPLEMENTARY) || \ + defined(HAVE_TIM17_COMPLEMENTARY) +# define HAVE_PWM_COMPLEMENTARY +#endif + +/* Low-level ops helpers ****************************************************/ + +#ifdef CONFIG_STM32H5_PWM_LL_OPS + +/* NOTE: + * low-level ops accept pwm_lowerhalf_s as first argument, but llops access + * can be found in stm32_pwm_dev_s + */ + +#define PWM_SETUP(dev) \ + (dev)->ops->setup((struct pwm_lowerhalf_s *)dev) +#define PWM_SHUTDOWN(dev) \ + (dev)->ops->shutdown((struct pwm_lowerhalf_s *)dev) +#define PWM_CCR_UPDATE(dev, index, ccr) \ + (dev)->llops->ccr_update((struct pwm_lowerhalf_s *)dev, index, ccr) +#define PWM_MODE_UPDATE(dev, index, mode) \ + (dev)->llops->mode_update((struct pwm_lowerhalf_s *)dev, index, mode) Review Comment: I understand what you are saying. But I haven’t seen STM32 families share common headers like that, and there are still enough family-specific differences (like TIMERS_V2 features and optional ops) that a shared file could get messy. I’d rather keep it local to the STM32H5 for now and revisit a common header later if more families end up using the same pattern and do that on a separate commit. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
