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The following commit(s) were added to refs/heads/master by this push:
     new aff64bb3dcb arm64: add demo for gdbstub
aff64bb3dcb is described below

commit aff64bb3dcbc2a80aedc9ba8594c740496d1048f
Author: hujun5 <[email protected]>
AuthorDate: Sun Jan 26 19:12:18 2025 +0800

    arm64: add demo for gdbstub
    
    Gdbstub demo::
       The Qemu version must be above 9.2 to support two serial ports.
    
       One window:
       ./tools/configure.sh qemu-armv8a:gdbstub; make -j25
       qemu-system-aarch64 -cpu cortex-a53 -nographic -machine 
virt,virtualization=on,gic-version=3 -net none -kernel ./nuttx -serial 
mon:stdio -serial pty
       char device redirected to /dev/pts/27 (label serial1)
       - Ready to Boot Primary CPU
       - Boot from EL2
       - Boot from EL1
       - Boot to C runtime for OS Initialize
    
       Another window:
       gdb-multiarch nuttx -ex "target remot /dev/pts/27"
       GNU gdb (Ubuntu 15.0.50.20240403-0ubuntu1) 15.0.50.20240403-git
       Copyright (C) 2024 Free Software Foundation, Inc.
       License GPLv3+: GNU GPL version 3 or later 
<http://gnu.org/licenses/gpl.html>
       This is free software: you are free to change and redistribute it.
       There is NO WARRANTY, to the extent permitted by law.
       Type "show copying" and "show warranty" for details.
       This GDB was configured as "x86_64-linux-gnu".
       Type "show configuration" for configuration details.
       For bug reporting instructions, please see:
       <https://www.gnu.org/software/gdb/bugs/>.
       Find the GDB manual and other documentation resources online at:
       <http://www.gnu.org/software/gdb/documentation/>.
    
       For help, type "help".
       Type "apropos word" to search for commands related to "word"...
       Reading symbols from nuttx...
       Remote debugging using /dev/pts/26
       gdb_get_registers (state=0x403e1590) at gdbstub/lib_gdbstub.c:1020
       1020              reg = state->running_regs;
       (gdb) c
    
    Signed-off-by: hujun5 <[email protected]>
---
 .../arm64/qemu/boards/qemu-armv8a/index.rst        | 39 ++++++++++
 arch/arm64/include/irq.h                           |  2 +-
 arch/arm64/src/common/Make.defs                    |  1 +
 .../qemu/qemu-armv8a/configs/gdbstub/defconfig     | 84 ++++++++++++++++++++++
 4 files changed, 125 insertions(+), 1 deletion(-)

diff --git a/Documentation/platforms/arm64/qemu/boards/qemu-armv8a/index.rst 
b/Documentation/platforms/arm64/qemu/boards/qemu-armv8a/index.rst
index caf25a6af58..2966720638d 100644
--- a/Documentation/platforms/arm64/qemu/boards/qemu-armv8a/index.rst
+++ b/Documentation/platforms/arm64/qemu/boards/qemu-armv8a/index.rst
@@ -865,6 +865,44 @@ SMP Support
    IMX6 use GPT which is a SPI rather than generic timer to handle timer
    interrupt
 
+Gdbstub demo
+============
+The Qemu version must be above 9.2 to support two serial ports.
+
+One window::
+
+  $ ./tools/configure.sh qemu-armv8a:gdbstub; make -j25
+  $ qemu-system-aarch64 -cpu cortex-a53 -nographic -machine 
virt,virtualization=on,gic-version=3 -net none -kernel ./nuttx -serial 
mon:stdio -serial pty
+  char device redirected to /dev/pts/27 (label serial1)
+  - Ready to Boot Primary CPU
+  - Boot from EL2
+  - Boot from EL1
+  - Boot to C runtime for OS Initialize
+
+Another window::
+
+  $ gdb-multiarch nuttx -ex "target remote /dev/pts/27"
+  GNU gdb (Ubuntu 15.0.50.20240403-0ubuntu1) 15.0.50.20240403-git
+  Copyright (C) 2024 Free Software Foundation, Inc.
+  License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
+  This is free software: you are free to change and redistribute it.
+  There is NO WARRANTY, to the extent permitted by law.
+  Type "show copying" and "show warranty" for details.
+  This GDB was configured as "x86_64-linux-gnu".
+  Type "show configuration" for configuration details.
+  For bug reporting instructions, please see:
+  <https://www.gnu.org/software/gdb/bugs/>.
+  Find the GDB manual and other documentation resources online at:
+  <http://www.gnu.org/software/gdb/documentation/>.
+
+  For help, type "help".
+  Type "apropos word" to search for commands related to "word"...
+  Reading symbols from nuttx...
+  Remote debugging using /dev/pts/26
+  gdb_get_registers (state=0x403e1590) at gdbstub/lib_gdbstub.c:1020
+  1020              reg = state->running_regs;
+  (gdb) c
+
 References
 ==========
 
@@ -876,3 +914,4 @@ References
 6. Arm Generic Interrupt Controller v3 and v4 Overview
 7. ArmĀ® Generic Interrupt Controller Architecture Specification GIC 
architecture version 3 and version 4
 8. (DEN0022D.b) Arm Power State Coordination Interface Platform Design Document
+
diff --git a/arch/arm64/include/irq.h b/arch/arm64/include/irq.h
index 0ca3f5c24e2..696b8c17755 100644
--- a/arch/arm64/include/irq.h
+++ b/arch/arm64/include/irq.h
@@ -466,7 +466,7 @@ static inline_function void up_irq_restore(irqstate_t flags)
  ****************************************************************************/
 
 #define up_getusrpc(regs) \
-    (((uintptr_t *)((regs) ? (regs) : running_regs()))[REG_ELR])
+    (((uintptr_t *)((regs) ? (regs) : (uint64_t *)running_regs()))[REG_ELR])
 
 #ifndef CONFIG_BUILD_KERNEL
 #  define up_getusrsp(regs) \
diff --git a/arch/arm64/src/common/Make.defs b/arch/arm64/src/common/Make.defs
index 8a6328af1e3..2d8b1759e55 100644
--- a/arch/arm64/src/common/Make.defs
+++ b/arch/arm64/src/common/Make.defs
@@ -48,6 +48,7 @@ CMN_CSRCS += arm64_arch_timer.c arm64_cache.c
 CMN_CSRCS += arm64_doirq.c arm64_fatal.c
 CMN_CSRCS += arm64_syscall.c
 CMN_CSRCS += arm64_modifyreg8.c arm64_modifyreg16.c arm64_modifyreg32.c
+CMN_CSRCS += arm64_hwdebug.c
 
 # Use common heap allocation for now (may need to be customized later)
 CMN_CSRCS += arm64_allocateheap.c
diff --git a/boards/arm64/qemu/qemu-armv8a/configs/gdbstub/defconfig 
b/boards/arm64/qemu/qemu-armv8a/configs/gdbstub/defconfig
new file mode 100644
index 00000000000..e94702a6eb4
--- /dev/null
+++ b/boards/arm64/qemu/qemu-armv8a/configs/gdbstub/defconfig
@@ -0,0 +1,84 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+CONFIG_ARCH="arm64"
+CONFIG_ARCH_ARM64=y
+CONFIG_ARCH_BOARD="qemu-armv8a"
+CONFIG_ARCH_BOARD_QEMU_ARMV8A=y
+CONFIG_ARCH_CHIP="qemu"
+CONFIG_ARCH_CHIP_QEMU=y
+CONFIG_ARCH_CHIP_QEMU_A53=y
+CONFIG_ARCH_EARLY_PRINT=y
+CONFIG_ARCH_INTERRUPTSTACK=4096
+CONFIG_ARM64_SEMIHOSTING_HOSTFS=y
+CONFIG_ARM64_SEMIHOSTING_HOSTFS_CACHE_COHERENCE=y
+CONFIG_ARM64_STRING_FUNCTION=y
+CONFIG_BOARD_MEMORY_RANGE="{0x40000000,0x48000000,0x7}"
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_ASSERTIONS=y
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SCHED=y
+CONFIG_DEBUG_SCHED_ERROR=y
+CONFIG_DEBUG_SCHED_WARN=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEFAULT_TASK_STACKSIZE=8192
+CONFIG_DEVICE_TREE=y
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_FRAME_POINTER=y
+CONFIG_FS_HOSTFS=y
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+CONFIG_FS_ROMFS=y
+CONFIG_FS_TMPFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_IDLETHREAD_STACKSIZE=8192
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_EXECFUNCS=y
+CONFIG_LIBC_MEMFD_ERROR=y
+CONFIG_LIB_GDBSTUB=y
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_PROFILE_ALL=y
+CONFIG_PROFILE_MINI=y
+CONFIG_PTHREAD_STACK_MIN=8192
+CONFIG_RAMLOG=y
+CONFIG_RAM_SIZE=134217728
+CONFIG_RAM_START=0x40000000
+CONFIG_RAW_BINARY=y
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SERIAL_GDBSTUB=y
+CONFIG_SERIAL_GDBSTUB_AUTO_ATTACH=y
+CONFIG_SPINLOCK=y
+CONFIG_STACK_COLORATION=y
+CONFIG_START_MONTH=3
+CONFIG_START_YEAR=2022
+CONFIG_SYMTAB_ORDEREDBYNAME=y
+CONFIG_SYSTEM_GPROF=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_SYSTEM=y
+CONFIG_SYSTEM_TIME64=y
+CONFIG_TESTING_GETPRIME=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_UART0_BASE=0x9000000
+CONFIG_UART0_IRQ=33
+CONFIG_UART0_PL011=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+CONFIG_UART1_BASE=0x9040000
+CONFIG_UART1_IRQ=40
+CONFIG_UART1_PL011=y
+CONFIG_UART_PL011=y
+CONFIG_USEC_PER_TICK=1000

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