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The following commit(s) were added to refs/heads/master by this push:
new f1506c6212c fiq: fix some FIQ config in arm64/armv7-r/armv8-r
f1506c6212c is described below
commit f1506c6212c37f26472b40f9ac9158d65002c02f
Author: hujun5 <[email protected]>
AuthorDate: Thu Feb 27 19:59:21 2025 +0800
fiq: fix some FIQ config in arm64/armv7-r/armv8-r
1. up_irq_save should not mask fiq if CONFIG_ARCH_HIPRI_INTERRUPT=y
2. up_irq_save should mask fiq if CONFIG_ARCH_TRUSTZONE_SECURE=y
3. up_irq_save should mask irq if CONFIG_ARCH_TRUSTZONE_SECURE=n
4. add up_secure_irq in arm64
5. add ARCH_HAVE_TRUSTZONE support for ARCH_CORTEX_R82
Signed-off-by: hujun5 <[email protected]>
---
arch/arm/include/armv7-r/irq.h | 12 ++++++++----
arch/arm/include/armv8-r/irq.h | 10 +++++++---
arch/arm64/Kconfig | 1 +
arch/arm64/include/irq.h | 20 ++++++++++++++------
arch/arm64/src/common/arm64_gicv3.c | 29 +++++++++++++++++++++++++++++
arch/arm64/src/common/arm64_vectors.S | 2 +-
6 files changed, 60 insertions(+), 14 deletions(-)
diff --git a/arch/arm/include/armv7-r/irq.h b/arch/arm/include/armv7-r/irq.h
index 6f24c77c292..d25064c9ed8 100644
--- a/arch/arm/include/armv7-r/irq.h
+++ b/arch/arm/include/armv7-r/irq.h
@@ -366,9 +366,10 @@ noinstrument_function static inline_function irqstate_t
up_irq_save(void)
__asm__ __volatile__
(
"\tmrs %0, cpsr\n"
- "\tcpsid i\n"
-#if defined(CONFIG_ARMV7R_DECODEFIQ)
+#ifdef CONFIG_ARCH_TRUSTZONE_SECURE
"\tcpsid f\n"
+#else
+ "\tcpsid i\n"
#endif
: "=r" (cpsr)
:
@@ -387,9 +388,12 @@ static inline_function irqstate_t up_irq_enable(void)
__asm__ __volatile__
(
"\tmrs %0, cpsr\n"
- "\tcpsie i\n"
-#if defined(CONFIG_ARMV7R_DECODEFIQ)
+#if defined(CONFIG_ARCH_HIPRI_INTERRUPT)
+ "\tcpsie if\n"
+#elif defined(CONFIG_ARCH_TRUSTZONE_SECURE)
"\tcpsie f\n"
+#else
+ "\tcpsie i\n"
#endif
: "=r" (cpsr)
:
diff --git a/arch/arm/include/armv8-r/irq.h b/arch/arm/include/armv8-r/irq.h
index 8c2deef1622..e08636f1e71 100644
--- a/arch/arm/include/armv8-r/irq.h
+++ b/arch/arm/include/armv8-r/irq.h
@@ -366,9 +366,10 @@ noinstrument_function static inline_function irqstate_t
up_irq_save(void)
__asm__ __volatile__
(
"\tmrs %0, cpsr\n"
- "\tcpsid i\n"
-#if defined(CONFIG_ARCH_HIPRI_INTERRUPT)
+#ifdef CONFIG_ARCH_TRUSTZONE_SECURE
"\tcpsid f\n"
+#else
+ "\tcpsid i\n"
#endif
: "=r" (cpsr)
:
@@ -387,9 +388,12 @@ static inline_function irqstate_t up_irq_enable(void)
__asm__ __volatile__
(
"\tmrs %0, cpsr\n"
- "\tcpsie i\n"
#if defined(CONFIG_ARCH_HIPRI_INTERRUPT)
+ "\tcpsie if\n"
+#elif defined(CONFIG_ARCH_TRUSTZONE_SECURE)
"\tcpsie f\n"
+#else
+ "\tcpsie i\n"
#endif
: "=r" (cpsr)
:
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 9b2a4d69057..51f28f74d97 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -332,6 +332,7 @@ config ARCH_CORTEX_R82
bool
default n
select ARCH_ARMV8R
+ select ARCH_HAVE_TRUSTZONE
select ARCH_DCACHE
select ARCH_ICACHE
select ARCH_HAVE_MPU
diff --git a/arch/arm64/include/irq.h b/arch/arm64/include/irq.h
index 696b8c17755..773097ff06d 100644
--- a/arch/arm64/include/irq.h
+++ b/arch/arm64/include/irq.h
@@ -237,13 +237,11 @@
#define REG_FP REG_X29
#define REG_LR REG_X30
-#ifdef CONFIG_ARM64_DECODEFIQ
-# define IRQ_DAIF_MASK (3)
-#else
-# define IRQ_DAIF_MASK (2)
-#endif
+#define FIQ_DAIF_MASK (1)
+#define IRQ_DAIF_MASK (2)
+#define IRQ_FIQ_DAIF_MASK (FIQ_DAIF_MASK | IRQ_DAIF_MASK)
-#define IRQ_SPSR_MASK (IRQ_DAIF_MASK << 6)
+#define IRQ_SPSR_MASK (IRQ_DAIF_MASK << 6)
#ifndef __ASSEMBLY__
@@ -352,7 +350,11 @@ static inline_function irqstate_t up_irq_save(void)
"mrs %0, daif\n"
"msr daifset, %1\n"
: "=r" (flags)
+#if defined(CONFIG_ARCH_TRUSTZONE_SECURE)
+ : "i" (FIQ_DAIF_MASK)
+#else
: "i" (IRQ_DAIF_MASK)
+#endif
: "memory"
);
@@ -370,7 +372,13 @@ static inline_function irqstate_t up_irq_enable(void)
"mrs %0, daif\n"
"msr daifclr, %1\n"
: "=r" (flags)
+#if defined(CONFIG_ARCH_HIPRI_INTERRUPT)
+ : "i" (IRQ_FIQ_DAIF_MASK)
+#elif defined(CONFIG_ARCH_TRUSTZONE_SECURE)
+ : "i" (FIQ_DAIF_MASK)
+#else
: "i" (IRQ_DAIF_MASK)
+#endif
: "memory"
);
return flags;
diff --git a/arch/arm64/src/common/arm64_gicv3.c
b/arch/arm64/src/common/arm64_gicv3.c
index 321986fe02e..ad3bd40b74b 100644
--- a/arch/arm64/src/common/arm64_gicv3.c
+++ b/arch/arm64/src/common/arm64_gicv3.c
@@ -746,6 +746,35 @@ void up_disable_irq(int irq)
arm64_gic_irq_disable(irq);
}
+/***************************************************************************
+ * Name: up_set_secure_irq
+ *
+ * Description:
+ * Secure an IRQ
+ *
+ ***************************************************************************/
+
+#if defined(CONFIG_ARCH_TRUSTZONE_SECURE) ||
defined(CONFIG_ARCH_HIPRI_INTERRUPT)
+void up_secure_irq(int irq, bool secure)
+{
+ uint32_t mask = BIT(irq & (GIC_NUM_INTR_PER_REG - 1));
+ uint32_t idx = irq / GIC_NUM_INTR_PER_REG;
+ unsigned long base = GET_DIST_BASE(irq);
+ unsigned int val = getreg32(IGROUPR(base, idx));
+
+ if (secure)
+ {
+ val &= (~mask); /* group 0 fiq */
+ }
+ else
+ {
+ val |= mask; /* group 1 irq */
+ }
+
+ putreg32(val, IGROUPR(base, idx));
+}
+#endif
+
/***************************************************************************
* Name: up_prioritize_irq
*
diff --git a/arch/arm64/src/common/arm64_vectors.S
b/arch/arm64/src/common/arm64_vectors.S
index bf913ef200a..e94fafc5050 100644
--- a/arch/arm64/src/common/arm64_vectors.S
+++ b/arch/arm64/src/common/arm64_vectors.S
@@ -310,7 +310,7 @@ SECTION_FUNC(text, arm64_fiq_handler)
* with interrupts disabled
*/
- bl arm64_decodeirq
+ bl arm64_decodefiq
mov sp, x0
b arm64_exit_exception
