jlaitine commented on issue #17315: URL: https://github.com/apache/nuttx/issues/17315#issuecomment-3528466529
Yes, I believe it is exactly like that. This is my current understanding of the watchdogs: The MPFS has got 5 watchdogs. The WDT0 can reset the whole MSS, so that is usable even if running NuttX standalone on any hart even without mss or any support implemented on E51. Other four, 1-4 can interrupt the E51 core only. MPFS TRM is in here: https://ww1.microchip.com/downloads/aemDocuments/documents/FPGA/ProductDocuments/ReferenceManuals/PolarFire_SoC_FPGA_MSS_Technical_Reference_Manual_VC.pdf It is not very detailed, but there you can find link to register maps (it is a downloadable zip containing HTML pages) and to some other resources. I never wrote WDT support for MPFS, but it is great to get one ! Just add the WDT module base addresses into mpfs_memorymap.h, and another header for the wdog describing the register contents. Some AI can quickly generate the file from the register map htmls, just check it carefully afterwards). Or, just copy the relevant addresses/offsets from HSS: ``` include/mpfs_reg_map.h: #define WDOG0_LO_BASE_ADDR (0x20001000u) #define WDOG1_LO_BASE_ADDR (0x20101000u) #define WDOG2_LO_BASE_ADDR (0x20103000u) #define WDOG3_LO_BASE_ADDR (0x20105000u) #define WDOG4_LO_BASE_ADDR (0x20107000u) .... ``` And then just start tinkering :) -Jukka -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
