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The following commit(s) were added to refs/heads/master by this push:
     new 946bd2b36e7 boards/risc-v/esp32c3: add Waveshare ESP32-C3-Zero
946bd2b36e7 is described below

commit 946bd2b36e7790fcc33b4151b937a2ac3a095661
Author: simbit18 <[email protected]>
AuthorDate: Mon Dec 15 17:08:00 2025 +0100

    boards/risc-v/esp32c3: add Waveshare ESP32-C3-Zero
    
    - Add initial support for Waveshare ESP32-C3-Zero.
    
    Signed-off-by: simbit18 <[email protected]>
---
 .../esp32c3/boards/esp32-c3-zero/ESP32-C3-Zero.jpg | Bin 0 -> 19861 bytes
 .../risc-v/esp32c3/boards/esp32-c3-zero/index.rst  | 285 +++++++++++
 boards/Kconfig                                     |  13 +
 .../esp32c3/common/include/esp_board_bmp280.h      |  76 +++
 boards/risc-v/esp32c3/common/src/Make.defs         |   4 +
 .../risc-v/esp32c3/common/src/esp_board_bmp280.c   |  94 ++++
 boards/risc-v/esp32c3/esp32-c3-zero/Kconfig        |   8 +
 .../esp32c3/esp32-c3-zero/configs/jumbo/defconfig  |  61 +++
 .../esp32c3/esp32-c3-zero/configs/nsh/defconfig    |  45 ++
 .../esp32-c3-zero/configs/sta_softap/defconfig     |  83 +++
 .../esp32c3/esp32-c3-zero/configs/usbnsh/defconfig |  45 ++
 .../esp32c3/esp32-c3-zero/configs/wifi/defconfig   |  79 +++
 .../risc-v/esp32c3/esp32-c3-zero/include/board.h   |  41 ++
 .../risc-v/esp32c3/esp32-c3-zero/scripts/Make.defs |  61 +++
 boards/risc-v/esp32c3/esp32-c3-zero/src/Make.defs  |  45 ++
 .../esp32c3/esp32-c3-zero/src/esp32-c3-zero.h      | 121 +++++
 .../esp32c3/esp32-c3-zero/src/esp32c3_appinit.c    |  83 +++
 .../esp32c3/esp32-c3-zero/src/esp32c3_boot.c       |  89 ++++
 .../esp32c3/esp32-c3-zero/src/esp32c3_bringup.c    | 492 ++++++++++++++++++
 .../esp32c3/esp32-c3-zero/src/esp32c3_buttons.c    | 200 ++++++++
 .../esp32c3/esp32-c3-zero/src/esp32c3_gpio.c       | 558 +++++++++++++++++++++
 .../esp32c3/esp32-c3-zero/src/esp32c3_reset.c      |  83 +++
 22 files changed, 2566 insertions(+)

diff --git 
a/Documentation/platforms/risc-v/esp32c3/boards/esp32-c3-zero/ESP32-C3-Zero.jpg 
b/Documentation/platforms/risc-v/esp32c3/boards/esp32-c3-zero/ESP32-C3-Zero.jpg
new file mode 100644
index 00000000000..e5f18825445
Binary files /dev/null and 
b/Documentation/platforms/risc-v/esp32c3/boards/esp32-c3-zero/ESP32-C3-Zero.jpg 
differ
diff --git 
a/Documentation/platforms/risc-v/esp32c3/boards/esp32-c3-zero/index.rst 
b/Documentation/platforms/risc-v/esp32c3/boards/esp32-c3-zero/index.rst
new file mode 100644
index 00000000000..6f3905877bd
--- /dev/null
+++ b/Documentation/platforms/risc-v/esp32c3/boards/esp32-c3-zero/index.rst
@@ -0,0 +1,285 @@
+===============================
+Waveshare ESP32-C3-Zero
+===============================
+
+.. tags:: chip:ESP32-C3
+
+The `Waveshare ESP32-C3-Zero <https://www.waveshare.com/wiki/ESP32-C3-Zero>`_ 
is a compact development board supplied by Waveshare.
+
+.. figure:: ESP32-C3-Zero.jpg
+   :align: center
+
+Features
+========
+
+* Low-power RISC-V 32-bit Single-core processor, up to 160MHz main frequency.
+* Supports 2.4GHz Wi-Fi (802.11 b/g/n) and Bluetooth® 5 (LE).
+* 400KB SRAM, 384KB ROM and built-in 4MB flash memory.
+* 15 multi-function GPIO pins.
+* 3× SPI, 1× I2C, 2× UART, 1× I2S, 2× ADC.
+* Onboard WS2812 RGB led.
+* Compact SMD ceramic antenna.
+* Ultra-compact size: 23.5 × 18 mm
+
+Buttons and LEDs
+================
+
+There are two buttons labeled BOOT and RESET.
+The BOOT button is connected to GPIO9. On reset it is used as a strapping pin 
to determine whether the chip boots normally or into the serial bootloader. 
After reset, however, the BOOT button can be used for software input.
+
+WS2812 LED is connected to GPIO10 and is available for software.
+
+Pin Mapping
+===========
+
+Pads numbered anticlockwise from USB connector.
+
+===== ========== ==========
+Pad   Signal     Notes
+===== ========== ==========
+1     5V         +5V Supply to board
+2     GND        Ground
+3     3V3        Power output to peripherals
+4     GPIO0
+5     GPIO1
+6     GPIO2
+7     GPIO3
+8     GPIO4      SCK (bit-banging)
+9     GPIO5      MISO (bit-banging)
+10    GPIO6      MOSI (bit-banging)
+11    GPIO7      CSn (bit-banging)
+12    GPIO8      SCL (bit-banging)
+13    GPIO9      SDA (bit-banging)
+14    GPIO10     To connect with WS2812 RGB LED
+15    GPIO18     USB_D+
+16    GPIO19     USB_D-
+17    GPIO20     Default RX for UART0 serial console
+18    GPIO21     Default TX for UART0 serial console
+===== ========== ==========
+
+.. note:: The Waveshare ESP32-C3-Zero does not have dedicated I2C and SPI pins.
+   However, you can implement software-based I2C or SPI (bit-banging) using 
any available GPIO pins.
+
+
+Power Supply
+============
+
+There are two mutually exclusive ways to provide power to the board:
+
+* USB Type-C Port
+
+* supplying via VIN (5V) pin (3.3–6 V) and GND pin headers
+
+
+
+Installation & Build
+====================
+
+For instructions on how to to install the build dependencies and create a NuttX
+image for this board, consult the main :doc:`ESP32-C3 documentation
+<../../index>`.
+
+Serial Console
+==============
+
+A **USB Serial Adapter** is required to run NuttX on ESP32-C3-Zero with UART0 
serial console.
+
+Connect the USB Serial Adapter to ESP32-C3-Zero Serial Console at:
+
+.. list-table:: USB Serial connections
+   :widths: auto
+   :header-rows: 1
+
+   * - USB Serial
+     - ESP32-C3-Zero Pin
+   * - GND
+     - GND (Pin 2)
+   * - RX
+     - GPIO21 (UART0 TX) (Pin 18)
+   * - TX
+     - GPIO20 (UART0 RX) (Pin 17)
+
+A USB serial adapter with **+3.3V TTL level** UART signals is required.
+
+Connect ESP32-C3-Zero to our computer with the USB Serial Adapter.
+On our computer, start a Serial Terminal and connect to the USB Serial Port
+at **115200 bps**.
+
+NuttX will appear in the Serial Console when it boots on ESP32-C3-Zero.
+
+Configurations
+==============
+
+All configurations listed below can be configured using the following command 
in
+the ``nuttx`` directory (again, consult the main :doc:`ESP32-C3 documentation
+<../../index>`):
+
+.. code:: console
+
+   $ ./tools/configure.sh esp32-c3-zero:<config_name>
+
+where <config_name> is the name of board configuration you want to use, i.e.: 
nsh, usbnsh, wifi...
+
+.. list-table:: Build System
+   :widths: auto
+   :header-rows: 1
+
+   * - Build System
+     - Support
+   * - Make
+     - Yes
+   * - CMake
+     - No
+
+.. code:: console
+
+   $ make flash ESPTOOL_PORT=/dev/ttyUSB0 -j
+
+Then use a serial console terminal like ``picocom`` configured to **115200 
8N1**.
+
+jumbo
+----------
+
+This configuration enables many Apache NuttX features (console enabled in 
UART0, at **115200** bps).
+This is mostly to help provide additional code coverage in CI, but also allows 
for a users
+to see a wide range of features that are supported by the OS.
+
+
+**I2C**
+
+The I2C Tool can be used to scan and manipulate I2C devices.
+You can scan for all I2C devices using the following command::
+
+    nsh> i2c dev -b 3 00 77
+    NOTE: Some devices may not appear with this scan.
+    You may also try a scan with the -z flag to discover more devices using a 
zero-byte write request.
+         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
+    00: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
+    10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
+    20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
+    30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
+    40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
+    50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
+    60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
+    70: -- -- -- -- -- -- 76 --
+    nsh>
+
+.. tip:: Please refer to :doc:`I2C Tool </applications/system/i2c/index>`
+  for more information.
+
+**SPI**
+
+The SPI Tool provides a way to debug SPI related problems.
+You can test it by connecting MOSI and MISO pins which are GPIO6 and GPIO5
+by default to each other and running the ``spi`` example::
+
+    nsh> spi exch -b 3 "AB"
+    Sending:   AB
+    Received:  AB
+
+.. tip:: Please refer to :doc:`SPI Tool </applications/system/spi/index>`
+  for more information.
+
+**bmp280**
+
+You can check that the Bosch BMP280 sensor over I2C is working by using the 
:doc:`bmp280 </applications/examples/bmp280/index>` application:
+
+.. list-table:: BMP280 connections
+   :widths: auto
+   :header-rows: 1
+
+   * - BMP280
+     - ESP32-C3-Zero Pin
+   * - VCC
+     - 3V3 OUT (Pin 3)
+   * - GND
+     - GND (Pin 2)
+   * - SCL
+     - GPIO8 (SCL) (Pin 12)
+   * - SDA
+     - GPIO9 (SDA) (Pin 13)
+
+.. code-block:: console
+
+   nsh> bmp280
+   Absolute pressure [hPa] = 1003.359985
+   Temperature [C] = 18.969999
+
+**sensortest**
+
+You can check that the Bosch BMP280 sensor over I2C is working by using the 
``sensortest`` application:
+
+.. code-block:: console
+
+    nsh> sensortest -n 10 baro0
+    SensorTest: Test /dev/uorb/sensor_baro0 with interval(1000000us), 
latency(0us)
+    baro0: timestamp:3449690000 value1:1023.23 value2:19.75
+    baro0: timestamp:3449690000 value1:1023.23 value2:19.75
+    baro0: timestamp:3449690000 value1:1023.23 value2:19.75
+    baro0: timestamp:3449690000 value1:1023.23 value2:19.75
+    baro0: timestamp:3449690000 value1:1023.23 value2:19.75
+    baro0: timestamp:3449700000 value1:1023.23 value2:19.75
+    baro0: timestamp:3449700000 value1:1023.23 value2:19.75
+    baro0: timestamp:3449710000 value1:1022.82 value2:19.86
+    baro0: timestamp:3449710000 value1:1022.82 value2:19.86
+    baro0: timestamp:3449720000 value1:1022.82 value2:19.86
+    SensorTest: Received message: baro0, number:10/10
+    nsh>
+
+nsh
+---
+
+Basic configuration that runs NuttShell (console enabled in UART0, at **115200 
bps**).
+This configuration is focused on low level, command-line driver testing.
+Built-in applications are supported, but none are enabled.
+
+.. tip:: Please refer to :doc:`NuttShell (NSH) </applications/nsh/index>`
+  for more information.
+
+sta_softap
+----------
+
+With this configuration you can run these commands to be able
+to connect your smartphone or laptop to your board::
+
+  nsh> ifup wlan1
+  nsh> dhcpd_start wlan1
+  nsh> wapi psk wlan1 mypasswd 3
+  nsh> wapi essid wlan1 nuttxap 1
+
+In this case, you are creating the access point ``nuttxapp`` in your board and 
to
+connect to it on your smartphone you will be required to type the password 
``mypasswd``
+using WPA2.
+
+.. tip:: Please refer to :ref:`ESP32 Wi-Fi SoftAP Mode <esp32_wi-fi_softap>`
+  for more information.
+
+The ``dhcpd_start`` is necessary to let your board to associate an IP to your 
smartphone.
+
+usbnsh
+------
+
+Basic NuttShell configuration using CDC/ACM serial (console enabled in USB 
Port, at **115200 bps**).
+This is another NSH example. If differs from other ‘nsh’ configurations in 
that this configurations
+uses a USB serial device for console I/O.
+
+wifi
+----
+
+Enables Wi-Fi support. You can define your credentials this way::
+
+    $ make menuconfig
+    -> Application Configuration
+        -> Network Utilities
+            -> Network initialization (NETUTILS_NETINIT [=y])
+                -> WAPI Configuration
+
+Or if you don't want to keep it saved in the firmware you can do it
+at runtime::
+
+    nsh> wapi psk wlan0 mypasswd 3
+    nsh> wapi essid wlan0 myssid 1
+    nsh> renew wlan0
+
+.. tip:: Please refer to :ref:`ESP32 Wi-Fi Station Mode <esp32_wi-fi_sta>`
+  for more information.
diff --git a/boards/Kconfig b/boards/Kconfig
index 04e8d823a48..b9c76f80693 100644
--- a/boards/Kconfig
+++ b/boards/Kconfig
@@ -438,6 +438,15 @@ config ARCH_BOARD_ESP32C3_XIAO
                The XIAO-ESP32C3 from Seeed Studio features the ESP32-C3 CPU 
with a RISC-V core,
                supporting IEEE 802.11 b/g/n WiFi, and Bluetooth 5 (BLE) 
protocols.
 
+config ARCH_BOARD_ESP32_C3_ZERO
+       bool "Waveshare ESP32-C3-Zero"
+       depends on ARCH_CHIP_ESP32C3
+       select ARCH_HAVE_BUTTONS
+       select ARCH_HAVE_IRQBUTTONS
+       ---help---
+               The ESP32-C3-Zero from Waveshare features the ESP32-C3 CPU with 
a RISC-V core,
+               supporting IEEE 802.11 b/g/n WiFi, and Bluetooth 5 (BLE) 
protocols.
+
 config ARCH_BOARD_ESP32S2_KALUGA_1
        bool "Espressif ESP32-S2-Kaluga-1 V1.3"
        depends on ARCH_CHIP_ESP32S2WROVER
@@ -3537,6 +3546,7 @@ config ARCH_BOARD
        default "esp32c3-legacy-devkit-rust-1" if 
ARCH_BOARD_ESP32C3_LEGACY_DEVKIT_RUST1
        default "esp32c3-legacy-devkit"        if 
ARCH_BOARD_ESP32C3_LEGACY_DEVKIT
        default "esp32c3-xiao"                 if ARCH_BOARD_ESP32C3_XIAO
+       default "esp32-c3-zero"                if ARCH_BOARD_ESP32_C3_ZERO
        default "esp32s2-kaluga-1"             if ARCH_BOARD_ESP32S2_KALUGA_1
        default "esp32s2-saola-1"              if ARCH_BOARD_ESP32S2_SAOLA_1
        default "franzininho-wifi"             if ARCH_BOARD_FRANZININHO_WIFI
@@ -4793,6 +4803,9 @@ endif
 if ARCH_BOARD_ESP32C3_XIAO
 source "boards/risc-v/esp32c3/esp32c3-xiao/Kconfig"
 endif
+if ARCH_BOARD_ESP32_C3_ZERO
+source "boards/risc-v/esp32c3/esp32-c3-zero/Kconfig"
+endif
 if ARCH_BOARD_ESP32S2_KALUGA_1
 source "boards/xtensa/esp32s2/esp32s2-kaluga-1/Kconfig"
 endif
diff --git a/boards/risc-v/esp32c3/common/include/esp_board_bmp280.h 
b/boards/risc-v/esp32c3/common/include/esp_board_bmp280.h
new file mode 100644
index 00000000000..8ead77a14e4
--- /dev/null
+++ b/boards/risc-v/esp32c3/common/include/esp_board_bmp280.h
@@ -0,0 +1,76 @@
+/****************************************************************************
+ * boards/risc-v/esp32c3/common/include/esp_board_bmp280.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_RISCV_ESP32C3_COMMON_INCLUDE_ESP_BOARD_BMP280_H
+#define __BOARDS_RISCV_ESP32C3_COMMON_INCLUDE_ESP_BOARD_BMP280_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_bmp280_initialize
+ *
+ * Description:
+ *   Initialize and register the BMP280 Pressure Sensor driver.
+ *
+ * Input Parameters:
+ *   devno - The device number, used to build the device path as /dev/pressN
+ *
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SENSORS_BMP280
+int board_bmp280_initialize(int devno);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_RISCV_ESP32C3_COMMON_INCLUDE_ESP_BOARD_BMP280_H */
diff --git a/boards/risc-v/esp32c3/common/src/Make.defs 
b/boards/risc-v/esp32c3/common/src/Make.defs
index c5b84dea7e1..03d09271575 100644
--- a/boards/risc-v/esp32c3/common/src/Make.defs
+++ b/boards/risc-v/esp32c3/common/src/Make.defs
@@ -70,6 +70,10 @@ ifeq ($(CONFIG_SENSORS_BMP180),y)
   CSRCS += esp_board_bmp180.c
 endif
 
+ifeq ($(CONFIG_SENSORS_BMP280),y)
+  CSRCS += esp_board_bmp280.c
+endif
+
 ifeq ($(CONFIG_MMCSD_SPI),y)
   CSRCS += esp_board_mmcsd.c
 endif
diff --git a/boards/risc-v/esp32c3/common/src/esp_board_bmp280.c 
b/boards/risc-v/esp32c3/common/src/esp_board_bmp280.c
new file mode 100644
index 00000000000..6aa1a9f77fd
--- /dev/null
+++ b/boards/risc-v/esp32c3/common/src/esp_board_bmp280.c
@@ -0,0 +1,94 @@
+/****************************************************************************
+ * boards/risc-v/esp32c3/common/src/esp_board_bmp280.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdio.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/sensors/bmp280.h>
+#include <nuttx/i2c/i2c_master.h>
+
+#ifndef CONFIG_ESPRESSIF_I2C_BITBANG
+#include "espressif/esp_i2c.h"
+#else
+#include "espressif/esp_i2c_bitbang.h"
+#endif
+
+#include "esp_board_bmp280.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_bmp280_initialize
+ *
+ * Description:
+ *   Initialize and register the BMP280 Pressure Sensor driver.
+ *
+ * Input Parameters:
+ *   devno - The device number, used to build the device path as /dev/pressN
+ *
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int board_bmp280_initialize(int devno)
+{
+  struct i2c_master_s *i2c;
+  int ret;
+
+  sninfo("Initializing BMP280!\n");
+
+  /* Initialize I2C */
+
+#ifndef CONFIG_ESPRESSIF_I2C_BITBANG
+  i2c = esp_i2cbus_initialize(ESPRESSIF_I2C0);
+#else
+  i2c = esp_i2cbus_bitbang_initialize();
+#endif
+
+  if (i2c)
+    {
+      /* Then try to register the barometer sensor in I2C0 */
+
+      ret = bmp280_register(devno, i2c);
+      if (ret < 0)
+        {
+          snerr("ERROR: Error registering BMP280 in I2C0\n");
+        }
+    }
+  else
+    {
+      ret = -ENODEV;
+    }
+
+  return ret;
+}
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/Kconfig 
b/boards/risc-v/esp32c3/esp32-c3-zero/Kconfig
new file mode 100644
index 00000000000..70d6283b7ce
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/Kconfig
@@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_ESP32_C3_ZERO
+
+endif # ARCH_BOARD_ESP32_C3_ZERO
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/configs/jumbo/defconfig 
b/boards/risc-v/esp32c3/esp32-c3-zero/configs/jumbo/defconfig
new file mode 100644
index 00000000000..03bd912777d
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/configs/jumbo/defconfig
@@ -0,0 +1,61 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="esp32-c3-zero"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32_C3_ZERO=y
+CONFIG_ARCH_CHIP="esp32c3"
+CONFIG_ARCH_CHIP_ESP32C3=y
+CONFIG_ARCH_INTERRUPTSTACK=1536
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_BUILTIN=y
+CONFIG_ESPRESSIF_GPIO_IRQ=y
+CONFIG_ESPRESSIF_I2C_BITBANG=y
+CONFIG_ESPRESSIF_I2C_BITBANG_SCLPIN=9
+CONFIG_ESPRESSIF_I2C_BITBANG_SDAPIN=8
+CONFIG_ESPRESSIF_SPI_BITBANG=y
+CONFIG_ESPRESSIF_SPI_BITBANG_CLKPIN=4
+CONFIG_ESPRESSIF_SPI_BITBANG_CSPIN=7
+CONFIG_ESPRESSIF_SPI_BITBANG_MISOPIN=5
+CONFIG_ESPRESSIF_SPI_BITBANG_MOSIPIN=6
+CONFIG_EXAMPLES_BMP280=y
+CONFIG_FS_PROCFS=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_FLOATINGPOINT=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=0
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_SENSORS=y
+CONFIG_SENSORS_BMP280=y
+CONFIG_START_DAY=29
+CONFIG_START_MONTH=11
+CONFIG_START_YEAR=2019
+CONFIG_SYSTEM_DUMPSTACK=y
+CONFIG_SYSTEM_I2CTOOL=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_SENSORTEST=y
+CONFIG_SYSTEM_SPITOOL=y
+CONFIG_TESTING_GETPRIME=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_UART0_SERIAL_CONSOLE=y
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/configs/nsh/defconfig 
b/boards/risc-v/esp32c3/esp32-c3-zero/configs/nsh/defconfig
new file mode 100644
index 00000000000..2f4aead1ae1
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/configs/nsh/defconfig
@@ -0,0 +1,45 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="esp32-c3-zero"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32_C3_ZERO=y
+CONFIG_ARCH_CHIP="esp32c3"
+CONFIG_ARCH_CHIP_ESP32C3=y
+CONFIG_ARCH_INTERRUPTSTACK=1536
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_BUILTIN=y
+CONFIG_FS_PROCFS=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=0
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=29
+CONFIG_START_MONTH=11
+CONFIG_START_YEAR=2019
+CONFIG_SYSTEM_DUMPSTACK=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TESTING_GETPRIME=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_UART0_SERIAL_CONSOLE=y
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/configs/sta_softap/defconfig 
b/boards/risc-v/esp32c3/esp32-c3-zero/configs/sta_softap/defconfig
new file mode 100644
index 00000000000..2df8690ad99
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/configs/sta_softap/defconfig
@@ -0,0 +1,83 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+# CONFIG_NDEBUG is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ALLOW_BSD_COMPONENTS=y
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="esp32-c3-zero"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32_C3_ZERO=y
+CONFIG_ARCH_CHIP="esp32c3"
+CONFIG_ARCH_CHIP_ESP32C3=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_BUILTIN=y
+CONFIG_DRIVERS_IEEE80211=y
+CONFIG_DRIVERS_WIRELESS=y
+CONFIG_ESPRESSIF_SPIFLASH=y
+CONFIG_ESPRESSIF_SPIFLASH_SPIFFS=y
+CONFIG_ESPRESSIF_WIFI=y
+CONFIG_ESPRESSIF_WIFI_STATION_SOFTAP=y
+CONFIG_EXAMPLES_DHCPD=y
+CONFIG_EXAMPLES_RANDOM=y
+CONFIG_FS_PROCFS=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=8192
+CONFIG_INTELHEX_BINARY=y
+CONFIG_IOB_BUFSIZE=128
+CONFIG_IOB_NBUFFERS=160
+CONFIG_IOB_THROTTLE=24
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDEV_LATEINIT=y
+CONFIG_NETDEV_PHY_IOCTL=y
+CONFIG_NETDEV_WIRELESS_IOCTL=y
+CONFIG_NETUTILS_CJSON=y
+CONFIG_NETUTILS_DHCPD=y
+CONFIG_NETUTILS_IPERF=y
+CONFIG_NET_BROADCAST=y
+CONFIG_NET_ETH_PKTSIZE=1514
+CONFIG_NET_ICMP_SOCKET=y
+CONFIG_NET_TCP=y
+CONFIG_NET_TCP_DELAYED_ACK=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
+CONFIG_NET_UDP=y
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=0
+CONFIG_PTHREAD_MUTEX_TYPES=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_SIG_DEFAULT=y
+CONFIG_START_DAY=29
+CONFIG_START_MONTH=11
+CONFIG_START_YEAR=2019
+CONFIG_SYSTEM_DHCPC_RENEW=y
+CONFIG_SYSTEM_DUMPSTACK=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_PING=y
+CONFIG_TESTING_GETPRIME=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_TLS_TASK_NELEM=4
+CONFIG_UART0_SERIAL_CONSOLE=y
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_WAPI=y
+CONFIG_WIRELESS_WAPI_CMDTOOL=y
+CONFIG_WIRELESS_WAPI_INITCONF=y
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/configs/usbnsh/defconfig 
b/boards/risc-v/esp32c3/esp32-c3-zero/configs/usbnsh/defconfig
new file mode 100644
index 00000000000..87358fe3d2c
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/configs/usbnsh/defconfig
@@ -0,0 +1,45 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+# CONFIG_ESPRESSIF_UART0 is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="esp32-c3-zero"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32_C3_ZERO=y
+CONFIG_ARCH_CHIP="esp32c3"
+CONFIG_ARCH_CHIP_ESP32C3=y
+CONFIG_ARCH_INTERRUPTSTACK=1536
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_BUILTIN=y
+CONFIG_ESPRESSIF_USBSERIAL=y
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_FS_PROCFS=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=0
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=29
+CONFIG_START_MONTH=11
+CONFIG_START_YEAR=2019
+CONFIG_SYSTEM_DUMPSTACK=y
+CONFIG_SYSTEM_NSH=y
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/configs/wifi/defconfig 
b/boards/risc-v/esp32c3/esp32-c3-zero/configs/wifi/defconfig
new file mode 100644
index 00000000000..0180fb99d06
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/configs/wifi/defconfig
@@ -0,0 +1,79 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed 
.config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that 
includes your
+# modifications.
+#
+# CONFIG_NDEBUG is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+CONFIG_ALLOW_BSD_COMPONENTS=y
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="esp32-c3-zero"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_ESP32_C3_ZERO=y
+CONFIG_ARCH_CHIP="esp32c3"
+CONFIG_ARCH_CHIP_ESP32C3=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_BUILTIN=y
+CONFIG_DRIVERS_IEEE80211=y
+CONFIG_DRIVERS_WIRELESS=y
+CONFIG_ESPRESSIF_SPIFLASH=y
+CONFIG_ESPRESSIF_SPIFLASH_SPIFFS=y
+CONFIG_ESPRESSIF_WIFI=y
+CONFIG_EXAMPLES_RANDOM=y
+CONFIG_FS_PROCFS=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=8192
+CONFIG_INTELHEX_BINARY=y
+CONFIG_IOB_BUFSIZE=128
+CONFIG_IOB_NBUFFERS=160
+CONFIG_IOB_THROTTLE=24
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETDEV_LATEINIT=y
+CONFIG_NETDEV_PHY_IOCTL=y
+CONFIG_NETDEV_WIRELESS_IOCTL=y
+CONFIG_NETUTILS_CJSON=y
+CONFIG_NETUTILS_IPERF=y
+CONFIG_NET_BROADCAST=y
+CONFIG_NET_ETH_PKTSIZE=1514
+CONFIG_NET_ICMP_SOCKET=y
+CONFIG_NET_TCP=y
+CONFIG_NET_TCP_DELAYED_ACK=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
+CONFIG_NET_UDP=y
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=0
+CONFIG_PTHREAD_MUTEX_TYPES=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_BACKTRACE=y
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_WAITPID=y
+CONFIG_SIG_DEFAULT=y
+CONFIG_START_DAY=29
+CONFIG_START_MONTH=11
+CONFIG_START_YEAR=2019
+CONFIG_SYSTEM_DHCPC_RENEW=y
+CONFIG_SYSTEM_DUMPSTACK=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_PING=y
+CONFIG_TESTING_GETPRIME=y
+CONFIG_TESTING_OSTEST=y
+CONFIG_TLS_TASK_NELEM=4
+CONFIG_UART0_SERIAL_CONSOLE=y
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_WAPI=y
+CONFIG_WIRELESS_WAPI_CMDTOOL=y
+CONFIG_WIRELESS_WAPI_INITCONF=y
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/include/board.h 
b/boards/risc-v/esp32c3/esp32-c3-zero/include/board.h
new file mode 100644
index 00000000000..365c142a6db
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/include/board.h
@@ -0,0 +1,41 @@
+/****************************************************************************
+ * boards/risc-v/esp32c3/esp32-c3-zero/include/board.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_RISCV_ESP32C3_ESP32_C3_ZERO_INCLUDE_BOARD_H
+#define __BOARDS_RISCV_ESP32C3_ESP32_C3_ZERO_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* GPIO pins used by the GPIO Subsystem */
+
+#define BOARD_NGPIOOUT    2 /* Amount of GPIO Output pins */
+#define BOARD_NGPIOINT    1 /* Amount of GPIO Input w/ Interruption pins */
+
+/* esp32-c3-zero GPIOs */
+
+/* BOOT Button */
+
+#define BUTTON_BOOT  9
+
+#endif /* __BOARDS_RISCV_ESP32C3_ESP32_C3_ZERO_INCLUDE_BOARD_H */
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/scripts/Make.defs 
b/boards/risc-v/esp32c3/esp32-c3-zero/scripts/Make.defs
new file mode 100644
index 00000000000..d03f1ce9362
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/scripts/Make.defs
@@ -0,0 +1,61 @@
+############################################################################
+# boards/risc-v/esp32c3/esp32-c3-zero/scripts/Make.defs
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+###########################################################################
+
+include $(TOPDIR)/.config
+include $(TOPDIR)/tools/Config.mk
+include $(TOPDIR)/tools/espressif/Config.mk
+include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs
+
+# Remove quotes from CONFIG_ESPRESSIF_CHIP_SERIES configuration
+
+CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES))
+
+# Pick the linker scripts from the board level if they exist, if not
+# pick the common linker scripts.
+
+ARCHSCRIPT += $(BOARD_COMMON_DIR)/scripts/$(CHIP_SERIES)_aliases.ld
+ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_flat_memory.ld)
+
+ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y)
+  ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_sections.ld)
+else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
+  ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_sections.ld)
+else
+  ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_legacy_sections.ld)
+endif
+
+ARCHPICFLAGS = -fpic
+
+CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) 
$(ARCHDEFINES) $(EXTRAFLAGS) -Werror=return-type
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) 
$(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
+AFLAGS := $(CFLAGS) -D__ASSEMBLY__
+
+# Loadable module definitions
+
+LDMODULEFLAGS += -melf32lriscv
+
+# ELF module definitions
+
+LDELFFLAGS += -melf32lriscv
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/src/Make.defs 
b/boards/risc-v/esp32c3/esp32-c3-zero/src/Make.defs
new file mode 100644
index 00000000000..de99c8deadb
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/src/Make.defs
@@ -0,0 +1,45 @@
+#############################################################################
+# boards/risc-v/esp32c3/esp32-c3-zero/src/Make.defs
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+#############################################################################
+
+include $(TOPDIR)/Make.defs
+
+CSRCS = esp32c3_boot.c esp32c3_bringup.c
+
+ifeq ($(CONFIG_BOARDCTL),y)
+  CSRCS += esp32c3_appinit.c
+
+  ifeq ($(CONFIG_BOARDCTL_RESET),y)
+    CSRCS += esp32c3_reset.c
+  endif
+endif
+
+ifeq ($(CONFIG_DEV_GPIO),y)
+  CSRCS += esp32c3_gpio.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+  CSRCS += esp32c3_buttons.c
+endif
+
+DEPPATH += --dep-path board
+VPATH += :board
+CFLAGS += 
${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32-c3-zero.h 
b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32-c3-zero.h
new file mode 100644
index 00000000000..506b3d094a1
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32-c3-zero.h
@@ -0,0 +1,121 @@
+/****************************************************************************
+ * boards/risc-v/esp32c3/esp32-c3-zero/src/esp32-c3-zero.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_RISCV_ESP32C3_ESP32_C3_ZERO_SRC_ESP32_C3_ZERO_H
+#define __BOARDS_RISCV_ESP32C3_ESP32_C3_ZERO_SRC_ESP32_C3_ZERO_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* RMT gpio */
+
+#define RMT_RXCHANNEL       2
+#define RMT_TXCHANNEL       0
+
+#ifdef CONFIG_RMT_LOOP_TEST_MODE
+#  define RMT_INPUT_PIN     0
+#  define RMT_OUTPUT_PIN    0
+#else
+#  define RMT_INPUT_PIN     2
+#  define RMT_OUTPUT_PIN    10
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization.
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=y :
+ *     Called from board_late_initialize().
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y :
+ *     Called from the NSH library via board_app_initialize().
+ *
+ * Input Parameters:
+ *   None.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; A negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int esp_bringup(void);
+
+/****************************************************************************
+ * Name: board_twai_setup
+ *
+ * Description:
+ *  Initialize TWAI and register the TWAI device
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; A negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ESPRESSIF_TWAI
+int board_twai_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: esp_gpio_init
+ *
+ * Description:
+ *   Configure the GPIO driver.
+ *
+ * Returned Value:
+ *   Zero (OK).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEV_GPIO
+int esp_gpio_init(void);
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_RISCV_ESP32C3_ESP32_C3_ZERO_SRC_ESP32_C3_ZERO_H */
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_appinit.c 
b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_appinit.c
new file mode 100644
index 00000000000..ab3478a7f60
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_appinit.c
@@ -0,0 +1,83 @@
+/****************************************************************************
+ * boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_appinit.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+
+#include <nuttx/board.h>
+
+#include "esp32-c3-zero.h"
+
+#ifdef CONFIG_BOARDCTL
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initialization logic and the
+ *         matching application logic.  The value could be such things as a
+ *         mode enumeration value, a set of DIP switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+  /* Board initialization already performed by board_late_initialize() */
+
+  return OK;
+#else
+  /* Perform board-specific initialization */
+
+  return esp_bringup();
+#endif
+}
+
+#endif /* CONFIG_BOARDCTL */
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_boot.c 
b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_boot.c
new file mode 100644
index 00000000000..5e77d94eea2
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_boot.c
@@ -0,0 +1,89 @@
+/****************************************************************************
+ * boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_boot.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp_board_initialize
+ *
+ * Description:
+ *   All Espressif boards must provide the following entry point.
+ *   This entry point is called early in the initialization -- after all
+ *   memory has been configured and mapped but before any devices have been
+ *   initialized.
+ *
+ * Input Parameters:
+ *   None.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void esp_board_initialize(void)
+{
+}
+
+/****************************************************************************
+ * Name: board_late_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_late_initialize().  board_late_initialize() will
+ *   be called immediately after up_initialize() is called and just before
+ *   the initial application is started.  This additional initialization
+ *   phase may be used, for example, to initialize board-specific device
+ *   drivers.
+ *
+ * Input Parameters:
+ *   None.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+void board_late_initialize(void)
+{
+  /* Perform board-specific initialization */
+
+  esp_bringup();
+}
+#endif
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_bringup.c 
b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_bringup.c
new file mode 100644
index 00000000000..c2bc6bf853f
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_bringup.c
@@ -0,0 +1,492 @@
+/****************************************************************************
+ * boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_bringup.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+#include <fcntl.h>
+#include <syslog.h>
+#include <sys/ioctl.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include <nuttx/fs/fs.h>
+
+#include "esp_board_ledc.h"
+
+#ifdef CONFIG_ESPRESSIF_ADC
+#  include "esp_board_adc.h"
+#endif
+
+#ifdef CONFIG_WATCHDOG
+#  include "espressif/esp_wdt.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_SPIFLASH
+#  include "esp_board_spiflash.h"
+#endif
+
+#ifdef CONFIG_TIMER
+#  include "espressif/esp_timer.h"
+#endif
+
+#ifdef CONFIG_ONESHOT
+#  include "espressif/esp_oneshot.h"
+#endif
+
+#ifdef CONFIG_RTC_DRIVER
+#  include "espressif/esp_rtc.h"
+#endif
+
+#ifdef CONFIG_DEV_GPIO
+#  include "espressif/esp_gpio.h"
+#endif
+
+#ifdef CONFIG_INPUT_BUTTONS
+#  include <nuttx/input/buttons.h>
+#endif
+
+#ifdef CONFIG_ESPRESSIF_EFUSE
+#  include "espressif/esp_efuse.h"
+#endif
+
+#ifdef CONFIG_ESP_RMT
+#  include "esp_board_rmt.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_I2C
+#  include "esp_board_i2c.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_I2S
+#  include "esp_board_i2s.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_SPI
+#  include "espressif/esp_spi.h"
+#  include "esp_board_spidev.h"
+#  ifdef CONFIG_ESPRESSIF_SPI_BITBANG
+#    include "espressif/esp_spi_bitbang.h"
+#  endif
+#endif
+
+#ifdef CONFIG_ESPRESSIF_TEMP
+#  include "espressif/esp_temperature_sensor.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_WIFI_BT_COEXIST
+#  include "private/esp_coexist_internal.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_WIFI
+#  include "esp_board_wlan.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_BLE
+#  include "esp_ble.h"
+#endif
+
+#ifdef CONFIG_SPI_SLAVE
+#  include "espressif/esp_spi.h"
+#  include "esp_board_spislavedev.h"
+#endif
+
+#ifdef CONFIG_SYSTEM_NXDIAG_ESPRESSIF_CHIP_WO_TOOL
+#  include "espressif/esp_nxdiag.h"
+#endif
+
+#ifdef CONFIG_ESP_SDM
+#  include "espressif/esp_sdm.h"
+#endif
+
+#ifdef CONFIG_ESPRESSIF_SHA_ACCELERATOR
+#  include "espressif/esp_sha.h"
+#endif
+
+#ifdef CONFIG_MMCSD_SPI
+#  include "esp_board_mmcsd.h"
+#endif
+
+#ifdef CONFIG_SENSORS_BMP180
+#  include "esp_board_bmp180.h"
+#endif
+
+#ifdef CONFIG_SENSORS_BMP280
+#  include "esp_board_bmp280.h"
+#endif
+
+#include "esp32-c3-zero.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp_bringup
+ *
+ * Description:
+ *   Perform architecture-specific initialization.
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=y :
+ *     Called from board_late_initialize().
+ *
+ *   CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y :
+ *     Called from the NSH library via board_app_initialize().
+ *
+ * Input Parameters:
+ *   None.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; A negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int esp_bringup(void)
+{
+  int ret = OK;
+
+#ifdef CONFIG_FS_PROCFS
+  /* Mount the procfs file system */
+
+  ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      _err("Failed to mount procfs at /proc: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_FS_TMPFS
+  /* Mount the tmpfs file system */
+
+  ret = nx_mount(NULL, CONFIG_LIBC_TMPDIR, "tmpfs", 0, NULL);
+  if (ret < 0)
+    {
+      _err("Failed to mount tmpfs at %s: %d\n", CONFIG_LIBC_TMPDIR, ret);
+    }
+#endif
+
+#if defined(CONFIG_ESPRESSIF_EFUSE)
+  ret = esp_efuse_initialize("/dev/efuse");
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret);
+    }
+#endif
+
+#if defined(CONFIG_ESPRESSIF_SHA_ACCELERATOR) && \
+    !defined(CONFIG_CRYPTO_CRYPTODEV_HARDWARE)
+  ret = esp_sha_init();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to initialize SHA: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_MWDT0
+  ret = esp_wdt_initialize("/dev/watchdog0", ESP_WDT_MWDT0);
+  if (ret < 0)
+    {
+      _err("Failed to initialize WDT: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_MWDT1
+  ret = esp_wdt_initialize("/dev/watchdog1", ESP_WDT_MWDT1);
+  if (ret < 0)
+    {
+      _err("Failed to initialize WDT: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_RWDT
+  ret = esp_wdt_initialize("/dev/watchdog2", ESP_WDT_RWDT);
+  if (ret < 0)
+    {
+      _err("Failed to initialize WDT: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_XTWDT
+  ret = esp_wdt_initialize("/dev/watchdog3", ESP_WDT_XTAL32K);
+  if (ret < 0)
+    {
+      _err("Failed to initialize WDT: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_TIMER
+  ret = esp_timer_initialize(0);
+  if (ret < 0)
+    {
+      _err("Failed to initialize Timer 0: %d\n", ret);
+    }
+
+#ifndef CONFIG_ONESHOT
+  ret = esp_timer_initialize(1);
+  if (ret < 0)
+    {
+      _err("Failed to initialize Timer 1: %d\n", ret);
+    }
+#endif
+#endif
+
+#ifdef CONFIG_ESPRESSIF_SPI
+#  ifdef CONFIG_ESPRESSIF_SPI2
+  ret = board_spidev_initialize(ESPRESSIF_SPI2);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to init spidev 2: %d\n", ret);
+    }
+#  endif /* CONFIG_ESPRESSIF_SPI2 */
+
+#  ifdef CONFIG_ESPRESSIF_SPI_BITBANG
+  ret = board_spidev_initialize(ESPRESSIF_SPI_BITBANG);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to init spidev 3: %d\n", ret);
+    }
+#  endif /* CONFIG_ESPRESSIF_SPI_BITBANG */
+#endif /* CONFIG_ESPRESSIF_SPI */
+
+#if defined(CONFIG_ESPRESSIF_SPI) && defined(CONFIG_MMCSD_SPI)
+  ret = esp_mmcsd_spi_initialize();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: failed to init MMCSD SPI\n");
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_SPIFLASH
+  ret = board_spiflash_init();
+  if (ret)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to initialize SPI Flash\n");
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_TEMP
+  struct esp_temp_sensor_config_t cfg = TEMPERATURE_SENSOR_CONFIG(10, 50);
+  ret = esp_temperature_sensor_initialize(cfg);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize temperature sensor driver: %d\n",
+             ret);
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_WIFI_BT_COEXIST
+  esp_coex_adapter_register(&g_coex_adapter_funcs);
+  coex_pre_init();
+#endif
+
+#ifdef CONFIG_ESPRESSIF_WIFI
+  ret = board_wlan_init();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to initialize wireless subsystem=%d\n",
+             ret);
+    }
+#endif
+
+#ifdef CONFIG_RTC_DRIVER
+  /* Initialize the RTC driver */
+
+  ret = esp_rtc_driverinit();
+  if (ret < 0)
+    {
+      _err("Failed to initialize the RTC driver: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_BLE
+  ret = esp_ble_initialize();
+  if (ret)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to initialize BLE\n");
+      return ret;
+    }
+#endif
+
+#if defined(CONFIG_SPI_SLAVE) && defined(CONFIG_ESPRESSIF_SPI2)
+  ret = board_spislavedev_initialize(ESPRESSIF_SPI2);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize SPI%d Slave driver: %d\n",
+             ESPRESSIF_SPI2, ret);
+    }
+#endif
+
+#ifdef CONFIG_ONESHOT
+  ret = esp_oneshot_initialize();
+  if (ret < 0)
+    {
+      _err("Failed to initialize Oneshot Timer: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ESP_RMT
+  ret = board_rmt_txinitialize(RMT_TXCHANNEL, RMT_OUTPUT_PIN);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: board_rmt_txinitialize() failed: %d\n", ret);
+    }
+
+  ret = board_rmt_rxinitialize(RMT_RXCHANNEL, RMT_INPUT_PIN);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: board_rmt_txinitialize() failed: %d\n", ret);
+    }
+#endif
+
+#if defined(CONFIG_ESPRESSIF_I2S)
+  /* Configure I2S peripheral interfaces */
+
+  ret = board_i2s_init();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize I2S driver: %d\n", ret);
+    }
+#endif
+
+#if defined(CONFIG_ESPRESSIF_I2C)
+  /* Configure I2C peripheral interfaces */
+
+  ret = board_i2c_init();
+
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize I2C driver: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_SENSORS_BMP180
+  /* Try to register BMP180 device in I2C0 */
+
+  ret = board_bmp180_initialize(0);
+
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize BMP180 "
+             "Driver for I2C0: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_SENSORS_BMP280
+  /* Try to register BMP280 device in I2C0 */
+
+  ret = board_bmp280_initialize(0);
+
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize BMP280 "
+             "Driver for I2C0: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ESP_SDM
+  struct esp_sdm_chan_config_s config =
+  {
+    .gpio_num = 5,
+    .sample_rate_hz = 1000 * 1000,
+    .flags = 0,
+  };
+
+  struct dac_dev_s *dev = esp_sdminitialize(config);
+  ret = dac_register("/dev/dac0", dev);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize DAC driver: %d\n",
+             ret);
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_TWAI
+
+  /* Initialize TWAI and register the TWAI driver. */
+
+  ret = board_twai_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: board_twai_setup failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_DEV_GPIO
+  ret = esp_gpio_init();
+  if (ret < 0)
+    {
+      ierr("Failed to initialize GPIO Driver: %d\n", ret);
+    }
+#endif
+
+#if defined(CONFIG_INPUT_BUTTONS) && defined(CONFIG_INPUT_BUTTONS_LOWER)
+  /* Register the BUTTON driver */
+
+  ret = btn_lower_initialize("/dev/buttons");
+  if (ret < 0)
+    {
+      ierr("ERROR: btn_lower_initialize() failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_LEDC
+  ret = board_ledc_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: board_ledc_setup() failed: %d\n", ret);
+    }
+#endif /* CONFIG_ESPRESSIF_LEDC */
+
+#ifdef CONFIG_SYSTEM_NXDIAG_ESPRESSIF_CHIP_WO_TOOL
+  ret = esp_nxdiag_initialize();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: esp_nxdiag_initialize failed: %d\n", ret);
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_ADC
+  ret = board_adc_init();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize ADC driver: %d\n", ret);
+    }
+#endif
+
+  /* If we got here then perhaps not all initialization was successful, but
+   * at least enough succeeded to bring-up NSH with perhaps reduced
+   * capabilities.
+   */
+
+  return ret;
+}
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_buttons.c 
b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_buttons.c
new file mode 100644
index 00000000000..5177ff4d2a3
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_buttons.c
@@ -0,0 +1,200 @@
+/****************************************************************************
+ * boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_buttons.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/* Config */
+
+#include <nuttx/config.h>
+
+/* Libc */
+
+#include <assert.h>
+#include <debug.h>
+#include <errno.h>
+#include <stdbool.h>
+#include <stdio.h>
+
+/* NuttX */
+
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+#include <nuttx/irq.h>
+#include <arch/irq.h>
+
+/* Arch */
+
+#include "espressif/esp_gpio.h"
+
+/* Board */
+
+#include "esp32-c3-zero.h"
+#include <arch/board/board.h>
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ * Input Parameters:
+ *   None.
+ *
+ * Returned Value:
+ *   The number of buttons that were initialized.
+ *
+ ****************************************************************************/
+
+uint32_t board_button_initialize(void)
+{
+  esp_configgpio(BUTTON_BOOT, INPUT_FUNCTION_2 | PULLUP);
+  return 1;
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ *
+ * Description:
+ *   After board_button_initialize() has been called, board_buttons() may be
+ *   called to collect the state of all buttons.
+ *
+ * Input Parameters:
+ *   None.
+ *
+ * Returned Value:
+ *   An 8-bit bit set with each bit associated with a button. See the
+ *   BUTTON_*_BIT definitions in board.h for the meaning of each bit.
+ *
+ ****************************************************************************/
+
+uint32_t board_buttons(void)
+{
+  uint8_t ret = 0;
+  int i = 0;
+  int n = 0;
+
+  bool b0 = esp_gpioread(BUTTON_BOOT);
+
+  for (i = 0; i < 10; i++)
+    {
+      up_mdelay(1); /* TODO */
+
+      bool b1 = esp_gpioread(BUTTON_BOOT);
+
+      if (b0 == b1)
+        {
+          n++;
+        }
+      else
+        {
+          n = 0;
+        }
+
+      if (3 == n)
+        {
+          break;
+        }
+
+      b0 = b1;
+    }
+
+  iinfo("b=%d n=%d\n", b0, n);
+
+  /* Low value means that the button is pressed */
+
+  if (!b0)
+    {
+      ret = 0x1;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: board_button_irq
+ *
+ * Description:
+ *   board_button_irq() may be called to register an interrupt handler that
+ *   will be called when a button is depressed or released. The ID value is
+ *   a button enumeration value that uniquely identifies a button resource.
+ *   See the BUTTON_* definitions in board.h for the meaning of enumeration
+ *   value.
+ *
+ * Input Parameters:
+ *   id         - Identifies the button to be monitored. It is equivalent to
+ *                the bit used to report the button state in the return value
+ *                from board_buttons().
+ *   irqhandler - The handler that will be invoked when the interrupt occurs.
+ *   arg        - Pointer to the arguments that will be provided to the
+ *                interrupt handler.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+int board_button_irq(int id, xcpt_t irqhandler, void *arg)
+{
+  int ret;
+  DEBUGASSERT(id == 0);
+
+  int irq = ESP_PIN2IRQ(BUTTON_BOOT);
+
+  if (NULL != irqhandler)
+    {
+      /* Make sure the interrupt is disabled */
+
+      esp_gpioirqdisable(irq);
+
+      gpioinfo("Attach %p\n", irqhandler);
+
+      ret = irq_attach(irq, irqhandler, arg);
+      if (ret < 0)
+        {
+          syslog(LOG_ERR, "ERROR: irq_attach() failed: %d\n", ret);
+          return ret;
+        }
+
+      /* Configure the interrupt for rising and falling edges */
+
+      gpioinfo("Enabling the interrupt\n");
+      esp_gpioirqenable(irq, CHANGE);
+    }
+  else
+    {
+      gpioinfo("Disable the interrupt\n");
+      esp_gpioirqdisable(irq);
+    }
+
+  return OK;
+}
+#endif
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_gpio.c 
b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_gpio.c
new file mode 100644
index 00000000000..a07be9746d0
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_gpio.c
@@ -0,0 +1,558 @@
+/****************************************************************************
+ * boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_gpio.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/* Config */
+
+#include <nuttx/config.h>
+
+/* Libc */
+
+#include <sys/types.h>
+#include <syslog.h>
+#include <assert.h>
+#include <debug.h>
+
+/* NuttX */
+
+#include <arch/irq.h>
+#include <nuttx/irq.h>
+#include <nuttx/ioexpander/gpio.h>
+
+/* Arch */
+
+#include "espressif/esp_gpio.h"
+#ifdef CONFIG_ESPRESSIF_DEDICATED_GPIO
+#include "espressif/esp_dedic_gpio.h"
+#endif
+
+/* Board */
+
+#include "esp32-c3-zero.h"
+#include <arch/board/board.h>
+
+/* HAL */
+
+#include <arch/chip/gpio_sig_map.h>
+
+#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Pin 1 and 2 are used for this example as GPIO outputs. */
+
+#define GPIO_OUT1  1
+#define GPIO_OUT2  2
+
+#if !defined(CONFIG_ESPRESSIF_GPIO_IRQ) && BOARD_NGPIOINT > 0
+#  error "NGPIOINT is > 0 and GPIO interrupts aren't enabled"
+#endif
+
+/* Interrupt pins. GPIO9 is used as an example, any other inputs could be
+ * used.
+ */
+
+#define GPIO_IRQPIN  9
+
+/* Dedicated GPIO pins. GPIO4 and GPIO5 is used as an example, any other
+ * GPIOs could be used.
+ */
+
+#define GPIO_DEDIC1       4
+#define GPIO_DEDIC2       5
+#define GPIO_DEDIC_COUNT  2
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct espgpio_dev_s
+{
+  struct gpio_dev_s gpio;
+  uint8_t id;
+};
+
+struct espgpint_dev_s
+{
+  struct espgpio_dev_s espgpio;
+  pin_interrupt_t callback;
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#if BOARD_NGPIOOUT > 0
+static int gpout_read(struct gpio_dev_s *dev, bool *value);
+static int gpout_write(struct gpio_dev_s *dev, bool value);
+static int gpout_setpintype(struct gpio_dev_s *dev,
+                            enum gpio_pintype_e pintype);
+#endif
+
+#if BOARD_NGPIOINT > 0
+static int gpint_read(struct gpio_dev_s *dev, bool *value);
+static int gpint_attach(struct gpio_dev_s *dev,
+                        pin_interrupt_t callback);
+static int gpint_enable(struct gpio_dev_s *dev, bool enable);
+static int gpint_setpintype(struct gpio_dev_s *dev,
+                            enum gpio_pintype_e pintype);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#if BOARD_NGPIOOUT > 0
+static const struct gpio_operations_s gpout_ops =
+{
+  .go_read   = gpout_read,
+  .go_write  = gpout_write,
+  .go_attach = NULL,
+  .go_enable = NULL,
+  .go_setpintype = gpout_setpintype,
+};
+
+/* This array maps the GPIO pins used as OUTPUT */
+
+static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
+{
+  GPIO_OUT1, GPIO_OUT2
+};
+
+static struct espgpio_dev_s g_gpout[BOARD_NGPIOOUT];
+#endif
+
+#if BOARD_NGPIOINT > 0
+static const struct gpio_operations_s gpint_ops =
+{
+  .go_read   = gpint_read,
+  .go_write  = NULL,
+  .go_attach = gpint_attach,
+  .go_enable = gpint_enable,
+  .go_setpintype = gpint_setpintype,
+};
+
+/* This array maps the GPIO pins used as INTERRUPT INPUTS */
+
+static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] =
+{
+  GPIO_IRQPIN,
+};
+
+static struct espgpint_dev_s g_gpint[BOARD_NGPIOINT];
+#endif
+
+/* This array maps the GPIO pins used as Dedicated GPIO */
+
+#ifdef CONFIG_ESPRESSIF_DEDICATED_GPIO
+static const int g_gpioidedic[GPIO_DEDIC_COUNT] =
+{
+  GPIO_DEDIC1, GPIO_DEDIC2
+};
+
+static struct esp_dedic_gpio_flags_s dedic_gpio_flags =
+{
+  .input_enable = 1,
+  .invert_input_enable = 0,
+  .output_enable = 1,
+  .invert_output_enable = 0
+};
+
+struct esp_dedic_gpio_config_s dedic_gpio_conf =
+{
+  .gpio_array = g_gpioidedic,
+  .array_size = GPIO_DEDIC_COUNT,
+  .flags = &dedic_gpio_flags,
+  .path = "/dev/dedic_gpio0"
+};
+
+struct file *dedicated_gpio = NULL;
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: gpout_read
+ *
+ * Description:
+ *   Read a digital output pin.
+ *
+ * Parameters:
+ *   dev - A pointer to the gpio driver struct.
+ *   value - A pointer to store the state of the pin.
+ *
+ * Returned Value:
+ *   Zero (OK).
+ *
+ ****************************************************************************/
+
+#if BOARD_NGPIOOUT > 0
+static int gpout_read(struct gpio_dev_s *dev, bool *value)
+{
+  struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev;
+
+  DEBUGASSERT(espgpio != NULL && value != NULL);
+  DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT);
+  gpioinfo("Reading...\n");
+
+  *value = esp_gpioread(g_gpiooutputs[espgpio->id]);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: gpout_write
+ *
+ * Description:
+ *   Write to a digital output pin.
+ *
+ * Parameters:
+ *   dev - A pointer to the gpio driver struct.
+ *   value - The value to be written.
+ *
+ * Returned Value:
+ *   Zero (OK).
+ *
+ ****************************************************************************/
+
+static int gpout_write(struct gpio_dev_s *dev, bool value)
+{
+  struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev;
+
+  DEBUGASSERT(espgpio != NULL);
+  DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT);
+  gpioinfo("Writing %d\n", (int)value);
+
+  esp_gpiowrite(g_gpiooutputs[espgpio->id], value);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: gpout_setpintype
+ *
+ * Description:
+ *   Set digital output pin type.
+ *
+ * Parameters:
+ *   dev - A pointer to the gpio driver struct.
+ *   pintype - The pin type. See nuttx/ioexpander/gpio.h.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; -1 (ERROR) otherwise.
+ *
+ ****************************************************************************/
+
+static int gpout_setpintype(struct gpio_dev_s *dev,
+                            enum gpio_pintype_e pintype)
+{
+  struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev;
+
+  DEBUGASSERT(espgpio != NULL);
+  DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT);
+  gpioinfo("Setting pintype: %d\n", (int)pintype);
+
+  esp_gpio_matrix_out(g_gpiooutputs[espgpio->id],
+                      SIG_GPIO_OUT_IDX, 0, 0);
+
+  switch (pintype)
+    {
+      case GPIO_INPUT_PIN:
+        esp_configgpio(g_gpiooutputs[espgpio->id], INPUT);
+        break;
+      case GPIO_INPUT_PIN_PULLUP:
+        esp_configgpio(g_gpiooutputs[espgpio->id], INPUT_PULLUP);
+        break;
+      case GPIO_INPUT_PIN_PULLDOWN:
+        esp_configgpio(g_gpiooutputs[espgpio->id], INPUT_PULLDOWN);
+        break;
+      case GPIO_OUTPUT_PIN:
+        esp_configgpio(g_gpiooutputs[espgpio->id], INPUT | OUTPUT);
+        break;
+      case GPIO_OUTPUT_PIN_OPENDRAIN:
+        esp_configgpio(g_gpiooutputs[espgpio->id],
+                       INPUT | OUTPUT_OPEN_DRAIN);
+        break;
+      default:
+        return ERROR;
+        break;
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: espgpio_interrupt
+ *
+ * Description:
+ *   Digital input interrupt handler.
+ *
+ * Input Parameters:
+ *   irq           - Identifier of the interrupt request.
+ *   context       - Context data from the ISR.
+ *   arg           - Opaque pointer to the internal driver state structure.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on failure.
+ *
+ ****************************************************************************/
+
+#if BOARD_NGPIOINT > 0
+static int espgpio_interrupt(int irq, void *context, void *arg)
+{
+  struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)arg;
+
+  DEBUGASSERT(espgpint != NULL && espgpint->callback != NULL);
+  gpioinfo("Interrupt! callback=%p\n", espgpint->callback);
+
+  espgpint->callback(&espgpint->espgpio.gpio, espgpint->espgpio.id);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: gpint_read
+ *
+ * Description:
+ *   Read a digital input pin.
+ *
+ * Parameters:
+ *   dev - A pointer to the gpio driver struct.
+ *   value - A pointer to store the state of the pin.
+ *
+ * Returned Value:
+ *   Zero (OK).
+ *
+ ****************************************************************************/
+
+static int gpint_read(struct gpio_dev_s *dev, bool *value)
+{
+  struct espgpint_dev_s *espgpint =
+    (struct espgpint_dev_s *)dev;
+
+  DEBUGASSERT(espgpint != NULL && value != NULL);
+  DEBUGASSERT(espgpint->espgpio.id < BOARD_NGPIOINT);
+  gpioinfo("Reading int pin...\n");
+
+  *value = esp_gpioread(g_gpiointinputs[espgpint->espgpio.id]);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: gpint_attach
+ *
+ * Description:
+ *   Attach the ISR to IRQ and register the callback. But it still doesn't
+ *   enable interrupt yet.
+ *
+ * Parameters:
+ *   dev - A pointer to the gpio driver struct.
+ *   callback - User callback function.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; A negated errno value is returned
+ *   to indicate the nature of any failure.
+ *
+ ****************************************************************************/
+
+static int gpint_attach(struct gpio_dev_s *dev,
+                        pin_interrupt_t callback)
+{
+  struct espgpint_dev_s *espgpint =
+    (struct espgpint_dev_s *)dev;
+  int irq = ESP_PIN2IRQ(g_gpiointinputs[espgpint->espgpio.id]);
+  int ret;
+
+  gpioinfo("Attaching the callback\n");
+
+  /* Make sure the interrupt is disabled */
+
+  esp_gpioirqdisable(irq);
+  ret = irq_attach(irq,
+                   espgpio_interrupt,
+                   &g_gpint[espgpint->espgpio.id]);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: gpint_attach() failed: %d\n", ret);
+      return ret;
+    }
+
+  gpioinfo("Attach %p\n", callback);
+  espgpint->callback = callback;
+  return OK;
+}
+
+/****************************************************************************
+ * Name: gpint_enable
+ *
+ * Description:
+ *   Enable/Disable interrupt.
+ *
+ * Parameters:
+ *   dev - A pointer to the gpio driver struct.
+ *   enable - True to enable, false to disable.
+ *
+ * Returned Value:
+ *   Zero (OK).
+ *
+ ****************************************************************************/
+
+static int gpint_enable(struct gpio_dev_s *dev, bool enable)
+{
+  struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)dev;
+  int irq = ESP_PIN2IRQ(g_gpiointinputs[espgpint->espgpio.id]);
+
+  if (enable)
+    {
+      if (espgpint->callback != NULL)
+        {
+          gpioinfo("Enabling the interrupt\n");
+
+          /* Configure the interrupt for rising edge */
+
+          esp_gpioirqenable(irq, RISING);
+        }
+    }
+  else
+    {
+      gpioinfo("Disable the interrupt\n");
+      esp_gpioirqdisable(irq);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: gpint_setpintype
+ *
+ * Description:
+ *   Set digital interrupt pin type.
+ *
+ * Parameters:
+ *   dev - A pointer to the gpio driver struct.
+ *   pintype - The pin type. See nuttx/ioexpander/gpio.h.
+ *
+ * Returned Value:
+ *   Zero (OK) on success; -1 (ERROR) otherwise.
+ *
+ ****************************************************************************/
+
+static int gpint_setpintype(struct gpio_dev_s *dev,
+                            enum gpio_pintype_e pintype)
+{
+  struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)dev;
+
+  DEBUGASSERT(espgpint != NULL);
+  DEBUGASSERT(espgpint->espgpio.id < BOARD_NGPIOINT);
+  gpioinfo("Setting pintype: %d\n", (int)pintype);
+  switch (pintype)
+    {
+      case GPIO_INTERRUPT_HIGH_PIN:
+        esp_configgpio(g_gpiointinputs[espgpint->espgpio.id],
+                       INPUT_PULLUP);
+        break;
+      case GPIO_INTERRUPT_LOW_PIN:
+        esp_configgpio(g_gpiointinputs[espgpint->espgpio.id],
+                       INPUT_PULLDOWN);
+        break;
+      default:
+        return ERROR;
+        break;
+    }
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp_gpio_init
+ *
+ * Description:
+ *   Configure the GPIO driver.
+ *
+ * Returned Value:
+ *   Zero (OK).
+ *
+ ****************************************************************************/
+
+int esp_gpio_init(void)
+{
+  int pincount = 0;
+  int i;
+
+#if BOARD_NGPIOOUT > 0
+  for (i = 0; i < BOARD_NGPIOOUT; i++)
+    {
+      /* Setup and register the GPIO pin */
+
+      g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
+      g_gpout[i].gpio.gp_ops     = &gpout_ops;
+      g_gpout[i].id              = i;
+      gpio_pin_register(&g_gpout[i].gpio, pincount);
+
+      /* Configure the pins that will be used as output */
+
+      esp_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0);
+      esp_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_2 | INPUT_FUNCTION_2);
+      esp_gpiowrite(g_gpiooutputs[i], 0);
+
+      pincount++;
+    }
+#endif
+
+#if BOARD_NGPIOINT > 0
+  for (i = 0; i < BOARD_NGPIOINT; i++)
+    {
+      /* Setup and register the GPIO pin */
+
+      g_gpint[i].espgpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN;
+      g_gpint[i].espgpio.gpio.gp_ops     = &gpint_ops;
+      g_gpint[i].espgpio.id              = i;
+      gpio_pin_register(&g_gpint[i].espgpio.gpio, pincount);
+
+      /* Configure the pins that will be used as interrupt input */
+
+      esp_configgpio(g_gpiointinputs[i], INPUT_FUNCTION_2 | PULLDOWN);
+
+      pincount++;
+    }
+#endif
+
+#ifdef CONFIG_ESPRESSIF_DEDICATED_GPIO
+  dedicated_gpio = esp_dedic_gpio_new_bundle(&dedic_gpio_conf);
+
+  pincount++;
+#endif
+
+  return OK;
+}
+#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */
diff --git a/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_reset.c 
b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_reset.c
new file mode 100644
index 00000000000..c68e3fb9c55
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_reset.c
@@ -0,0 +1,83 @@
+/****************************************************************************
+ * boards/risc-v/esp32c3/esp32-c3-zero/src/esp32c3_reset.c
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <assert.h>
+#include <debug.h>
+#include <stdlib.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+
+#include "espressif/esp_systemreset.h"
+
+#ifdef CONFIG_BOARDCTL_RESET
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_reset
+ *
+ * Description:
+ *   Reset board.  Support for this function is required by board-level
+ *   logic if CONFIG_BOARDCTL_RESET is selected.
+ *
+ * Input Parameters:
+ *   status - Status information provided with the reset event.  This
+ *            meaning of this status information is board-specific.  If not
+ *            used by a board, the value zero may be provided in calls to
+ *            board_reset().
+ *
+ * Returned Value:
+ *   If this function returns, then it was not possible to power-off the
+ *   board due to some constraints.  The return value in this case is a
+ *   board-specific reason for the failure to shutdown.
+ *
+ ****************************************************************************/
+
+int board_reset(int status)
+{
+  syslog(LOG_INFO, "reboot status=%d\n", status);
+
+  switch (status)
+    {
+      case EXIT_SUCCESS:
+        up_shutdown_handler();
+        break;
+      case CONFIG_BOARD_ASSERT_RESET_VALUE:
+      default:
+        break;
+    }
+
+  up_systemreset();
+
+  return 0;
+}
+
+#endif /* CONFIG_BOARDCTL_RESET */

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