hujun260 opened a new pull request, #17963:
URL: https://github.com/apache/nuttx/pull/17963

   ## Summary
   
   Add AMP (Asymmetric MultiProcessing) mode support with GIC SGI (Software 
Generated Interrupts) for inter-core communication. In AMP mode, multiple 
independent OS instances run on different CPU cores, and each core needs SGI 
capability for inter-core synchronization. This change enables SGI usage in AMP 
configurations and ensures GIC CPU0-specific initialization occurs only once 
per system, supporting both SMP and AMP architectures.
   
   ## Changes
   
   - **arch/arm/src/armv7-r/gic.h**:
     - Remove CONFIG_SMP conditional in arm_cpu_sgi() function
     - Always use SGI_TGTFILTER_LIST targeting mode for SGI dispatch
     - Enable SGI-based inter-core interrupts for both SMP and AMP modes
   
   - **arch/arm/src/goldfish/goldfish_irq.c**:
     - Add CPU0 check using sched_getcpu() before calling arm_gic0_initialize()
     - Ensure arm_gic0_initialize() executes only on CPU0 during system startup
     - Prevents duplicate GIC CPU0-specific initialization in AMP mode
   
   - **arch/arm/src/imx6/imx_irq.c**:
     - Add CPU0 check using sched_getcpu() before calling arm_gic0_initialize()
     - Ensure arm_gic0_initialize() executes only on CPU0 during system startup
     - Prevents duplicate GIC CPU0-specific initialization in AMP mode
   
   - **arch/arm64/src/common/arm64_gicv2.c**:
     - Add CPU0 check using sched_getcpu() before calling arm_gic0_initialize()
     - Ensure arm_gic0_initialize() executes only on CPU0 during system startup
     - Maintains consistent initialization behavior across ARM64 GIC 
configurations
   
   ## Benefits & Technical Details
   
   - **AMP support**: Enables inter-core SGI communication in AMP 
configurations where each core runs independently
   - **Correct initialization**: CPU0-only initialization prevents race 
conditions and duplicate setup in multi-core boot
   - **Architecture consistency**: Both ARM and ARM64 platforms now use same 
SGI and initialization pattern
   - **Flexible target mode**: Using SGI_TGTFILTER_LIST allows targeting 
specific CPU cores in both SMP and AMP modes
   - **Boot robustness**: sched_getcpu() check ensures safe execution during 
system initialization
   
   ## Testing
   
   - Verified SGI signals can be sent between CPU cores in both SMP and AMP 
modes
   - Confirmed arm_gic0_initialize() executes exactly once on CPU0 in 
multi-core startup
   - Tested GIC functionality with both single and multi-core configurations
   - Validated Goldfish and IMX6 platforms with AMP mode enabled
   - Confirmed ARM64 GICv2 initialization works correctly with CPU0 guard
   
   ## Impact
   
   - **Functionality**: Enables AMP mode support with inter-core communication 
via SGI
   - **Compatibility**: Fully backward compatible with existing SMP 
configurations
   - **Scope**: Affects ARM (ARMv7-R, ARMv8-R), Goldfish, IMX6, and ARM64 GIC 
implementations
   - **Architecture**: Multi-core systems using Asymmetric MultiProcessing mode


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