This is an automated email from the ASF dual-hosted git repository. jiuzhudong pushed a commit to branch master in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 775c95a59901163a61ab6a092d88c03f54cc771a Author: chenxiaoyi <[email protected]> AuthorDate: Sun Mar 30 16:06:34 2025 +0800 arch/xtensa: delete XCHAL_SYSCALL_LEVEL macro definition After PR#14672, there is no use of XCHAL_SYSCALL_LEVEL. Signed-off-by: chenxiaoyi <[email protected]> --- arch/xtensa/include/esp32/core-isa.h | 1 - arch/xtensa/include/esp32s2/core-isa.h | 2 -- arch/xtensa/include/esp32s3/core-isa.h | 2 -- arch/xtensa/src/esp32s3/esp32s3_irq.c | 2 +- 4 files changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/xtensa/include/esp32/core-isa.h b/arch/xtensa/include/esp32/core-isa.h index ce53e12732d..39fcd878573 100644 --- a/arch/xtensa/include/esp32/core-isa.h +++ b/arch/xtensa/include/esp32/core-isa.h @@ -354,7 +354,6 @@ /* (always 1 in XEA1; * levels 2 .. EXCM_LEVEL are * "medium priority") */ -#define XCHAL_SYSCALL_LEVEL 2 /* Masks of interrupts at each interrupt level: */ diff --git a/arch/xtensa/include/esp32s2/core-isa.h b/arch/xtensa/include/esp32s2/core-isa.h index 350680be72c..e6de54a4bfa 100644 --- a/arch/xtensa/include/esp32s2/core-isa.h +++ b/arch/xtensa/include/esp32s2/core-isa.h @@ -401,8 +401,6 @@ */ #define XCHAL_EXCM_LEVEL 3 /* level masked by PS.EXCM */ -#define XCHAL_SYSCALL_LEVEL 2 - /* (always 1 in XEA1; levels 2 .. EXCM_LEVEL are "medium priority") */ /* Masks of interrupts at each interrupt level: */ diff --git a/arch/xtensa/include/esp32s3/core-isa.h b/arch/xtensa/include/esp32s3/core-isa.h index 5ecf61d38b2..7845f26bb95 100644 --- a/arch/xtensa/include/esp32s3/core-isa.h +++ b/arch/xtensa/include/esp32s3/core-isa.h @@ -359,8 +359,6 @@ #define XCHAL_EXCM_LEVEL 3 /* level masked by PS.EXCM */ -#define XCHAL_SYSCALL_LEVEL 2 - /* (always 1 in XEA1; levels 2 .. EXCM_LEVEL are "medium priority") */ /* Masks of interrupts at each interrupt level: */ diff --git a/arch/xtensa/src/esp32s3/esp32s3_irq.c b/arch/xtensa/src/esp32s3/esp32s3_irq.c index 44f3065d200..a47b01beb97 100644 --- a/arch/xtensa/src/esp32s3/esp32s3_irq.c +++ b/arch/xtensa/src/esp32s3/esp32s3_irq.c @@ -805,7 +805,7 @@ int esp32s3_setup_irq(int cpu, int periphid, int priority, int flags) return -EINVAL; } - if (priority > XCHAL_SYSCALL_LEVEL) + if (priority > XCHAL_EXCM_LEVEL) { irqerr("Invalid priority %d\n", priority); return -EINVAL;
