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commit 2d768c294ee34f398efa1557ae7fd98557afa824 Author: Matteo Golin <[email protected]> AuthorDate: Fri Jan 16 14:17:52 2026 -0500 arch/delays: Invalid default value for BOARD_LOOPSPERMSEC Changes the default value for CONFIG_BOARD_LOOPSPERMSEC to -1, which is invalid. All boards that forget to configure this value will encounter a static assertion at compile time, enforcing that configurations upstreamed to NuttX have calibrated values for correct delay timings. Boards which implement ALARM_ARCH or TIMER_ARCH do not rely on the busy-loop delay implementation and thus only have a run-time check to ensure proper delay-timings (in the case where delays are used before the alarm/timer driver is registered). Some boards already in the NuttX upstream do not have calibrated values, but there are no users who currently own the board to submit a calibrated value for the configurations to use. In this scenario, the value is temporarily set to 0 and a warning is displayed so that users of these boards are informed of the calibration process. Signed-off-by: Matteo Golin <[email protected]> --- arch/Kconfig | 7 ++++--- arch/arm/src/at32/at32_rcc.c | 3 +++ arch/arm/src/at32/at32f43xxx_rcc.c | 5 +++++ arch/arm/src/gd32f4/gd32f4xx_rcu.c | 3 +++ arch/arm/src/stm32/stm32_rcc.c | 3 +++ arch/arm/src/stm32/stm32f10xxx_rcc.c | 5 +++++ arch/arm/src/stm32/stm32f20xxx_rcc.c | 5 +++++ arch/arm/src/stm32/stm32f30xxx_rcc.c | 5 +++++ arch/arm/src/stm32/stm32f33xxx_rcc.c | 5 +++++ arch/arm/src/stm32/stm32f37xxx_rcc.c | 5 +++++ arch/arm/src/stm32/stm32f40xxx_rcc.c | 5 +++++ arch/arm/src/stm32/stm32g4xxxx_rcc.c | 5 +++++ arch/arm/src/stm32/stm32l15xxx_rcc.c | 5 +++++ arch/arm/src/stm32f0l0g0/stm32_rcc.c | 3 +++ arch/arm/src/stm32f0l0g0/stm32c0_rcc.c | 5 +++++ arch/arm/src/stm32f0l0g0/stm32g0_rcc.c | 5 +++++ arch/arm/src/stm32f0l0g0/stm32l0_rcc.c | 5 +++++ arch/arm/src/stm32f7/stm32_lse.c | 5 +++++ arch/arm/src/stm32f7/stm32_rcc.c | 3 +++ arch/arm/src/stm32f7/stm32f72xx73xx_rcc.c | 5 +++++ arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c | 3 +++ arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c | 5 +++++ arch/arm/src/stm32h5/stm32_lse.c | 5 +++++ arch/arm/src/stm32h5/stm32_pwr.c | 3 +++ arch/arm/src/stm32h5/stm32_rcc.c | 3 +++ arch/arm/src/stm32h5/stm32h5xx_rcc.c | 5 +++++ arch/arm/src/stm32h7/stm32_lse.c | 5 +++++ arch/arm/src/stm32h7/stm32_rcc.c | 3 +++ arch/arm/src/stm32h7/stm32h7x3xx_rcc.c | 5 +++++ arch/arm/src/stm32h7/stm32h7x7xx_rcc.c | 5 +++++ arch/arm/src/stm32l4/stm32l4_rcc.c | 3 +++ arch/arm/src/stm32l4/stm32l4x3xx_rcc.c | 5 +++++ arch/arm/src/stm32l4/stm32l4x5xx_rcc.c | 5 +++++ arch/arm/src/stm32l4/stm32l4x6xx_rcc.c | 5 +++++ arch/arm/src/stm32l4/stm32l4xrxx_rcc.c | 5 +++++ arch/arm/src/stm32l5/stm32l562xx_rcc.c | 5 +++++ arch/arm/src/stm32l5/stm32l5_lse.c | 5 +++++ arch/arm/src/stm32l5/stm32l5_rcc.c | 3 +++ arch/arm/src/stm32u5/stm32_lse.c | 5 +++++ arch/arm/src/stm32u5/stm32_pwr.c | 3 +++ arch/arm/src/stm32u5/stm32_rcc.c | 3 +++ arch/arm/src/stm32u5/stm32u5xx_rcc.c | 5 +++++ arch/arm/src/stm32wb/stm32wb_rcc.c | 3 +++ arch/arm/src/stm32wl5/stm32wl5_lse.c | 5 +++++ arch/risc-v/src/rv32m1/rv32m1_delay.c | 3 +++ drivers/timers/arch_alarm.c | 8 +++++++- drivers/timers/arch_timer.c | 8 +++++++- sched/clock/CMakeLists.txt | 2 +- sched/clock/Make.defs | 2 +- sched/clock/{delay.c => clock_delay.c} | 16 +++++++++++++++- 50 files changed, 225 insertions(+), 8 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 4d7088ec257..8f3e23dd9c0 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1365,11 +1365,12 @@ comment "Board Settings" config BOARD_LOOPSPERMSEC int "Delay loops per millisecond" - default 5000 + default -1 ---help--- Simple delay loops are used by some logic, especially during boot-up, - driver initialization. These delay loops must be calibrated for each - board in order to assure accurate timing by the delay loops. + driver initialization. These delay loops must be calibrated for each + board in order to assure accurate timing by the delay loops. You can + do so with `calib_udelay` (EXAMPLES_CALIB_UDELAY). comment "Interrupt options" diff --git a/arch/arm/src/at32/at32_rcc.c b/arch/arm/src/at32/at32_rcc.c index ebb8a4a7e64..51d8f3a7c0d 100644 --- a/arch/arm/src/at32/at32_rcc.c +++ b/arch/arm/src/at32/at32_rcc.c @@ -46,6 +46,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. diff --git a/arch/arm/src/at32/at32f43xxx_rcc.c b/arch/arm/src/at32/at32f43xxx_rcc.c index 6973dddfcc0..4212cf80cc0 100644 --- a/arch/arm/src/at32/at32f43xxx_rcc.c +++ b/arch/arm/src/at32/at32f43xxx_rcc.c @@ -28,6 +28,8 @@ #include <arch/board/board.h> +#include <assert.h> + #include "chip.h" #include "at32_pwr.h" #include "hardware/at32f43xxx_rcc.h" @@ -37,6 +39,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/gd32f4/gd32f4xx_rcu.c b/arch/arm/src/gd32f4/gd32f4xx_rcu.c index 434b6de017d..bc639f81ab3 100644 --- a/arch/arm/src/gd32f4/gd32f4xx_rcu.c +++ b/arch/arm/src/gd32f4/gd32f4xx_rcu.c @@ -44,6 +44,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow 2 milliseconds for the IRC16M to become ready. */ #define IRC16M_STARTUP_TIMEOUT (2 * CONFIG_BOARD_LOOPSPERMSEC) diff --git a/arch/arm/src/stm32/stm32_rcc.c b/arch/arm/src/stm32/stm32_rcc.c index a07a8b1174a..00796fba961 100644 --- a/arch/arm/src/stm32/stm32_rcc.c +++ b/arch/arm/src/stm32/stm32_rcc.c @@ -46,6 +46,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. diff --git a/arch/arm/src/stm32/stm32f10xxx_rcc.c b/arch/arm/src/stm32/stm32f10xxx_rcc.c index 00da41a2876..fa8c0debe69 100644 --- a/arch/arm/src/stm32/stm32f10xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f10xxx_rcc.c @@ -24,10 +24,15 @@ * Included Files ****************************************************************************/ +#include <assert.h> + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32/stm32f20xxx_rcc.c b/arch/arm/src/stm32/stm32f20xxx_rcc.c index b9faec03b43..eb9e97e0ed8 100644 --- a/arch/arm/src/stm32/stm32f20xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f20xxx_rcc.c @@ -24,6 +24,8 @@ * Included Files ****************************************************************************/ +#include <assert.h> + #include "stm32_pwr.h" /* This file supports only the STM32 F2 family (although it is identical to @@ -34,6 +36,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32/stm32f30xxx_rcc.c b/arch/arm/src/stm32/stm32f30xxx_rcc.c index 1e2796b0856..8c0f606c765 100644 --- a/arch/arm/src/stm32/stm32f30xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f30xxx_rcc.c @@ -24,10 +24,15 @@ * Included Files ****************************************************************************/ +#include <assert.h> + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32/stm32f33xxx_rcc.c b/arch/arm/src/stm32/stm32f33xxx_rcc.c index 60d6508bdea..bf3edc07275 100644 --- a/arch/arm/src/stm32/stm32f33xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f33xxx_rcc.c @@ -24,10 +24,15 @@ * Included Files ****************************************************************************/ +#include <assert.h> + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32/stm32f37xxx_rcc.c b/arch/arm/src/stm32/stm32f37xxx_rcc.c index 54ab48c2074..6c8a157a48e 100644 --- a/arch/arm/src/stm32/stm32f37xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f37xxx_rcc.c @@ -24,10 +24,15 @@ * Included Files ****************************************************************************/ +#include <assert.h> + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32/stm32f40xxx_rcc.c b/arch/arm/src/stm32/stm32f40xxx_rcc.c index 63c5079639a..453ced82d2b 100644 --- a/arch/arm/src/stm32/stm32f40xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f40xxx_rcc.c @@ -28,6 +28,8 @@ #include <arch/board/board.h> +#include <assert.h> + #include "chip.h" #include "stm32_pwr.h" #include "itm_syslog.h" @@ -36,6 +38,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32/stm32g4xxxx_rcc.c b/arch/arm/src/stm32/stm32g4xxxx_rcc.c index 3c760114d35..8f937465778 100644 --- a/arch/arm/src/stm32/stm32g4xxxx_rcc.c +++ b/arch/arm/src/stm32/stm32g4xxxx_rcc.c @@ -91,12 +91,17 @@ #include <nuttx/config.h> +#include <assert.h> + #include "hardware/stm32g4xxxx_pwr.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + #if (STM32_SYSCLK_SW == RCC_CFGR_SW_HSE) # define USE_HSE #endif diff --git a/arch/arm/src/stm32/stm32l15xxx_rcc.c b/arch/arm/src/stm32/stm32l15xxx_rcc.c index bce0e29a328..043e46beca3 100644 --- a/arch/arm/src/stm32/stm32l15xxx_rcc.c +++ b/arch/arm/src/stm32/stm32l15xxx_rcc.c @@ -24,10 +24,15 @@ * Included Files ****************************************************************************/ +#include <assert.h> + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32f0l0g0/stm32_rcc.c b/arch/arm/src/stm32f0l0g0/stm32_rcc.c index 49df30ceb77..debe01a684d 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_rcc.c +++ b/arch/arm/src/stm32f0l0g0/stm32_rcc.c @@ -54,6 +54,9 @@ # endif #endif +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. diff --git a/arch/arm/src/stm32f0l0g0/stm32c0_rcc.c b/arch/arm/src/stm32f0l0g0/stm32c0_rcc.c index c0b2213b156..b483d8637d3 100644 --- a/arch/arm/src/stm32f0l0g0/stm32c0_rcc.c +++ b/arch/arm/src/stm32f0l0g0/stm32c0_rcc.c @@ -24,10 +24,15 @@ * Included Files ****************************************************************************/ +#include <assert.h> + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become * ready. that is a very long delay, but if the clock does not become * ready we are hosed anyway. Normally this is very fast, but I have diff --git a/arch/arm/src/stm32f0l0g0/stm32g0_rcc.c b/arch/arm/src/stm32f0l0g0/stm32g0_rcc.c index ca15e3a737c..b12d4ea61ba 100644 --- a/arch/arm/src/stm32f0l0g0/stm32g0_rcc.c +++ b/arch/arm/src/stm32f0l0g0/stm32g0_rcc.c @@ -24,12 +24,17 @@ * Included Files ****************************************************************************/ +#include <assert.h> + #include "stm32_pwr.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become * ready. that is a very long delay, but if the clock does not become * ready we are hosed anyway. Normally this is very fast, but I have diff --git a/arch/arm/src/stm32f0l0g0/stm32l0_rcc.c b/arch/arm/src/stm32f0l0g0/stm32l0_rcc.c index 24b06571083..558ee7a2328 100644 --- a/arch/arm/src/stm32f0l0g0/stm32l0_rcc.c +++ b/arch/arm/src/stm32f0l0g0/stm32l0_rcc.c @@ -24,6 +24,8 @@ * Included Files ****************************************************************************/ +#include <assert.h> + #include "stm32_pwr.h" #include "hardware/stm32_syscfg.h" @@ -32,6 +34,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32f7/stm32_lse.c b/arch/arm/src/stm32f7/stm32_lse.c index 1f8a6bad806..10846796bba 100644 --- a/arch/arm/src/stm32f7/stm32_lse.c +++ b/arch/arm/src/stm32f7/stm32_lse.c @@ -26,6 +26,8 @@ #include <nuttx/config.h> +#include <assert.h> + #include "arm_internal.h" #include "stm32_rcc.h" #include "stm32_pwr.h" @@ -34,6 +36,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + #define LSERDY_TIMEOUT (500 * CONFIG_BOARD_LOOPSPERMSEC) #ifdef CONFIG_STM32F7_RTC_LSECLOCK_START_DRV_CAPABILITY diff --git a/arch/arm/src/stm32f7/stm32_rcc.c b/arch/arm/src/stm32f7/stm32_rcc.c index 337a134c11d..a78629f7f6d 100644 --- a/arch/arm/src/stm32f7/stm32_rcc.c +++ b/arch/arm/src/stm32f7/stm32_rcc.c @@ -43,6 +43,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. diff --git a/arch/arm/src/stm32f7/stm32f72xx73xx_rcc.c b/arch/arm/src/stm32f7/stm32f72xx73xx_rcc.c index 7fc53e1e4d3..19d3e90346b 100644 --- a/arch/arm/src/stm32f7/stm32f72xx73xx_rcc.c +++ b/arch/arm/src/stm32f7/stm32f72xx73xx_rcc.c @@ -24,12 +24,17 @@ * Included Files ****************************************************************************/ +#include <assert.h> + #include "stm32_pwr.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c b/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c index 2720ae38676..fac08c11467 100644 --- a/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c +++ b/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c @@ -30,6 +30,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c index ad7c70c8169..ff026b7f8e7 100644 --- a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c +++ b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c @@ -24,6 +24,8 @@ * Included Files ****************************************************************************/ +#include <assert.h> + #include "stm32_pwr.h" #include "stm32_dbgmcu.h" @@ -31,6 +33,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32h5/stm32_lse.c b/arch/arm/src/stm32h5/stm32_lse.c index 9fa5d0bae37..d5c0db5e0f1 100644 --- a/arch/arm/src/stm32h5/stm32_lse.c +++ b/arch/arm/src/stm32h5/stm32_lse.c @@ -26,6 +26,8 @@ #include <nuttx/config.h> +#include <assert.h> + #include "arm_internal.h" #include "stm32_pwr.h" #include "stm32_rcc.h" @@ -34,6 +36,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + #define LSERDY_TIMEOUT (500 * CONFIG_BOARD_LOOPSPERMSEC) #ifdef CONFIG_STM32H5_RTC_LSECLOCK_START_DRV_CAPABILITY diff --git a/arch/arm/src/stm32h5/stm32_pwr.c b/arch/arm/src/stm32h5/stm32_pwr.c index ef0d2ceafc6..cf09658e3ac 100644 --- a/arch/arm/src/stm32h5/stm32_pwr.c +++ b/arch/arm/src/stm32h5/stm32_pwr.c @@ -40,6 +40,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + #define PWR_TIMEOUT (10 * CONFIG_BOARD_LOOPSPERMSEC) /**************************************************************************** diff --git a/arch/arm/src/stm32h5/stm32_rcc.c b/arch/arm/src/stm32h5/stm32_rcc.c index f1bb8631a47..633b947c876 100644 --- a/arch/arm/src/stm32h5/stm32_rcc.c +++ b/arch/arm/src/stm32h5/stm32_rcc.c @@ -43,6 +43,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. diff --git a/arch/arm/src/stm32h5/stm32h5xx_rcc.c b/arch/arm/src/stm32h5/stm32h5xx_rcc.c index 97745487294..472092baec9 100644 --- a/arch/arm/src/stm32h5/stm32h5xx_rcc.c +++ b/arch/arm/src/stm32h5/stm32h5xx_rcc.c @@ -28,6 +28,8 @@ #include <arch/stm32h5/chip.h> #include <arch/board/board.h> +#include <assert.h> + #include "stm32_pwr.h" #include "stm32_flash.h" #include "stm32_rcc.h" @@ -37,6 +39,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32h7/stm32_lse.c b/arch/arm/src/stm32h7/stm32_lse.c index a9d7cfb4fa1..e55b9936798 100644 --- a/arch/arm/src/stm32h7/stm32_lse.c +++ b/arch/arm/src/stm32h7/stm32_lse.c @@ -26,6 +26,8 @@ #include <nuttx/config.h> +#include <assert.h> + #include "arm_internal.h" #include "stm32_rcc.h" #include "stm32_pwr.h" @@ -35,6 +37,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + #define LSERDY_TIMEOUT (500 * CONFIG_BOARD_LOOPSPERMSEC) #ifdef CONFIG_STM32H7_RTC_LSECLOCK_START_DRV_CAPABILITY diff --git a/arch/arm/src/stm32h7/stm32_rcc.c b/arch/arm/src/stm32h7/stm32_rcc.c index f79c9c11259..445146a501e 100644 --- a/arch/arm/src/stm32h7/stm32_rcc.c +++ b/arch/arm/src/stm32h7/stm32_rcc.c @@ -43,6 +43,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. diff --git a/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c b/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c index 77e6e6b4118..291c26b8632 100644 --- a/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c +++ b/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c @@ -24,6 +24,8 @@ * Included Files ****************************************************************************/ +#include <assert.h> + #include "stm32_pwr.h" #include "hardware/stm32_axi.h" #include "hardware/stm32_syscfg.h" @@ -32,6 +34,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c b/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c index 95944ad7110..2a032086236 100644 --- a/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c +++ b/arch/arm/src/stm32h7/stm32h7x7xx_rcc.c @@ -24,6 +24,8 @@ * Included Files ****************************************************************************/ +#include <assert.h> + #include "stm32_pwr.h" #include "hardware/stm32_axi.h" #include "hardware/stm32_syscfg.h" @@ -32,6 +34,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32l4/stm32l4_rcc.c b/arch/arm/src/stm32l4/stm32l4_rcc.c index ac3c887e827..202ac87415f 100644 --- a/arch/arm/src/stm32l4/stm32l4_rcc.c +++ b/arch/arm/src/stm32l4/stm32l4_rcc.c @@ -59,6 +59,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. diff --git a/arch/arm/src/stm32l4/stm32l4x3xx_rcc.c b/arch/arm/src/stm32l4/stm32l4x3xx_rcc.c index b88f064b7bb..31e48e84d61 100644 --- a/arch/arm/src/stm32l4/stm32l4x3xx_rcc.c +++ b/arch/arm/src/stm32l4/stm32l4x3xx_rcc.c @@ -27,6 +27,8 @@ #include <nuttx/config.h> #include <arch/stm32l4/chip.h> +#include <assert.h> + #include "stm32l4_pwr.h" #include "stm32l4_flash.h" #include "stm32l4_hsi48.h" @@ -35,6 +37,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32l4/stm32l4x5xx_rcc.c b/arch/arm/src/stm32l4/stm32l4x5xx_rcc.c index 0036eebd29d..b6c1903edd9 100644 --- a/arch/arm/src/stm32l4/stm32l4x5xx_rcc.c +++ b/arch/arm/src/stm32l4/stm32l4x5xx_rcc.c @@ -27,6 +27,8 @@ #include <nuttx/config.h> #include <arch/stm32l4/chip.h> +#include <assert.h> + #include "stm32l4_pwr.h" #include "stm32l4_flash.h" @@ -34,6 +36,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c b/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c index f77c8531389..1673c9a2abd 100644 --- a/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c +++ b/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c @@ -27,6 +27,8 @@ #include <nuttx/config.h> #include <arch/stm32l4/chip.h> +#include <assert.h> + #include "stm32l4_pwr.h" #include "stm32l4_flash.h" #include "stm32l4_hsi48.h" @@ -35,6 +37,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32l4/stm32l4xrxx_rcc.c b/arch/arm/src/stm32l4/stm32l4xrxx_rcc.c index 38bb416c56a..0add98c9003 100644 --- a/arch/arm/src/stm32l4/stm32l4xrxx_rcc.c +++ b/arch/arm/src/stm32l4/stm32l4xrxx_rcc.c @@ -27,6 +27,8 @@ #include <nuttx/config.h> #include <arch/stm32l4/chip.h> +#include <assert.h> + #include "stm32l4_pwr.h" #include "stm32l4_flash.h" #include "stm32l4_hsi48.h" @@ -35,6 +37,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32l5/stm32l562xx_rcc.c b/arch/arm/src/stm32l5/stm32l562xx_rcc.c index fdc1a3e2858..b1f582519e6 100644 --- a/arch/arm/src/stm32l5/stm32l562xx_rcc.c +++ b/arch/arm/src/stm32l5/stm32l562xx_rcc.c @@ -28,6 +28,8 @@ #include <arch/stm32l5/chip.h> #include <arch/board/board.h> +#include <assert.h> + #include "stm32l5_pwr.h" #include "stm32l5_flash.h" #include "stm32l5_rcc.h" @@ -36,6 +38,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32l5/stm32l5_lse.c b/arch/arm/src/stm32l5/stm32l5_lse.c index 791c7ca474a..b990134a4f7 100644 --- a/arch/arm/src/stm32l5/stm32l5_lse.c +++ b/arch/arm/src/stm32l5/stm32l5_lse.c @@ -26,6 +26,8 @@ #include <nuttx/config.h> +#include <assert.h> + #include "arm_internal.h" #include "stm32l5_pwr.h" #include "stm32l5_rcc.h" @@ -35,6 +37,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + #define LSERDY_TIMEOUT (500 * CONFIG_BOARD_LOOPSPERMSEC) #ifdef CONFIG_STM32L5_RTC_LSECLOCK_START_DRV_CAPABILITY diff --git a/arch/arm/src/stm32l5/stm32l5_rcc.c b/arch/arm/src/stm32l5/stm32l5_rcc.c index b2c0ff1c265..e42ee605586 100644 --- a/arch/arm/src/stm32l5/stm32l5_rcc.c +++ b/arch/arm/src/stm32l5/stm32l5_rcc.c @@ -44,6 +44,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. diff --git a/arch/arm/src/stm32u5/stm32_lse.c b/arch/arm/src/stm32u5/stm32_lse.c index 65efe64cfdf..70438d4e8b0 100644 --- a/arch/arm/src/stm32u5/stm32_lse.c +++ b/arch/arm/src/stm32u5/stm32_lse.c @@ -26,6 +26,8 @@ #include <nuttx/config.h> +#include <assert.h> + #include "arm_internal.h" #include "stm32_pwr.h" #include "stm32_rcc.h" @@ -35,6 +37,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + #define LSERDY_TIMEOUT (500 * CONFIG_BOARD_LOOPSPERMSEC) #ifdef CONFIG_STM32U5_RTC_LSECLOCK_START_DRV_CAPABILITY diff --git a/arch/arm/src/stm32u5/stm32_pwr.c b/arch/arm/src/stm32u5/stm32_pwr.c index 86d1436e7ca..db6881cbd35 100644 --- a/arch/arm/src/stm32u5/stm32_pwr.c +++ b/arch/arm/src/stm32u5/stm32_pwr.c @@ -40,6 +40,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + #define PWR_TIMEOUT (10 * CONFIG_BOARD_LOOPSPERMSEC) /**************************************************************************** diff --git a/arch/arm/src/stm32u5/stm32_rcc.c b/arch/arm/src/stm32u5/stm32_rcc.c index 58625b92947..ce9f457616d 100644 --- a/arch/arm/src/stm32u5/stm32_rcc.c +++ b/arch/arm/src/stm32u5/stm32_rcc.c @@ -44,6 +44,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. diff --git a/arch/arm/src/stm32u5/stm32u5xx_rcc.c b/arch/arm/src/stm32u5/stm32u5xx_rcc.c index 4e7e56f556c..3fb5798bd7f 100644 --- a/arch/arm/src/stm32u5/stm32u5xx_rcc.c +++ b/arch/arm/src/stm32u5/stm32u5xx_rcc.c @@ -28,6 +28,8 @@ #include <arch/stm32u5/chip.h> #include <arch/board/board.h> +#include <assert.h> + #include "stm32_pwr.h" #include "stm32_flash.h" #include "stm32_rcc.h" @@ -36,6 +38,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. Normally this is very fast, but I have seen at least one diff --git a/arch/arm/src/stm32wb/stm32wb_rcc.c b/arch/arm/src/stm32wb/stm32wb_rcc.c index cc288a327b9..b3a6ea25017 100644 --- a/arch/arm/src/stm32wb/stm32wb_rcc.c +++ b/arch/arm/src/stm32wb/stm32wb_rcc.c @@ -44,6 +44,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + /* Allow up to 100 milliseconds for the high speed clock to become ready. * that is a very long delay, but if the clock does not become ready we are * hosed anyway. diff --git a/arch/arm/src/stm32wl5/stm32wl5_lse.c b/arch/arm/src/stm32wl5/stm32wl5_lse.c index 27f67a216ec..5abad5f93ab 100644 --- a/arch/arm/src/stm32wl5/stm32wl5_lse.c +++ b/arch/arm/src/stm32wl5/stm32wl5_lse.c @@ -26,6 +26,8 @@ #include <nuttx/config.h> +#include <assert.h> + #include "arm_internal.h" #include "stm32wl5_pwr.h" @@ -36,6 +38,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + #define LSERDY_TIMEOUT (500 * CONFIG_BOARD_LOOPSPERMSEC) #ifdef CONFIG_STM32WL5_RTC_LSECLOCK_START_DRV_CAPABILITY diff --git a/arch/risc-v/src/rv32m1/rv32m1_delay.c b/arch/risc-v/src/rv32m1/rv32m1_delay.c index 1f39c7a6d53..357b5c6efbd 100644 --- a/arch/risc-v/src/rv32m1/rv32m1_delay.c +++ b/arch/risc-v/src/rv32m1/rv32m1_delay.c @@ -35,6 +35,9 @@ * Pre-processor Definitions ****************************************************************************/ +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + #define CONFIG_BOARD_LOOPSPER100USEC ((CONFIG_BOARD_LOOPSPERMSEC+5)/10) #define CONFIG_BOARD_LOOPSPER10USEC ((CONFIG_BOARD_LOOPSPERMSEC+50)/100) #define CONFIG_BOARD_LOOPSPERUSEC ((CONFIG_BOARD_LOOPSPERMSEC+500)/1000) diff --git a/drivers/timers/arch_alarm.c b/drivers/timers/arch_alarm.c index 8c0140bc2a3..557a326f36e 100644 --- a/drivers/timers/arch_alarm.c +++ b/drivers/timers/arch_alarm.c @@ -36,7 +36,13 @@ * Pre-processor Definitions ****************************************************************************/ -#ifndef CONFIG_BOARD_LOOPSPERMSEC +/* If no value is given, we proceed with 0 since a one-shot timer is used for + * accurate delays. A runtime DEBUGASSERT catches the case where the one-shot + * timer lower-half isn't registered in time. + */ + +#if CONFIG_BOARD_LOOPSPERMSEC == -1 +# undef CONFIG_BOARD_LOOPSPERMSEC # define CONFIG_BOARD_LOOPSPERMSEC 0 #endif diff --git a/drivers/timers/arch_timer.c b/drivers/timers/arch_timer.c index da4bf6a486d..46d1144466e 100644 --- a/drivers/timers/arch_timer.c +++ b/drivers/timers/arch_timer.c @@ -36,7 +36,13 @@ * Pre-processor Definitions ****************************************************************************/ -#ifndef CONFIG_BOARD_LOOPSPERMSEC +/* If no value is given, we proceed with 0 since a timer is used for accurate + * delays. A runtime DEBUGASSERT catches the case where the timer lower-half + * isn't registered in time. + */ + +#if CONFIG_BOARD_LOOPSPERMSEC == -1 +# undef CONFIG_BOARD_LOOPSPERMSEC # define CONFIG_BOARD_LOOPSPERMSEC 0 #endif diff --git a/sched/clock/CMakeLists.txt b/sched/clock/CMakeLists.txt index 617c811a39b..7d4e6a85b1f 100644 --- a/sched/clock/CMakeLists.txt +++ b/sched/clock/CMakeLists.txt @@ -38,7 +38,7 @@ set(SRCS # don't want the weak references to conflict. if(NOT CONFIG_TIMER_ARCH AND NOT CONFIG_ALARM_ARCH) - list(APPEND SRCS delay.c) + list(APPEND SRCS clock_delay.c) endif() if(CONFIG_CLOCK_TIMEKEEPING) diff --git a/sched/clock/Make.defs b/sched/clock/Make.defs index b9f8d846ca6..f3250f30122 100644 --- a/sched/clock/Make.defs +++ b/sched/clock/Make.defs @@ -31,7 +31,7 @@ CSRCS += clock_notifier.c ifneq ($(CONFIG_TIMER_ARCH),y) ifneq ($(CONFIG_ALARM_ARCH),y) - CSRCS += delay.c + CSRCS += clock_delay.c endif endif diff --git a/sched/clock/delay.c b/sched/clock/clock_delay.c similarity index 86% rename from sched/clock/delay.c rename to sched/clock/clock_delay.c index bf65177307f..cf3e2f0c902 100644 --- a/sched/clock/delay.c +++ b/sched/clock/clock_delay.c @@ -1,5 +1,5 @@ /**************************************************************************** - * sched/clock/delay.c + * sched/clock/clock_delay.c * * SPDX-License-Identifier: Apache-2.0 * @@ -56,6 +56,20 @@ * Pre-processor Definitions ****************************************************************************/ +#if defined(CONFIG_BOARD_LOOPSPERMSEC) && CONFIG_BOARD_LOOPSPERMSEC == 0 +#warning \ + "CONFIG_BOARD_LOOPSPERMSEC is set to 0 even though this architecture does" \ + "not rely on timer or alarm drivers for correct timings. up_udelay() and " \ + "similar delay functions will not work correctly. Please determine an " \ + "appropriate value for CONFIG_BOARD_LOOPSPERMSEC using the calib_udelay " \ + "application in nuttx-apps. If this configuration is a NuttX provided " \ + "configuration, it would be appreciated if you submit a patch with the " \ + "new value to apache/nuttx." +#endif + +static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1, + "Configure BOARD_LOOPSPERMSEC to non-default value."); + #define CONFIG_BOARD_LOOPSPER100USEC ((CONFIG_BOARD_LOOPSPERMSEC+5)/10) #define CONFIG_BOARD_LOOPSPER10USEC ((CONFIG_BOARD_LOOPSPERMSEC+50)/100) #define CONFIG_BOARD_LOOPSPERUSEC ((CONFIG_BOARD_LOOPSPERMSEC+500)/1000)
