Cheng-Logic commented on issue #18469:
URL: https://github.com/apache/nuttx/issues/18469#issuecomment-3979046267
The lfs_format failure with commitcrc mismatch under CONFIG_SMP=y exposes a
fatal cross-core cache collision on the ESP32-S3's eXecute-In-Place (XIP) bus.
When Core 0 initiates a physical SPI flash Erase/Write, the flash controller
temporarily disables the MMU cache; without a symmetric Inter-Processor Call
(IPC) barrier, Core 1 continues fetching instructions from the invalidated XIP
memory space, causing bus contention that physically corrupts the LittleFS
superblock write stream.
```C
// Architected Fix: nuttx/arch/xtensa/src/esp32s3/esp32s3_spiflash.c
// Strict SMP cross-core halting and cache invalidation before MTD flash
transactions.
static void esp32s3_spiflash_oplock(void)
{
#ifdef CONFIG_SMP
// 1. Force hardware-level pause on the sibling CPU via IPC to prevent XIP
fetches
int sibling_cpu = (this_cpu() == 0) ? 1 : 0;
up_cpu_pause(sibling_cpu);
#endif
// 2. Safely disable cache for the active CPU accessing the SPI Flash
Controller
cache_hal_disable(CACHE_TYPE_ALL);
}
static void esp32s3_spiflash_opunlock(void)
{
// 1. Restore MMU cache mapping
cache_hal_enable(CACHE_TYPE_ALL);
#ifdef CONFIG_SMP
// 2. Release the sibling CPU to resume execution
int sibling_cpu = (this_cpu() == 0) ? 1 : 0;
up_cpu_resume(sibling_cpu);
#endif
}
```
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