This is an automated email from the ASF dual-hosted git repository. acassis pushed a commit to branch master in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit f2ecb8b6e93bb26f8d7e5657f6e205677e749f72 Author: Pavel Pisa <[email protected]> AuthorDate: Mon Jun 9 13:16:09 2025 +0200 stm32h7: increase IRQ count to support stm32h723zg Increase IRQ count and add irqinfo handling in order to support the stm32h723zg chip. Signed-off-by: Pavel Pisa <[email protected]> --- arch/arm/include/stm32h7/stm32h7x3xx_irq.h | 2 +- arch/arm/src/stm32h7/stm32_irq.c | 32 ++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/stm32h7/stm32h7x3xx_irq.h b/arch/arm/include/stm32h7/stm32h7x3xx_irq.h index 6da365a4632..1da80f660ca 100644 --- a/arch/arm/include/stm32h7/stm32h7x3xx_irq.h +++ b/arch/arm/include/stm32h7/stm32h7x3xx_irq.h @@ -206,7 +206,7 @@ #define STM32_IRQ_RESERVED148 (STM32_IRQ_FIRST + 148) /* 148: Reserved */ #define STM32_IRQ_WKUP (STM32_IRQ_FIRST + 149) /* 149: WKUP1 to WKUP6 pins */ -#define STM32_IRQ_NEXTINTS 150 +#define STM32_IRQ_NEXTINTS 163 #define NR_IRQS (STM32_IRQ_FIRST + STM32_IRQ_NEXTINTS) #endif /* __ARCH_ARM_INCLUDE_STM32H7_STM32H7X3XX_IRQ_H */ diff --git a/arch/arm/src/stm32h7/stm32_irq.c b/arch/arm/src/stm32h7/stm32_irq.c index d5cb73fb1e9..a4c9313d684 100644 --- a/arch/arm/src/stm32h7/stm32_irq.c +++ b/arch/arm/src/stm32h7/stm32_irq.c @@ -322,6 +322,38 @@ static int stm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, *bit = 1 << (extint - 128); } else +#elif STM32_IRQ_NEXTINTS <= 192 + if (extint < 32) + { + *regaddr = (NVIC_IRQ0_31_ENABLE + offset); + *bit = 1 << extint; + } + else if (extint < 64) + { + *regaddr = (NVIC_IRQ32_63_ENABLE + offset); + *bit = 1 << (extint - 32); + } + else if (extint < 96) + { + *regaddr = (NVIC_IRQ64_95_ENABLE + offset); + *bit = 1 << (extint - 64); + } + else if (extint < 128) + { + *regaddr = (NVIC_IRQ96_127_ENABLE + offset); + *bit = 1 << (extint - 96); + } + else if (extint < 160) + { + *regaddr = (NVIC_IRQ128_159_ENABLE + offset); + *bit = 1 << (extint - 128); + } + else if (extint < STM32_IRQ_NEXTINTS) + { + *regaddr = (NVIC_IRQ160_191_ENABLE + offset); + *bit = 1 << (extint - 160); + } + else #else # warning Missing logic #endif
