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commit 4484f16efc45bbe995998dd126c13e27d9bb6d00 Author: raiden00pl <[email protected]> AuthorDate: Wed May 20 13:39:59 2026 +0200 boards/nucleo-c0XXX: add PWM support add PWM support for nucleo-c071rb and nucleo-c092rc Signed-off-by: raiden00pl <[email protected]> --- boards/arm/stm32f0l0g0/common/include/board_pwm.h | 40 +++++ boards/arm/stm32f0l0g0/common/src/CMakeLists.txt | 6 +- boards/arm/stm32f0l0g0/common/src/Make.defs | 4 + boards/arm/stm32f0l0g0/common/src/board_pwm.c | 174 +++++++++++++++++++++ .../nucleo-c071rb/configs/jumbo/defconfig | 8 + .../arm/stm32f0l0g0/nucleo-c071rb/include/board.h | 7 + .../stm32f0l0g0/nucleo-c071rb/src/stm32_bringup.c | 14 ++ .../nucleo-c092rc/configs/jumbo/defconfig | 8 + .../arm/stm32f0l0g0/nucleo-c092rc/include/board.h | 7 + .../stm32f0l0g0/nucleo-c092rc/src/stm32_bringup.c | 14 ++ 10 files changed, 281 insertions(+), 1 deletion(-) diff --git a/boards/arm/stm32f0l0g0/common/include/board_pwm.h b/boards/arm/stm32f0l0g0/common/include/board_pwm.h new file mode 100644 index 00000000000..b86407e0aa5 --- /dev/null +++ b/boards/arm/stm32f0l0g0/common/include/board_pwm.h @@ -0,0 +1,40 @@ +/**************************************************************************** + * boards/arm/stm32f0l0g0/common/include/board_pwm.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_STM32F0L0G0_COMMON_INCLUDE_BOARD_PWM_H +#define __BOARDS_ARM_STM32F0L0G0_COMMON_INCLUDE_BOARD_PWM_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_PWM +int stm32_pwm_setup(void); +#endif + +#endif /* __BOARDS_ARM_STM32F0L0G0_COMMON_INCLUDE_BOARD_PWM_H */ diff --git a/boards/arm/stm32f0l0g0/common/src/CMakeLists.txt b/boards/arm/stm32f0l0g0/common/src/CMakeLists.txt index 45d0130bc75..2b7dc2f3527 100644 --- a/boards/arm/stm32f0l0g0/common/src/CMakeLists.txt +++ b/boards/arm/stm32f0l0g0/common/src/CMakeLists.txt @@ -27,7 +27,11 @@ if(CONFIG_ARCH_BOARD_COMMON) endif() if(CONFIG_SENSORS_QENCODER) - list(APPEND SRCS stm32_qencoder.c) + list(APPEND SRCS board_qencoder.c) + endif() + + if(CONFIG_PWM) + list(APPEND SRCS board_pwm.c) endif() endif() diff --git a/boards/arm/stm32f0l0g0/common/src/Make.defs b/boards/arm/stm32f0l0g0/common/src/Make.defs index b3c6f854286..972383a6291 100644 --- a/boards/arm/stm32f0l0g0/common/src/Make.defs +++ b/boards/arm/stm32f0l0g0/common/src/Make.defs @@ -30,6 +30,10 @@ ifeq ($(CONFIG_SENSORS_QENCODER),y) CSRCS += board_qencoder.c endif +ifeq ($(CONFIG_PWM),y) + CSRCS += board_pwm.c +endif + DEPPATH += --dep-path src VPATH += :src CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)src diff --git a/boards/arm/stm32f0l0g0/common/src/board_pwm.c b/boards/arm/stm32f0l0g0/common/src/board_pwm.c new file mode 100644 index 00000000000..793b0398537 --- /dev/null +++ b/boards/arm/stm32f0l0g0/common/src/board_pwm.c @@ -0,0 +1,174 @@ +/**************************************************************************** + * boards/arm/stm32f0l0g0/common/src/board_pwm.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <errno.h> +#include <stdbool.h> +#include <sys/types.h> + +#include <nuttx/debug.h> +#include <nuttx/timers/pwm.h> + +#include "stm32_pwm.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_pwm_setup + * + * Description: + * Initialize PWM and register the PWM driver. + * + ****************************************************************************/ + +int stm32_pwm_setup(void) +{ + static bool initialized; + struct pwm_lowerhalf_s *pwm; + int ret; + + if (!initialized) + { +#ifdef CONFIG_STM32F0L0G0_TIM1_PWM + pwm = stm32_pwminitialize(1); + if (pwm == NULL) + { + aerr("ERROR: Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + aerr("ERROR: pwm_register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_STM32F0L0G0_TIM2_PWM + pwm = stm32_pwminitialize(2); + if (pwm == NULL) + { + aerr("ERROR: Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + ret = pwm_register("/dev/pwm1", pwm); + if (ret < 0) + { + aerr("ERROR: pwm_register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_STM32F0L0G0_TIM3_PWM + pwm = stm32_pwminitialize(3); + if (pwm == NULL) + { + aerr("ERROR: Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + ret = pwm_register("/dev/pwm2", pwm); + if (ret < 0) + { + aerr("ERROR: pwm_register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_STM32F0L0G0_TIM14_PWM + pwm = stm32_pwminitialize(14); + if (pwm == NULL) + { + aerr("ERROR: Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + ret = pwm_register("/dev/pwm13", pwm); + if (ret < 0) + { + aerr("ERROR: pwm_register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_STM32F0L0G0_TIM15_PWM + pwm = stm32_pwminitialize(15); + if (pwm == NULL) + { + aerr("ERROR: Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + ret = pwm_register("/dev/pwm14", pwm); + if (ret < 0) + { + aerr("ERROR: pwm_register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_STM32F0L0G0_TIM16_PWM + pwm = stm32_pwminitialize(16); + if (pwm == NULL) + { + aerr("ERROR: Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + ret = pwm_register("/dev/pwm15", pwm); + if (ret < 0) + { + aerr("ERROR: pwm_register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_STM32F0L0G0_TIM17_PWM + pwm = stm32_pwminitialize(17); + if (pwm == NULL) + { + aerr("ERROR: Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + ret = pwm_register("/dev/pwm16", pwm); + if (ret < 0) + { + aerr("ERROR: pwm_register failed: %d\n", ret); + return ret; + } +#endif + + initialized = true; + } + + return OK; +} diff --git a/boards/arm/stm32f0l0g0/nucleo-c071rb/configs/jumbo/defconfig b/boards/arm/stm32f0l0g0/nucleo-c071rb/configs/jumbo/defconfig index 3509e2d4848..effe787fe75 100644 --- a/boards/arm/stm32f0l0g0/nucleo-c071rb/configs/jumbo/defconfig +++ b/boards/arm/stm32f0l0g0/nucleo-c071rb/configs/jumbo/defconfig @@ -37,6 +37,8 @@ CONFIG_EXAMPLES_ADC_SWTRIG=y CONFIG_EXAMPLES_BUTTONS=y CONFIG_EXAMPLES_HELLO=y CONFIG_EXAMPLES_NXMBSERVER=y +CONFIG_EXAMPLES_PWM=y +CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm13" CONFIG_EXAMPLES_QENCODER=y CONFIG_EXAMPLES_WATCHDOG=y CONFIG_INDUSTRY_NXMODBUS=y @@ -57,6 +59,7 @@ CONFIG_NXMODBUS_CLIENT=y CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=1536 CONFIG_PTHREAD_MUTEX_UNSAFE=y CONFIG_PTHREAD_STACK_DEFAULT=1536 +CONFIG_PWM=y CONFIG_RAM_SIZE=24576 CONFIG_RAM_START=0x20000000 CONFIG_RAW_BINARY=y @@ -73,6 +76,11 @@ CONFIG_STM32F0L0G0_ADC1=y CONFIG_STM32F0L0G0_ADC_MAX_SAMPLES=6 CONFIG_STM32F0L0G0_DMA1=y CONFIG_STM32F0L0G0_IWDG=y +CONFIG_STM32F0L0G0_PWM_MULTICHAN=y +CONFIG_STM32F0L0G0_TIM14=y +CONFIG_STM32F0L0G0_TIM14_CH1OUT=y +CONFIG_STM32F0L0G0_TIM14_CHANNEL1=y +CONFIG_STM32F0L0G0_TIM14_PWM=y CONFIG_STM32F0L0G0_TIM3=y CONFIG_STM32F0L0G0_TIM3_QE=y CONFIG_STM32F0L0G0_USART1=y diff --git a/boards/arm/stm32f0l0g0/nucleo-c071rb/include/board.h b/boards/arm/stm32f0l0g0/nucleo-c071rb/include/board.h index 154ae1e8941..5ca9fdd6cfa 100644 --- a/boards/arm/stm32f0l0g0/nucleo-c071rb/include/board.h +++ b/boards/arm/stm32f0l0g0/nucleo-c071rb/include/board.h @@ -77,6 +77,7 @@ #define STM32_APB2_TIM1_CLKIN STM32_PCLK1_FREQUENCY #define STM32_APB1_TIM2_CLKIN STM32_PCLK1_FREQUENCY #define STM32_APB1_TIM3_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_APB2_TIM14_CLKIN STM32_PCLK1_FREQUENCY #define STM32_APB2_TIM15_CLKIN STM32_PCLK1_FREQUENCY #define STM32_APB2_TIM16_CLKIN STM32_PCLK1_FREQUENCY #define STM32_APB2_TIM17_CLKIN STM32_PCLK1_FREQUENCY @@ -170,6 +171,12 @@ #define GPIO_TIM3_CH1IN (GPIO_TIM3_CH1IN_2|GPIO_SPEED_HIGH) #define GPIO_TIM3_CH2IN (GPIO_TIM3_CH2IN_6|GPIO_SPEED_HIGH) +/* PWM on TIM14: + * TIM14_CH1 - PA7 (D11) + */ + +#define GPIO_TIM14_CH1OUT (GPIO_TIM14_CH1OUT_2|GPIO_SPEED_HIGH) + /* DMA channels *************************************************************/ /* ADC */ diff --git a/boards/arm/stm32f0l0g0/nucleo-c071rb/src/stm32_bringup.c b/boards/arm/stm32f0l0g0/nucleo-c071rb/src/stm32_bringup.c index 2110d39018e..574a196b778 100644 --- a/boards/arm/stm32f0l0g0/nucleo-c071rb/src/stm32_bringup.c +++ b/boards/arm/stm32f0l0g0/nucleo-c071rb/src/stm32_bringup.c @@ -46,6 +46,10 @@ # include "board_qencoder.h" #endif +#ifdef CONFIG_PWM +# include "board_pwm.h" +#endif + #include <arch/board/board.h> #include "nucleo-c071rb.h" @@ -110,6 +114,16 @@ int stm32_bringup(void) } #endif +#ifdef CONFIG_PWM + /* Initialize PWM and register the PWM device. */ + + ret = stm32_pwm_setup(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: stm32_pwm_setup failed: %d\n", ret); + } +#endif + #ifdef CONFIG_SENSORS_QENCODER /* Initialize and register the qencoder driver - TIM3 */ diff --git a/boards/arm/stm32f0l0g0/nucleo-c092rc/configs/jumbo/defconfig b/boards/arm/stm32f0l0g0/nucleo-c092rc/configs/jumbo/defconfig index 0bf1c6c009a..e3b8fb25c66 100644 --- a/boards/arm/stm32f0l0g0/nucleo-c092rc/configs/jumbo/defconfig +++ b/boards/arm/stm32f0l0g0/nucleo-c092rc/configs/jumbo/defconfig @@ -36,6 +36,8 @@ CONFIG_EXAMPLES_ADC_GROUPSIZE=2 CONFIG_EXAMPLES_ADC_SWTRIG=y CONFIG_EXAMPLES_BUTTONS=y CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_PWM=y +CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm13" CONFIG_EXAMPLES_QENCODER=y CONFIG_EXAMPLES_WATCHDOG=y CONFIG_INIT_ENTRYPOINT="nsh_main" @@ -54,6 +56,7 @@ CONFIG_NUNGET_CHARS=0 CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=1536 CONFIG_PTHREAD_MUTEX_UNSAFE=y CONFIG_PTHREAD_STACK_DEFAULT=1536 +CONFIG_PWM=y CONFIG_RAM_SIZE=30720 CONFIG_RAM_START=0x20000000 CONFIG_RAW_BINARY=y @@ -69,6 +72,11 @@ CONFIG_STM32F0L0G0_ADC1=y CONFIG_STM32F0L0G0_ADC_MAX_SAMPLES=2 CONFIG_STM32F0L0G0_DMA1=y CONFIG_STM32F0L0G0_IWDG=y +CONFIG_STM32F0L0G0_PWM_MULTICHAN=y +CONFIG_STM32F0L0G0_TIM14=y +CONFIG_STM32F0L0G0_TIM14_CH1OUT=y +CONFIG_STM32F0L0G0_TIM14_CHANNEL1=y +CONFIG_STM32F0L0G0_TIM14_PWM=y CONFIG_STM32F0L0G0_TIM3=y CONFIG_STM32F0L0G0_TIM3_QE=y CONFIG_STM32F0L0G0_USART2=y diff --git a/boards/arm/stm32f0l0g0/nucleo-c092rc/include/board.h b/boards/arm/stm32f0l0g0/nucleo-c092rc/include/board.h index fe9f5cf786a..153327b730c 100644 --- a/boards/arm/stm32f0l0g0/nucleo-c092rc/include/board.h +++ b/boards/arm/stm32f0l0g0/nucleo-c092rc/include/board.h @@ -82,6 +82,7 @@ #define STM32_APB2_TIM1_CLKIN STM32_PCLK1_FREQUENCY #define STM32_APB1_TIM2_CLKIN STM32_PCLK1_FREQUENCY #define STM32_APB1_TIM3_CLKIN STM32_PCLK1_FREQUENCY +#define STM32_APB2_TIM14_CLKIN STM32_PCLK1_FREQUENCY #define STM32_APB2_TIM15_CLKIN STM32_PCLK1_FREQUENCY #define STM32_APB2_TIM16_CLKIN STM32_PCLK1_FREQUENCY #define STM32_APB2_TIM17_CLKIN STM32_PCLK1_FREQUENCY @@ -180,6 +181,12 @@ #define GPIO_TIM3_CH1IN (GPIO_TIM3_CH1IN_2|GPIO_SPEED_HIGH) #define GPIO_TIM3_CH2IN (GPIO_TIM3_CH2IN_6|GPIO_SPEED_HIGH) +/* PWM on TIM14: + * TIM14_CH1 - PA7 (D11) + */ + +#define GPIO_TIM14_CH1OUT (GPIO_TIM14_CH1OUT_2|GPIO_SPEED_HIGH) + /* DMA channels *************************************************************/ /* ADC */ diff --git a/boards/arm/stm32f0l0g0/nucleo-c092rc/src/stm32_bringup.c b/boards/arm/stm32f0l0g0/nucleo-c092rc/src/stm32_bringup.c index 14f9820f52d..bab34624d47 100644 --- a/boards/arm/stm32f0l0g0/nucleo-c092rc/src/stm32_bringup.c +++ b/boards/arm/stm32f0l0g0/nucleo-c092rc/src/stm32_bringup.c @@ -46,6 +46,10 @@ # include "board_qencoder.h" #endif +#ifdef CONFIG_PWM +# include "board_pwm.h" +#endif + #include <arch/board/board.h> #include "nucleo-c092rc.h" @@ -110,6 +114,16 @@ int stm32_bringup(void) } #endif +#ifdef CONFIG_PWM + /* Initialize PWM and register the PWM device. */ + + ret = stm32_pwm_setup(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: stm32_pwm_setup failed: %d\n", ret); + } +#endif + #ifdef CONFIG_STM32F0L0G0_FDCAN_CHARDRIVER /* Initialize CAN and register the CAN driver. */
