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new 2c8dc175102 arch/risc-v: Enable setting cache line size for ESP32-P4
2c8dc175102 is described below
commit 2c8dc1751029601a65daffd9233d20a1d153aef0
Author: Tiago Medicci Serrano <[email protected]>
AuthorDate: Thu May 21 10:05:13 2026 +0200
arch/risc-v: Enable setting cache line size for ESP32-P4
Enables setting the cache line size for ESP32-P4 using Kconfig
options.
Signed-off-by: Tiago Medicci Serrano <[email protected]>
---
arch/risc-v/src/common/espressif/CMakeLists.txt | 2 +-
arch/risc-v/src/common/espressif/Make.defs | 2 +-
arch/risc-v/src/esp32p4/Kconfig | 53 +++++++++++++++++++++++++
3 files changed, 55 insertions(+), 2 deletions(-)
diff --git a/arch/risc-v/src/common/espressif/CMakeLists.txt
b/arch/risc-v/src/common/espressif/CMakeLists.txt
index 5339014b6a2..193ac31d979 100644
--- a/arch/risc-v/src/common/espressif/CMakeLists.txt
+++ b/arch/risc-v/src/common/espressif/CMakeLists.txt
@@ -213,7 +213,7 @@ if(DEFINED ENV{ESP_HAL_3RDPARTY_VERSION})
CACHE STRING "ESP HAL 3rdparty version")
else()
set(ESP_HAL_3RDPARTY_VERSION
- 9e9626fe059689a24e8d12f4b72d5ab2791de194
+ baafe6da2b9cf6a700bc3794472dad143bce3a2d
CACHE STRING "ESP HAL 3rdparty version")
endif()
diff --git a/arch/risc-v/src/common/espressif/Make.defs
b/arch/risc-v/src/common/espressif/Make.defs
index fe213bf835a..c80c0fa4561 100644
--- a/arch/risc-v/src/common/espressif/Make.defs
+++ b/arch/risc-v/src/common/espressif/Make.defs
@@ -229,7 +229,7 @@ endif
ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
ifndef ESP_HAL_3RDPARTY_VERSION
- ESP_HAL_3RDPARTY_VERSION = 9e9626fe059689a24e8d12f4b72d5ab2791de194
+ ESP_HAL_3RDPARTY_VERSION = baafe6da2b9cf6a700bc3794472dad143bce3a2d
endif
ifndef ESP_HAL_3RDPARTY_URL
diff --git a/arch/risc-v/src/esp32p4/Kconfig b/arch/risc-v/src/esp32p4/Kconfig
index 1dd503c00e6..68ddf4b7a05 100644
--- a/arch/risc-v/src/esp32p4/Kconfig
+++ b/arch/risc-v/src/esp32p4/Kconfig
@@ -90,6 +90,59 @@ config ESP_EFUSE_BLOCK_REV_MAX_FULL
# The revision in the comment must correspond to the default value of
ESP_EFUSE_BLOCK_REV_MAX_FULL
+menu "Cache config"
+
+choice ESPRESSIF_CACHE_L2_CACHE_SIZE_SELECT
+ prompt "L2 cache size"
+ default ESPRESSIF_CACHE_L2_CACHE_256KB
+ ---help---
+ L2 cache size to be set on application startup.
+
+config ESPRESSIF_CACHE_L2_CACHE_128KB
+ bool "128KB"
+
+config ESPRESSIF_CACHE_L2_CACHE_256KB
+ bool "256KB"
+
+config ESPRESSIF_CACHE_L2_CACHE_512KB
+ bool "512KB"
+
+endchoice # ESPRESSIF_CACHE_L2_CACHE_SIZE_SELECT
+
+config ESPRESSIF_CACHE_L2_CACHE_SIZE
+ hex
+ default 0x20000 if ESPRESSIF_CACHE_L2_CACHE_128KB
+ default 0x40000 if ESPRESSIF_CACHE_L2_CACHE_256KB
+ default 0x80000 if ESPRESSIF_CACHE_L2_CACHE_512KB
+
+choice ESPRESSIF_CACHE_L2_CACHE_LINE_SIZE_SELECT
+ prompt "L2 cache line size"
+ default ESPRESSIF_CACHE_L2_CACHE_LINE_64B if
ESPRESSIF_CACHE_L2_CACHE_128KB
+ default ESPRESSIF_CACHE_L2_CACHE_LINE_64B if
ESPRESSIF_CACHE_L2_CACHE_256KB
+ default ESPRESSIF_CACHE_L2_CACHE_LINE_128B if
ESPRESSIF_CACHE_L2_CACHE_512KB
+ ---help---
+ L2 cache line size to be set on application startup.
+
+config ESPRESSIF_CACHE_L2_CACHE_LINE_64B
+ bool "64 Bytes"
+ depends on ESPRESSIF_CACHE_L2_CACHE_128KB ||
ESPRESSIF_CACHE_L2_CACHE_256KB
+
+config ESPRESSIF_CACHE_L2_CACHE_LINE_128B
+ bool "128 Bytes"
+
+endchoice # ESPRESSIF_CACHE_L2_CACHE_LINE_SIZE_SELECT
+
+config ESPRESSIF_CACHE_L2_CACHE_LINE_SIZE
+ int
+ default 64 if ESPRESSIF_CACHE_L2_CACHE_LINE_64B
+ default 128 if ESPRESSIF_CACHE_L2_CACHE_LINE_128B
+
+config ESPRESSIF_CACHE_L1_CACHE_LINE_SIZE
+ int
+ default 64
+
+endmenu # Cache config
+
endif # ARCH_CHIP_ESP32P4
config P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND
