xiaoxiang781216 commented on code in PR #17229:
URL: https://github.com/apache/nuttx/pull/17229#discussion_r3288664806
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boards/arm/am67/t3-gem-o1/scripts/Make.defs:
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@@ -28,7 +28,6 @@ LDSCRIPT = sdram.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 -ffixed-r10
-ARCHCFLAGS += -std=gnu11 -include $(TOPDIR)/arch/arm/src/am67/am67_atomic_fix.h
Review Comment:
drop the original patch directly
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arch/arm/src/am67/Make.defs:
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@@ -22,6 +22,10 @@
include armv7-r/Make.defs
+ifeq ($(CONFIG_BUILD_FLAT),y)
+ CMN_UCSRCS := $(filter-out arm_perf.c,$(CMN_UCSRCS))
Review Comment:
what's problem? arm_perf.c should work in flat build
##########
arch/arm/src/am67/am67_mpuinit.h:
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@@ -135,7 +137,7 @@
static inline void am67_mpu_disable_br(void)
{
unsigned int sctlr = cp15_rdsctlr();
- sctlr &= ~(1 << 17); /* Clear bit 17 (disable background region) */
+ sctlr &= ~AM67_SCTLR_BG_REGION_EN; /* Clear bit 17 (disable background
region) */
Review Comment:
merge to the inital patch
##########
boards/arm/am67/t3-gem-o1/configs/nsh/defconfig:
##########
@@ -21,7 +22,6 @@ CONFIG_ARCH_CHIP_AM67=y
CONFIG_ARCH_INTERRUPTSTACK=4096
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARMV7R_HAVE_GICv2=n
Review Comment:
merge to the inital patch
##########
arch/arm/src/am67/am67_timer.c:
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@@ -435,7 +435,16 @@ int timer_tick_isr(int irq, void *context, void *arg)
int up_timer_gettime(struct timespec *ts)
{
- return am67_timer_get_count(AM67_DMTIMER1_1MS_TIMER0_VADDR);
+ uint64_t internal_timer;
+
+ DEBUGASSERT(ts != NULL);
+
+ internal_timer = am67_timer_get_count(AM67_DMTIMER1_1MS_TIMER0_VADDR);
+
+ ts->tv_nsec = (uint32_t)(internal_timer * 1000000);
+ ts->tv_sec = (uint32_t)(internal_timer / 1000);
Review Comment:
remove the cast
##########
arch/arm/src/am67/am67_timer.c:
##########
@@ -435,7 +435,16 @@ int timer_tick_isr(int irq, void *context, void *arg)
int up_timer_gettime(struct timespec *ts)
{
- return am67_timer_get_count(AM67_DMTIMER1_1MS_TIMER0_VADDR);
+ uint64_t internal_timer;
Review Comment:
why not merge into the initial patch
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arch/arm/src/am67/am67_atomic_fix.h:
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@@ -0,0 +1,143 @@
+/****************************************************************************
Review Comment:
drop this patch directly
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boards/arm/am67/t3-gem-o1/configs/nsh/defconfig:
##########
@@ -31,7 +31,6 @@ CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_LIBC_ARCH_ATOMIC=y
-CONFIG_NSH_ARCHINIT=y
Review Comment:
merge to the origin patch
##########
boards/arm/am67/t3-gem-o1/scripts/Make.defs:
##########
@@ -28,7 +28,7 @@ LDSCRIPT = sdram.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 -ffixed-r10
-
+ARCHCFLAGS += -std=gnu11 -include $(TOPDIR)/arch/arm/src/am67/am67_atomic_fix.h
Review Comment:
remove
##########
arch/arm/src/am67/am67_irq.c:
##########
@@ -185,33 +185,6 @@ static void intr_set_irq_vec_addr(uint32_t int_num,
uintptr_t vec_addr)
INTRC_BASE_ADDR + VIM_INT_VEC(int_num));
}
-/****************************************************************************
- * Name: utils_data_and_instruction_barrier
- *
- * Description:
- * Enforces CPU memory ordering by executing an Instruction Synchronization
- * Barrier (ISB) followed by a Data Synchronization Barrier (DSB),
- * ensuring all previous instructions complete and memory accesses are
- * synchronized before continuing execution.
- *
- ****************************************************************************/
-
-static void utils_data_and_instruction_barrier(void)
Review Comment:
merge to the inital patch
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