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commit 207bddc40f236984f3558d6d556072d919f2181c Author: raiden00pl <[email protected]> AuthorDate: Wed May 20 10:17:59 2026 +0200 arch: remove PULSECOUNT references from PWM drivers remove PULSECOUNT references from PWM drivers that not implemet PWM feature. PULSECOUNT for these architectures was not implemented, so we just remove all references to it. Signed-off-by: raiden00pl <[email protected]> --- arch/arm/src/efm32/Kconfig | 4 - arch/arm/src/efm32/efm32_pwm.c | 204 -------------------------------------- arch/arm/src/gd32f4/Kconfig | 1 - arch/arm/src/nrf52/nrf52_pwm.c | 15 --- arch/arm/src/nrf53/nrf53_pwm.c | 15 --- arch/arm/src/sama5/sam_pwm.c | 6 -- arch/arm/src/stm32l5/Kconfig | 6 -- arch/arm/src/stm32u5/Kconfig | 1 - arch/risc-v/src/litex/litex_pwm.c | 4 - 9 files changed, 256 deletions(-) diff --git a/arch/arm/src/efm32/Kconfig b/arch/arm/src/efm32/Kconfig index f3e60230dde..a2fec0f4e63 100644 --- a/arch/arm/src/efm32/Kconfig +++ b/arch/arm/src/efm32/Kconfig @@ -499,7 +499,6 @@ config EFM32_TIMER0_PWM bool "TIMER0 PWM" default n depends on EFM32_TIMER0 - select ARCH_HAVE_PWM_PULSECOUNT ---help--- Reserve timer 0 for use by PWM @@ -527,7 +526,6 @@ config EFM32_TIMER1_PWM bool "TIMER1 PWM" default n depends on EFM32_TIMER1 - select ARCH_HAVE_PWM_PULSECOUNT ---help--- Reserve timer 0 for use by PWM @@ -555,7 +553,6 @@ config EFM32_TIMER2_PWM bool "TIMER2 PWM" default n depends on EFM32_TIMER2 - select ARCH_HAVE_PWM_PULSECOUNT ---help--- Reserve timer 0 for use by PWM @@ -583,7 +580,6 @@ config EFM32_TIMER3_PWM bool "TIMER3 PWM" default n depends on EFM32_TIMER3 - select ARCH_HAVE_PWM_PULSECOUNT ---help--- Reserve timer 0 for use by PWM diff --git a/arch/arm/src/efm32/efm32_pwm.c b/arch/arm/src/efm32/efm32_pwm.c index 41ddea21f74..96ec9616ca2 100644 --- a/arch/arm/src/efm32/efm32_pwm.c +++ b/arch/arm/src/efm32/efm32_pwm.c @@ -81,19 +81,10 @@ struct efm32_pwmtimer_s uint8_t timid; /* Timer ID {1,...,14} */ uint8_t channel; /* Timer output channel: {1,..4} */ uint8_t pinloc; /* Timer output channel pin location */ -#ifdef CONFIG_PWM_PULSECOUNT - uint8_t irq; /* Timer update IRQ */ - uint8_t prev; /* The previous value of the RCR (pre-loaded) */ - uint8_t curr; /* The current value of the RCR (pre-loaded) */ - uint32_t count; /* Remaining pulse count */ -#endif uint32_t base; /* The base address of the timer */ uint32_t pincfg; /* Output pin configuration */ uint32_t pclk; /* The frequency of the peripheral clock * that drives the timer module. */ -#ifdef CONFIG_PWM_PULSECOUNT - void *handle; /* Handle used for upper-half callback */ -#endif }; /**************************************************************************** @@ -117,29 +108,13 @@ static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, const char *msg); static int pwm_timer(struct efm32_pwmtimer_s *priv, const struct pwm_info_s *info); -#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_EFM32_TIMER0_PWM) || \ - defined(CONFIG_EFM32_TIMER1_PWM) || \ - defined(CONFIG_EFM32_TIMER2_PWM) || \ - defined(CONFIG_EFM32_TIMER3_PWM) \ - ) -static int pwm_interrupt(int irq, void *context, void *arg); -static uint8_t pwm_pulsecount(uint32_t count); - -#endif - /* PWM driver methods */ static int pwm_setup(struct pwm_lowerhalf_s *dev); static int pwm_shutdown(struct pwm_lowerhalf_s *dev); -#ifdef CONFIG_PWM_PULSECOUNT -static int pwm_start(struct pwm_lowerhalf_s *dev, - const struct pwm_info_s *info, - void *handle); -#else static int pwm_start(struct pwm_lowerhalf_s *dev, const struct pwm_info_s *info); -#endif static int pwm_stop(struct pwm_lowerhalf_s *dev); static int pwm_ioctl(struct pwm_lowerhalf_s *dev, @@ -168,9 +143,6 @@ static struct efm32_pwmtimer_s g_pwm0dev = .ops = &g_pwmops, .timid = 0, .channel = CONFIG_EFM32_TIMER0_CHANNEL, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = EFM32_IRQ_TIMER0, -#endif .base = EFM32_TIMER0_BASE, .pincfg = BOARD_PWM_TIMER0_PINCFG, .pinloc = BOARD_PWM_TIMER0_PINLOC, @@ -184,9 +156,6 @@ static struct efm32_pwmtimer_s g_pwm1dev = .ops = &g_pwmops, .timid = 0, .channel = CONFIG_EFM32_TIMER1_CHANNEL, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = EFM32_IRQ_TIMER1, -#endif .base = EFM32_TIMER1_BASE, .pincfg = BOARD_PWM_TIMER1_PINCFG, .pinloc = BOARD_PWM_TIMER1_PINLOC, @@ -200,9 +169,6 @@ static struct efm32_pwmtimer_s g_pwm2dev = .ops = &g_pwmops, .timid = 0, .channel = CONFIG_EFM32_TIMER2_CHANNEL, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = EFM32_IRQ_TIMER2, -#endif .base = EFM32_TIMER2_BASE, .pincfg = BOARD_PWM_TIMER2_PINCFG, .pinloc = BOARD_PWM_TIMER2_PINLOC, @@ -216,9 +182,6 @@ static struct efm32_pwmtimer_s g_pwm3dev = .ops = &g_pwmops, .timid = 0, .channel = CONFIG_EFM32_TIMER3_CHANNEL, -#ifdef CONFIG_PWM_PULSECOUNT - .irq = EFM32_IRQ_TIMER3, -#endif .base = EFM32_TIMER3_BASE, .pincfg = BOARD_PWM_TIMER3_PINCFG, .pinloc = BOARD_PWM_TIMER3_PINLOC, @@ -357,24 +320,14 @@ static int pwm_timer(struct efm32_pwmtimer_s *priv, DEBUGASSERT(priv != NULL && info != NULL); -#ifdef CONFIG_PWM_PULSECOUNT - pwminfo("TIMER%d channel: %d frequency: %d duty: %08x count: %d\n", - priv->timid, priv->channel, info->frequency, - info->channels[0].duty, info->channels[0].count); -#else pwminfo("TIMER%d channel: %d frequency: %d duty: %08x\n", priv->timid, priv->channel, info->frequency, info->channels[0].duty); -#endif DEBUGASSERT(info->frequency > 0 && info->channels[0].duty >= 0 && info->channels[0].duty < uitoub16(100)); efm32_timer_reset(priv->base); -#ifdef CONFIG_PWM_PULSECOUNT -#error "Not implemented ! Sorry" -#endif - if (efm32_timer_set_freq(priv->base, priv->pclk, info->frequency) < 0) { pwmerr("ERROR: Cannot set TIMER frequency %dHz from clock %dHz\n", @@ -437,141 +390,6 @@ static int pwm_timer(struct efm32_pwmtimer_s *priv, * ****************************************************************************/ -#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_EFM32_TIMER0_PWM) || \ - defined(CONFIG_EFM32_TIMER1_PWM) || \ - defined(CONFIG_EFM32_TIMER2_PWM) || \ - defined(CONFIG_EFM32_TIMER3_PWM) \ - ) -#warning "not yet implemented" -static int pwm_interrupt(int irq, void *context, void *arg) -{ - /* TODO pwm_interrupt */ -#if 0 - struct efm32_pwmtimer_s *priv = (struct efm32_pwmtimer_s *)arg; - uint32_t regval; - - DEBUGASSERT(priv != NULL); - - /* Verify that this is an update interrupt. Nothing else is expected. */ - - regval = pwm_getreg(priv, STM32_ATIM_SR_OFFSET); - DEBUGASSERT((regval & ATIM_SR_UIF) != 0); - - /* Clear the UIF interrupt bit */ - - pwm_putreg(priv, STM32_ATIM_SR_OFFSET, regval & ~ATIM_SR_UIF); - - /* Calculate the new count by subtracting the number of pulses - * since the last interrupt. - */ - - if (priv->count <= priv->prev) - { - /* We are finished. Turn off the mast output to stop the output as - * quickly as possible. - */ - - regval = pwm_getreg(priv, STM32_ATIM_BDTR_OFFSET); - regval &= ~ATIM_BDTR_MOE; - pwm_putreg(priv, STM32_ATIM_BDTR_OFFSET, regval); - - /* Disable first interrupts, stop and reset the timer */ - - pwm_stop((struct pwm_lowerhalf_s *)priv); - - /* Then perform the callback into the upper half driver */ - - pwm_expired(priv->handle); - - priv->handle = NULL; - priv->count = 0; - priv->prev = 0; - priv->curr = 0; - } - else - { - /* Decrement the count of pulses remaining using the number of - * pulses generated since the last interrupt. - */ - - priv->count -= priv->prev; - - /* Set up the next RCR. Set 'prev' to the value of the RCR that - * was loaded when the update occurred (just before this interrupt) - * and set 'curr' to the current value of the RCR register (which - * will bet loaded on the next update event). - */ - - priv->prev = priv->curr; - priv->curr = pwm_pulsecount(priv->count - priv->prev); - pwm_putreg(priv, STM32_ATIM_RCR_OFFSET, (uint32_t)priv->curr - 1); - } - - /* Now all of the time critical stuff is done so we can do some debug - * output - */ - - pwminfo("Update interrupt SR: %04x prev: %d curr: %d count: %d\n", - regval, priv->prev, priv->curr, priv->count); - - return OK; -#else - return -ENODEV; -#endif -} -#endif - -/**************************************************************************** - * Name: pwm_pulsecount - * - * Description: - * Pick an optimal pulse count to program the RCR. - * - * Input Parameters: - * count - The total count remaining - * - * Returned Value: - * The recommended pulse count - * - ****************************************************************************/ - -#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_EFM32_TIMER0_PWM) || \ - defined(CONFIG_EFM32_TIMER1_PWM) || \ - defined(CONFIG_EFM32_TIMER2_PWM) || \ - defined(CONFIG_EFM32_TIMER3_PWM) \ - ) -static uint8_t pwm_pulsecount(uint32_t count) -{ - /* The the remaining pulse count is less than or equal to the maximum, the - * just return the count. - */ - - if (count <= ATIM_RCR_REP_MAX) - { - return count; - } - - /* Otherwise, we have to be careful. We do not want a small number of - * counts at the end because we might have trouble responding fast enough. - * If the remaining count is less than 150% of the maximum, then return - * half of the maximum. In this case the final sequence will be between 64 - * and 128. - */ - - else if (count < (3 * ATIM_RCR_REP_MAX / 2)) - { - return (ATIM_RCR_REP_MAX + 1) >> 1; - } - - /* Otherwise, return the maximum. The final count will be 64 or more */ - - else - { - return ATIM_RCR_REP_MAX; - } -} -#endif - /**************************************************************************** * Name: pwm_setup * @@ -684,29 +502,12 @@ static int pwm_shutdown(struct pwm_lowerhalf_s *dev) * ****************************************************************************/ -#ifdef CONFIG_PWM_PULSECOUNT -static int pwm_start(struct pwm_lowerhalf_s *dev, - const struct pwm_info_s *info, - void *handle) -{ - struct efm32_pwmtimer_s *priv = (struct efm32_pwmtimer_s *)dev; - - /* Save the handle */ - - priv->handle = handle; - - /* Start the time */ - - return pwm_timer(priv, info); -} -#else static int pwm_start(struct pwm_lowerhalf_s *dev, const struct pwm_info_s *info) { struct efm32_pwmtimer_s *priv = (struct efm32_pwmtimer_s *)dev; return pwm_timer(priv, info); } -#endif /**************************************************************************** * Name: pwm_stop @@ -839,11 +640,6 @@ struct pwm_lowerhalf_s *efm32_pwminitialize(int timer) /* Attach but disable the timer update interrupt */ -#ifdef CONFIG_PWM_PULSECOUNT - irq_attach(lower->irq, pwm_interrupt, lower); - up_disable_irq(lower->irq); -#endif - return (struct pwm_lowerhalf_s *)lower; } diff --git a/arch/arm/src/gd32f4/Kconfig b/arch/arm/src/gd32f4/Kconfig index 9852b46a947..c2d60e0c311 100644 --- a/arch/arm/src/gd32f4/Kconfig +++ b/arch/arm/src/gd32f4/Kconfig @@ -782,7 +782,6 @@ config GD32F4_TIMER0_PWM bool "TIMER0 PWM" default n depends on GD32F4_TIMER0 - select ARCH_HAVE_PWM_PULSECOUNT ---help--- Reserve timer 0 for use by PWM diff --git a/arch/arm/src/nrf52/nrf52_pwm.c b/arch/arm/src/nrf52/nrf52_pwm.c index 537dd161cb9..777052128ff 100644 --- a/arch/arm/src/nrf52/nrf52_pwm.c +++ b/arch/arm/src/nrf52/nrf52_pwm.c @@ -97,14 +97,8 @@ static int nrf52_pwm_freq(struct nrf52_pwm_s *priv, uint32_t freq); static int nrf52_pwm_setup(struct pwm_lowerhalf_s *dev); static int nrf52_pwm_shutdown(struct pwm_lowerhalf_s *dev); -#ifdef CONFIG_PWM_PULSECOUNT -static int nrf52_pwm_start(struct pwm_lowerhalf_s *dev, - const struct pwm_info_s *info, - void *handle); -#else static int nrf52_pwm_start(struct pwm_lowerhalf_s *dev, const struct pwm_info_s *info); -#endif static int nrf52_pwm_stop(struct pwm_lowerhalf_s *dev); static int nrf52_pwm_ioctl(struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg); @@ -540,14 +534,6 @@ static int nrf52_pwm_shutdown(struct pwm_lowerhalf_s *dev) * ****************************************************************************/ -#ifdef CONFIG_PWM_PULSECOUNT -static int nrf52_pwm_start(struct pwm_lowerhalf_s *dev, - const struct pwm_info_s *info, - void *handle) -{ -#error Not supported -} -#else static int nrf52_pwm_start(struct pwm_lowerhalf_s *dev, const struct pwm_info_s *info) { @@ -600,7 +586,6 @@ static int nrf52_pwm_start(struct pwm_lowerhalf_s *dev, return ret; } -#endif /**************************************************************************** * Name: nrf52_pwm_stop diff --git a/arch/arm/src/nrf53/nrf53_pwm.c b/arch/arm/src/nrf53/nrf53_pwm.c index ba17aca3ba7..b2638faa8b8 100644 --- a/arch/arm/src/nrf53/nrf53_pwm.c +++ b/arch/arm/src/nrf53/nrf53_pwm.c @@ -97,14 +97,8 @@ static int nrf53_pwm_freq(struct nrf53_pwm_s *priv, uint32_t freq); static int nrf53_pwm_setup(struct pwm_lowerhalf_s *dev); static int nrf53_pwm_shutdown(struct pwm_lowerhalf_s *dev); -#ifdef CONFIG_PWM_PULSECOUNT -static int nrf53_pwm_start(struct pwm_lowerhalf_s *dev, - const struct pwm_info_s *info, - void *handle); -#else static int nrf53_pwm_start(struct pwm_lowerhalf_s *dev, const struct pwm_info_s *info); -#endif static int nrf53_pwm_stop(struct pwm_lowerhalf_s *dev); static int nrf53_pwm_ioctl(struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg); @@ -518,14 +512,6 @@ static int nrf53_pwm_shutdown(struct pwm_lowerhalf_s *dev) * ****************************************************************************/ -#ifdef CONFIG_PWM_PULSECOUNT -static int nrf53_pwm_start(struct pwm_lowerhalf_s *dev, - const struct pwm_info_s *info, - void *handle) -{ -#error Not supported -} -#else static int nrf53_pwm_start(struct pwm_lowerhalf_s *dev, const struct pwm_info_s *info) { @@ -578,7 +564,6 @@ static int nrf53_pwm_start(struct pwm_lowerhalf_s *dev, return ret; } -#endif /**************************************************************************** * Name: nrf53_pwm_stop diff --git a/arch/arm/src/sama5/sam_pwm.c b/arch/arm/src/sama5/sam_pwm.c index f3f23a62fc6..3372bbb6d5a 100644 --- a/arch/arm/src/sama5/sam_pwm.c +++ b/arch/arm/src/sama5/sam_pwm.c @@ -62,12 +62,6 @@ #define PWM_SINGLE 1 -/* Pulse counting is not supported by this driver */ - -#ifdef CONFIG_PWM_PULSECOUNT -# warning CONFIG_PWM_PULSECOUNT no supported by this driver. -#endif - /* Are we using CLKA? CLKB? If so, at what frequency? */ #if defined(CONFIG_SAMA5_PWM_CLKA) && !defined(CONFIG_SAMA5_PWM_CLKA_FREQUENCY) diff --git a/arch/arm/src/stm32l5/Kconfig b/arch/arm/src/stm32l5/Kconfig index 0c970b7f89c..4a7589a116a 100644 --- a/arch/arm/src/stm32l5/Kconfig +++ b/arch/arm/src/stm32l5/Kconfig @@ -586,7 +586,6 @@ config STM32L5_TIM1_PWM default n depends on STM32L5_TIM1 select PWM - select ARCH_HAVE_PWM_PULSECOUNT ---help--- Reserve timer 1 for use by PWM @@ -747,7 +746,6 @@ config STM32L5_TIM2_PWM default n depends on STM32L5_TIM2 select PWM - select ARCH_HAVE_PWM_PULSECOUNT ---help--- Reserve timer 2 for use by PWM @@ -887,7 +885,6 @@ config STM32L5_TIM3_PWM default n depends on STM32L5_TIM3 select PWM - select ARCH_HAVE_PWM_PULSECOUNT ---help--- Reserve timer 3 for use by PWM @@ -1027,7 +1024,6 @@ config STM32L5_TIM4_PWM default n depends on STM32L5_TIM4 select PWM - select ARCH_HAVE_PWM_PULSECOUNT ---help--- Reserve timer 4 for use by PWM @@ -1167,7 +1163,6 @@ config STM32L5_TIM5_PWM default n depends on STM32L5_TIM5 select PWM - select ARCH_HAVE_PWM_PULSECOUNT ---help--- Reserve timer 5 for use by PWM @@ -1307,7 +1302,6 @@ config STM32L5_TIM8_PWM default n depends on STM32L5_TIM8 select PWM - select ARCH_HAVE_PWM_PULSECOUNT ---help--- Reserve timer 8 for use by PWM diff --git a/arch/arm/src/stm32u5/Kconfig b/arch/arm/src/stm32u5/Kconfig index c9d61b3219f..0a6b6cff64f 100644 --- a/arch/arm/src/stm32u5/Kconfig +++ b/arch/arm/src/stm32u5/Kconfig @@ -215,7 +215,6 @@ config STM32U5_SPI config STM32U5_PWM bool default n - select ARCH_HAVE_PWM_PULSECOUNT config STM32U5_USART bool diff --git a/arch/risc-v/src/litex/litex_pwm.c b/arch/risc-v/src/litex/litex_pwm.c index 01460c8ab88..cdde6966492 100644 --- a/arch/risc-v/src/litex/litex_pwm.c +++ b/arch/risc-v/src/litex/litex_pwm.c @@ -43,10 +43,6 @@ * Pre-processor Definitions ****************************************************************************/ -#ifdef CONFIG_PWM_PULSECOUNT -# error PWM pulsecount not supported for Litex. -#endif - #if CONFIG_PWM_NCHANNELS > 1 # error PWM multiple channels not supported for Litex. #endif
