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new 84aba62f26a Docs/platforms: Add missing defconfig docs for
esp32[-c3|-c6|-h2]
84aba62f26a is described below
commit 84aba62f26a1edc61f34173b317ba088b2f255f4
Author: Eren Terzioglu <[email protected]>
AuthorDate: Fri Jun 12 17:35:54 2026 +0200
Docs/platforms: Add missing defconfig docs for esp32[-c3|-c6|-h2]
Add missing defconfig docs for risc-v based Espressif devices
---
.../risc-v/esp32c3/boards/esp32c3-devkit/index.rst | 26 +++++++++++
.../esp32c6/boards/esp32c6-devkitc/index.rst | 45 ++++++++++++++++++
.../esp32c6/boards/esp32c6-devkitm/index.rst | 36 +++++++++++++++
.../risc-v/esp32h2/boards/esp32h2-devkit/index.rst | 54 ++++++++++++++++++++++
4 files changed, 161 insertions(+)
diff --git
a/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-devkit/index.rst
b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-devkit/index.rst
index 8a313748066..2a02af8ab48 100644
--- a/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-devkit/index.rst
+++ b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-devkit/index.rst
@@ -464,6 +464,18 @@ To test it, just execute the ``pwm`` application::
pwm_main: starting output with frequency: 10000 duty: 00008000
pwm_main: stopping output
+random
+------
+
+This configuration shows the use of the ESP32-C3's True Random Number
Generator.
+To test it, just run ``rand`` to get 32 randomly generated bytes::
+
+ nsh> rand
+ Reading 8 random numbers
+ Random values (0x3ffe0b00):
+ 0000 98 b9 66 a2 a2 c0 a2 ae 09 70 93 d1 b5 91 86 c8 ..f......p......
+ 0010 8f 0e 0b 04 29 64 21 72 01 92 7c a2 27 60 6f 90 ....)d!r..|.'`o.
+
rmt
---
@@ -660,6 +672,20 @@ using WPA2.
The ``dhcpd_start`` is necessary to let your board to associate an IP to your
smartphone.
+temperature_sensor
+------------------
+
+This configuration enables the on-chip temperature sensor driver. The sensor is
+exposed through the uORB interface and can be read with the ``sensortest``
+utility::
+
+ nsh> sensortest temp
+
+tickless
+--------
+
+This configuration enables the support for tickless scheduler mode.
+
timer
-----
diff --git
a/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst
b/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst
index ba228e8e913..3eb958c06b9 100644
--- a/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst
+++ b/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst
@@ -556,6 +556,18 @@ using 1 second delay)::
nsh> qe
+random
+------
+
+This configuration shows the use of the ESP32-C6's True Random Number
Generator.
+To test it, just run ``rand`` to get 32 randomly generated bytes::
+
+ nsh> rand
+ Reading 8 random numbers
+ Random values (0x3ffe0b00):
+ 0000 98 b9 66 a2 a2 c0 a2 ae 09 70 93 d1 b5 91 86 c8 ..f......p......
+ 0010 8f 0e 0b 04 29 64 21 72 01 92 7c a2 27 60 6f 90 ....)d!r..|.'`o.
+
rmt
---
@@ -687,6 +699,25 @@ If SPI peripherals are already in use you can also use
bitbang driver which is a
software implemented SPI peripheral by enabling `CONFIG_ESPRESSIF_SPI_BITBANG`
option.
+spislv
+------
+
+This configuration enables the SPI2 peripheral in **slave mode** and
+provides the ``spislv`` example application to test data exchange with an
+external SPI master.
+
+After building and flashing the firmware, run the following command on the
+board terminal::
+
+ nsh> spislv -x 5 1a2b3c4d5e
+
+This command enqueues the data sequence ``1a2b3c4d5e`` in the slave buffer.
+On the next transfer, the external SPI master should receive this data back
+from the slave.
+
+By default, SPI2 is used with chip select on GPIO16. The pin mapping can be
+adjusted through ``menuconfig`` under *System type → SPI configuration*.
+
sdmmc_spi
---------
@@ -752,6 +783,20 @@ using WPA2.
The ``dhcpd_start`` is necessary to let your board to associate an IP to your
smartphone.
+temperature_sensor
+------------------
+
+This configuration enables the on-chip temperature sensor driver. The sensor is
+exposed through the uORB interface and can be read with the ``sensortest``
+utility::
+
+ nsh> sensortest temp
+
+tickless
+--------
+
+This configuration enables the support for tickless scheduler mode.
+
timer
-----
diff --git
a/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitm/index.rst
b/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitm/index.rst
index 00cfba252e0..43cfccbfa7e 100644
--- a/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitm/index.rst
+++ b/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitm/index.rst
@@ -324,6 +324,18 @@ To test it, just execute the ``pwm`` application::
pwm_main: starting output with frequency: 10000 duty: 00008000
pwm_main: stopping output
+random
+------
+
+This configuration shows the use of the ESP32-C6's True Random Number
Generator.
+To test it, just run ``rand`` to get 32 randomly generated bytes::
+
+ nsh> rand
+ Reading 8 random numbers
+ Random values (0x3ffe0b00):
+ 0000 98 b9 66 a2 a2 c0 a2 ae 09 70 93 d1 b5 91 86 c8 ..f......p......
+ 0010 8f 0e 0b 04 29 64 21 72 01 92 7c a2 27 60 6f 90 ....)d!r..|.'`o.
+
rmt
---
@@ -475,6 +487,25 @@ If SPI peripherals are already in use you can also use
bitbang driver which is a
software implemented SPI peripheral by enabling `CONFIG_ESPRESSIF_SPI_BITBANG`
option.
+spislv
+------
+
+This configuration enables the SPI2 peripheral in **slave mode** and
+provides the ``spislv`` example application to test data exchange with an
+external SPI master.
+
+After building and flashing the firmware, run the following command on the
+board terminal::
+
+ nsh> spislv -x 5 1a2b3c4d5e
+
+This command enqueues the data sequence ``1a2b3c4d5e`` in the slave buffer.
+On the next transfer, the external SPI master should receive this data back
+from the slave.
+
+By default, SPI2 is used with chip select on GPIO1. The pin mapping can be
+adjusted through ``menuconfig`` under *System type → SPI configuration*.
+
spiflash
--------
@@ -507,6 +538,11 @@ using WPA2.
The ``dhcpd_start`` is necessary to let your board to associate an IP to your
smartphone.
+tickless
+--------
+
+This configuration enables the support for tickless scheduler mode.
+
timer
-----
diff --git
a/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst
b/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst
index ff979d67572..ce548f96968 100644
--- a/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst
+++ b/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst
@@ -240,6 +240,22 @@ the ``buttons`` application and pressing the ``BOOT``
button on the board::
nsh> Sample = 1
Sample = 0
+capture
+--------
+
+The capture configuration enables the capture driver and the capture example,
allowing
+the user to measure duty cycle and frequency of a signal. Default pin is
GPIO12 with
+an internal pull-up resistor enabled. When connecting a 50 Hz pulse with 50%
duty cycle,
+the following output is expected::
+
+ nsh> cap
+ cap_main: Hardware initialized. Opening the capture device: /dev/capture0
+ cap_main: Number of samples: 0
+ pwm duty cycle: 50 %
+ pwm frequency: 50 Hz
+ pwm duty cycle: 50 %
+ pwm frequency: 50 Hz
+
coremark
--------
@@ -416,6 +432,18 @@ This configuration is the same as the ``nsh``
configuration, but it generates th
image in a format that can be used by MCUboot. It also makes the ``make
bootloader`` command to
build the MCUboot bootloader image using the Espressif HAL.
+motor
+-------
+
+The motor configuration enables the MCPWM peripheral with support to brushed
DC motor
+control.
+
+It creates a ``/dev/motor0`` device with speed and direction control
capabilities
+by using two GPIOs (GPIO10 and GPIO11) for PWM output. PWM frequency is
configurable
+from 25 Hz to 3 kHz, however it defaults to 1 kHz.
+There is also support for an optional fault GPIO (defaults to GPIO9), which
can be used
+for quick motor braking. All GPIOs are configurable in ``menuconfig``.
+
nsh
---
@@ -514,6 +542,18 @@ using 1 second delay)::
nsh> qe
+random
+------
+
+This configuration shows the use of the ESP32-H2's hardware True Random Number
Generator.
+To test it, just run ``rand`` to get 32 randomly generated bytes::
+
+ nsh> rand
+ Reading 8 random numbers
+ Random values (0x3ffe0b00):
+ 0000 98 b9 66 a2 a2 c0 a2 ae 09 70 93 d1 b5 91 86 c8 ..f......p......
+ 0010 8f 0e 0b 04 29 64 21 72 01 92 7c a2 27 60 6f 90 ....)d!r..|.'`o.
+
rmt
---
@@ -703,6 +743,20 @@ To test it, just run the following::
Where x in the timer instance.
+temperature_sensor
+------------------
+
+This configuration enables the on-chip temperature sensor driver. The sensor is
+exposed through the uORB interface and can be read with the ``sensortest``
+utility::
+
+ nsh> sensortest temp
+
+tickless
+--------
+
+This configuration enables the support for tickless scheduler mode.
+
twai
----
