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commit 704815b2332f02562286b9ff5432ea0d8d290c73 Author: raiden00pl <[email protected]> AuthorDate: Wed May 20 11:41:02 2026 +0200 !arch/stm32n6: use common STM32 Kconfig symbols BREAKING CHANGE: STM32N6 Kconfig symbols were renamed from CONFIG_STM32N6_* to CONFIG_STM32_*. Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names. Signed-off-by: raiden00pl <[email protected]> --- arch/arm/Kconfig | 1 + arch/arm/src/stm32n6/CMakeLists.txt | 4 +- arch/arm/src/stm32n6/Kconfig | 97 ++-------------------- arch/arm/src/stm32n6/Make.defs | 2 +- arch/arm/src/stm32n6/stm32_serial.c | 30 +++---- arch/arm/src/stm32n6/stm32_start.c | 4 +- arch/arm/src/stm32n6/stm32_uart.h | 10 +-- arch/arm/src/stm32n6/stm32n6xx_rcc.c | 2 +- .../stm32n6/nucleo-n657x0-q/configs/leds/defconfig | 3 +- .../stm32n6/nucleo-n657x0-q/configs/nsh/defconfig | 3 +- .../nucleo-n657x0-q/configs/ostest/defconfig | 3 +- 11 files changed, 42 insertions(+), 117 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 36c1510839b..603dab1a965 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -687,6 +687,7 @@ config ARCH_CHIP_STM32H5 config ARCH_CHIP_STM32N6 bool "STMicro STM32 N6" + select ARCH_CHIP_STM32 select ARCH_CORTEXM55 select ARCH_HAVE_FPU select ARCH_HAVE_MPU diff --git a/arch/arm/src/stm32n6/CMakeLists.txt b/arch/arm/src/stm32n6/CMakeLists.txt index afb34a68903..cd2b788424d 100644 --- a/arch/arm/src/stm32n6/CMakeLists.txt +++ b/arch/arm/src/stm32n6/CMakeLists.txt @@ -39,13 +39,13 @@ if(NOT CONFIG_ARCH_IDLE_CUSTOM) list(APPEND SRCS stm32_idle.c) endif() -if(CONFIG_STM32N6_USART) +if(CONFIG_STM32_USART) list(APPEND SRCS stm32_serial.c) endif() # Chip-specific RCC -if(CONFIG_STM32N6_STM32N6XXXX) +if(CONFIG_STM32_STM32N6XXXX) list(APPEND SRCS stm32n6xx_rcc.c) endif() diff --git a/arch/arm/src/stm32n6/Kconfig b/arch/arm/src/stm32n6/Kconfig index 2e362795f5c..b90a6b0663c 100644 --- a/arch/arm/src/stm32n6/Kconfig +++ b/arch/arm/src/stm32n6/Kconfig @@ -1,27 +1,18 @@ -# arch/arm/src/stm32n6/Kconfig # -# SPDX-License-Identifier: Apache-2.0 +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. # -# Licensed to the Apache Software Foundation (ASF) under one or more -# contributor license agreements. See the NOTICE file distributed with -# this work for additional information regarding copyright ownership. The -# ASF licenses this file to you under the Apache License, Version 2.0 (the -# "License"); you may not use this file except in compliance with the -# License. You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT -# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the -# License for the specific language governing permissions and limitations -# under the License. if ARCH_CHIP_STM32N6 comment "STM32N6 Configuration Options" -config STM32N6_STM32N6XXXX +config STM32_N6_PERIPHERALS + bool + default y + select STM32_HAVE_USART1 + +config STM32_STM32N6XXXX bool default y @@ -32,78 +23,8 @@ choice config ARCH_CHIP_STM32N657X0 bool "STM32N657X0" - select STM32N6_STM32N6XXXX + select STM32_STM32N6XXXX endchoice -menu "STM32N6 Peripheral Selection" - -config STM32N6_USART1 - bool "USART1" - default n - select STM32N6_USART - select USART1_SERIALDRIVER - select STM32N6_USART1_SERIALDRIVER - select ARCH_HAVE_SERIAL_TERMIOS - -config STM32N6_USART1_SERIALDRIVER - bool - default n - -config STM32N6_USART - bool - -if STM32N6_USART - -config STM32N6_SERIAL_DISABLE_REORDERING - bool "Disable reordering of ttySx devices." - depends on STM32N6_USART1 - default n - ---help--- - NuttX per default reorders the serial ports (/dev/ttySx) so that the - console is always on /dev/ttyS0. If more than one UART is in use this - can, however, have the side-effect that all port mappings - (hardware USART1 -> /dev/ttyS0) change if the console is moved to - another UART. This option disables that reordering so port names - stay stable when the console is moved. - -config STM32N6_FLOWCONTROL_BROKEN - bool "Use Software UART RTS flow control" - default n - ---help--- - Enable this option to use software RTS flow control rather than - the hardware RTS line. Useful in cases where the silicon RTS - behaviour does not match the application's needs. - -config STM32N6_SERIALBRK_BSDCOMPAT - bool "Use GPIO to send Break" - default n - ---help--- - Enable this option to send break by reconfiguring TX as a GPIO - held low for the requested duration, matching BSD-compatible - semantics. - -config STM32N6_PM_SERIAL_ACTIVITY - int "PM serial activity" - default 10 - ---help--- - PM activity reported to power management logic on every serial - interrupt. - -endif # STM32N6_USART - -if USART1_SERIALDRIVER - -config USART1_UNCONFIG_RX_ON_CLOSE - bool "Unconfigure USART1 RX pin on close" - default n - -config USART1_UNCONFIG_TX_ON_CLOSE - bool "Unconfigure USART1 TX pin on close" - default n - -endif # USART1_SERIALDRIVER - -endmenu - endif # ARCH_CHIP_STM32N6 diff --git a/arch/arm/src/stm32n6/Make.defs b/arch/arm/src/stm32n6/Make.defs index cecd24bbf69..7be078fc1ef 100644 --- a/arch/arm/src/stm32n6/Make.defs +++ b/arch/arm/src/stm32n6/Make.defs @@ -38,7 +38,7 @@ ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) CHIP_CSRCS += stm32_idle.c endif -ifeq ($(CONFIG_STM32N6_USART),y) +ifeq ($(CONFIG_STM32_USART),y) CHIP_CSRCS += stm32_serial.c endif diff --git a/arch/arm/src/stm32n6/stm32_serial.c b/arch/arm/src/stm32n6/stm32_serial.c index 75dc8c8c857..7b053b9820f 100644 --- a/arch/arm/src/stm32n6/stm32_serial.c +++ b/arch/arm/src/stm32n6/stm32_serial.c @@ -62,8 +62,8 @@ /* Power management definitions */ -#if defined(CONFIG_PM) && !defined(CONFIG_STM32N6_PM_SERIAL_ACTIVITY) -# define CONFIG_STM32N6_PM_SERIAL_ACTIVITY 10 +#if defined(CONFIG_PM) && !defined(CONFIG_STM32_PM_SERIAL_ACTIVITY) +# define CONFIG_STM32_PM_SERIAL_ACTIVITY 10 #endif /* USART Unconfigure bits */ @@ -82,7 +82,7 @@ * See stm32serial_restoreusartint where the masking is done. */ -#ifdef CONFIG_STM32N6_SERIALBRK_BSDCOMPAT +#ifdef CONFIG_STM32_SERIALBRK_BSDCOMPAT # define USART_CR1_IE_BREAK_INPROGRESS_SHFTS 15 # define USART_CR1_IE_BREAK_INPROGRESS (1 << USART_CR1_IE_BREAK_INPROGRESS_SHFTS) #endif @@ -210,14 +210,14 @@ static const struct uart_ops_s g_uart_ops = /* I/O buffers */ -#ifdef CONFIG_STM32N6_USART1_SERIALDRIVER +#ifdef CONFIG_STM32_USART1_SERIALDRIVER static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE]; static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE]; #endif /* This describes the state of the STM32N6 USART1 port. */ -#ifdef CONFIG_STM32N6_USART1_SERIALDRIVER +#ifdef CONFIG_STM32_USART1_SERIALDRIVER static struct stm32_serial_s g_usart1priv = { .dev = @@ -276,7 +276,7 @@ static struct stm32_serial_s g_usart1priv = static struct stm32_serial_s * const g_uart_devs[STM32_NUSART] = { -#ifdef CONFIG_STM32N6_USART1_SERIALDRIVER +#ifdef CONFIG_STM32_USART1_SERIALDRIVER [0] = &g_usart1priv, #endif }; @@ -542,7 +542,7 @@ static void stm32serial_setformat(struct uart_dev_s *dev) regval = stm32serial_getreg(priv, STM32_USART_CR3_OFFSET); regval &= ~(USART_CR3_CTSE | USART_CR3_RTSE); -#if defined(CONFIG_SERIAL_IFLOWCONTROL) && !defined(CONFIG_STM32N6_FLOWCONTROL_BROKEN) +#if defined(CONFIG_SERIAL_IFLOWCONTROL) && !defined(CONFIG_STM32_FLOWCONTROL_BROKEN) if (priv->iflow && (priv->rts_gpio != 0)) { regval |= USART_CR3_RTSE; @@ -679,7 +679,7 @@ static void stm32serial_setapbclock(struct uart_dev_s *dev, bool on) { default: return; -#ifdef CONFIG_STM32N6_USART1_SERIALDRIVER +#ifdef CONFIG_STM32_USART1_SERIALDRIVER case STM32_USART1_BASE: rcc_en = RCC_APB2ENR_USART1EN; regaddr_set = STM32_RCC_APB2ENSR; @@ -752,7 +752,7 @@ static int stm32serial_setup(struct uart_dev_s *dev) { uint32_t config = priv->rts_gpio; -#ifdef CONFIG_STM32N6_FLOWCONTROL_BROKEN +#ifdef CONFIG_STM32_FLOWCONTROL_BROKEN /* Instead of letting hw manage this pin, we will bitbang */ config = (config & ~GPIO_MODE_MASK) | GPIO_OUTPUT; @@ -967,8 +967,8 @@ static int stm32serial_interrupt(int irq, void *context, void *arg) /* Report serial activity to the power management logic */ -#if defined(CONFIG_PM) && CONFIG_STM32N6_PM_SERIAL_ACTIVITY > 0 - pm_activity(PM_IDLE_DOMAIN, CONFIG_STM32N6_PM_SERIAL_ACTIVITY); +#if defined(CONFIG_PM) && CONFIG_STM32_PM_SERIAL_ACTIVITY > 0 + pm_activity(PM_IDLE_DOMAIN, CONFIG_STM32_PM_SERIAL_ACTIVITY); #endif /* Loop until there are no characters to be transferred or, @@ -1321,7 +1321,7 @@ static bool stm32serial_rxflowcontrol(struct uart_dev_s *dev, (struct stm32_serial_s *)dev->priv; #if defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS) && \ - defined(CONFIG_STM32N6_FLOWCONTROL_BROKEN) + defined(CONFIG_STM32_FLOWCONTROL_BROKEN) if (priv->iflow && (priv->rts_gpio != 0)) { /* Assert/de-assert nRTS set it high resume/stop sending */ @@ -1434,7 +1434,7 @@ static void stm32serial_txint(struct uart_dev_s *dev, bool enable) #ifndef CONFIG_SUPPRESS_SERIAL_INTS uint16_t ie = priv->ie | USART_CR1_TXEIE; -# ifdef CONFIG_STM32N6_SERIALBRK_BSDCOMPAT +# ifdef CONFIG_STM32_SERIALBRK_BSDCOMPAT if (priv->ie & USART_CR1_IE_BREAK_INPROGRESS) { leave_critical_section(flags); @@ -1679,7 +1679,7 @@ void arm_serialinit(void) #if CONSOLE_UART > 0 uart_register("/dev/console", &g_uart_devs[CONSOLE_UART - 1]->dev); -#ifndef CONFIG_STM32N6_SERIAL_DISABLE_REORDERING +#ifndef CONFIG_STM32_SERIAL_DISABLE_REORDERING /* If not disabled, register the console UART to ttyS0 and exclude * it from initializing it further down */ @@ -1703,7 +1703,7 @@ void arm_serialinit(void) continue; } -#ifndef CONFIG_STM32N6_SERIAL_DISABLE_REORDERING +#ifndef CONFIG_STM32_SERIAL_DISABLE_REORDERING /* Don't create a device for the console - we did that above */ if (g_uart_devs[i]->dev.isconsole) diff --git a/arch/arm/src/stm32n6/stm32_start.c b/arch/arm/src/stm32n6/stm32_start.c index 3c7664921bb..c0f29e74371 100644 --- a/arch/arm/src/stm32n6/stm32_start.c +++ b/arch/arm/src/stm32n6/stm32_start.c @@ -205,7 +205,7 @@ void __start_c(void) STM32_RCC_BUSLPENSR); putreg32(RCC_MEMLPENR_ALLAXISRAM | RCC_MEMLPENR_CACHEAXIRAMLPEN, STM32_RCC_MEMLPENSR); -#ifdef CONFIG_STM32N6_USART1 +#ifdef CONFIG_STM32_USART1 putreg32(RCC_APB2LPENR_USART1LPEN, STM32_RCC_APB2LPENSR); #endif @@ -233,7 +233,7 @@ void __start_c(void) (void)getreg32(STM32_SYSCFG_VDDCCCR); -#ifdef CONFIG_STM32N6_USART1 +#ifdef CONFIG_STM32_USART1 /* Route USART1's kernel clock to HSI so the BRR computation is * independent of any later SYSCLK changes. */ diff --git a/arch/arm/src/stm32n6/stm32_uart.h b/arch/arm/src/stm32n6/stm32_uart.h index 2726f7fffaf..248e3f7d0af 100644 --- a/arch/arm/src/stm32n6/stm32_uart.h +++ b/arch/arm/src/stm32n6/stm32_uart.h @@ -40,20 +40,20 @@ /* Sanity checks */ -#if !defined(CONFIG_STM32N6_USART1) -# undef CONFIG_STM32N6_USART1_SERIALDRIVER -# undef CONFIG_STM32N6_USART1_1WIREDRIVER +#if !defined(CONFIG_STM32_USART1) +# undef CONFIG_STM32_USART1_SERIALDRIVER +# undef CONFIG_STM32_USART1_1WIREDRIVER #endif /* Is there a USART enabled? */ -#if defined(CONFIG_STM32N6_USART1) +#if defined(CONFIG_STM32_USART1) # define HAVE_UART 1 #endif /* Is there a serial console? */ -#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32N6_USART1_SERIALDRIVER) +#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART1_SERIALDRIVER) # define CONSOLE_UART 1 # define HAVE_CONSOLE 1 #else diff --git a/arch/arm/src/stm32n6/stm32n6xx_rcc.c b/arch/arm/src/stm32n6/stm32n6xx_rcc.c index e1615178a76..e6ec3cad067 100644 --- a/arch/arm/src/stm32n6/stm32n6xx_rcc.c +++ b/arch/arm/src/stm32n6/stm32n6xx_rcc.c @@ -93,7 +93,7 @@ static inline void rcc_enableapb2(void) { uint32_t regval = 0; -#ifdef CONFIG_STM32N6_USART1 +#ifdef CONFIG_STM32_USART1 regval |= RCC_APB2ENR_USART1EN; #endif diff --git a/boards/arm/stm32n6/nucleo-n657x0-q/configs/leds/defconfig b/boards/arm/stm32n6/nucleo-n657x0-q/configs/leds/defconfig index c5fb9d9dcbd..91975793f41 100644 --- a/boards/arm/stm32n6/nucleo-n657x0-q/configs/leds/defconfig +++ b/boards/arm/stm32n6/nucleo-n657x0-q/configs/leds/defconfig @@ -10,6 +10,7 @@ CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="nucleo-n657x0-q" CONFIG_ARCH_BOARD_NUCLEO_N657X0_Q=y CONFIG_ARCH_CHIP="stm32n6" +CONFIG_ARCH_CHIP_STM32=y CONFIG_ARCH_CHIP_STM32N657X0=y CONFIG_ARCH_CHIP_STM32N6=y CONFIG_ARCH_INTERRUPTSTACK=4096 @@ -30,7 +31,7 @@ CONFIG_RAM_START=0x34000400 CONFIG_RAW_BINARY=y CONFIG_RR_INTERVAL=200 CONFIG_SCHED_WAITPID=y -CONFIG_STM32N6_USART1=y +CONFIG_STM32_USART1=y CONFIG_SYSTEM_NSH=y CONFIG_USART1_SERIAL_CONSOLE=y CONFIG_USERLED=y diff --git a/boards/arm/stm32n6/nucleo-n657x0-q/configs/nsh/defconfig b/boards/arm/stm32n6/nucleo-n657x0-q/configs/nsh/defconfig index f18c05e1d62..0f35eb8c024 100644 --- a/boards/arm/stm32n6/nucleo-n657x0-q/configs/nsh/defconfig +++ b/boards/arm/stm32n6/nucleo-n657x0-q/configs/nsh/defconfig @@ -9,6 +9,7 @@ CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="nucleo-n657x0-q" CONFIG_ARCH_BOARD_NUCLEO_N657X0_Q=y CONFIG_ARCH_CHIP="stm32n6" +CONFIG_ARCH_CHIP_STM32=y CONFIG_ARCH_CHIP_STM32N657X0=y CONFIG_ARCH_CHIP_STM32N6=y CONFIG_ARCH_INTERRUPTSTACK=4096 @@ -27,6 +28,6 @@ CONFIG_RAM_START=0x34000400 CONFIG_RAW_BINARY=y CONFIG_RR_INTERVAL=200 CONFIG_SCHED_WAITPID=y -CONFIG_STM32N6_USART1=y +CONFIG_STM32_USART1=y CONFIG_SYSTEM_NSH=y CONFIG_USART1_SERIAL_CONSOLE=y diff --git a/boards/arm/stm32n6/nucleo-n657x0-q/configs/ostest/defconfig b/boards/arm/stm32n6/nucleo-n657x0-q/configs/ostest/defconfig index 9e14513b6c7..772fa00937f 100644 --- a/boards/arm/stm32n6/nucleo-n657x0-q/configs/ostest/defconfig +++ b/boards/arm/stm32n6/nucleo-n657x0-q/configs/ostest/defconfig @@ -9,6 +9,7 @@ CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="nucleo-n657x0-q" CONFIG_ARCH_BOARD_NUCLEO_N657X0_Q=y CONFIG_ARCH_CHIP="stm32n6" +CONFIG_ARCH_CHIP_STM32=y CONFIG_ARCH_CHIP_STM32N657X0=y CONFIG_ARCH_CHIP_STM32N6=y CONFIG_ARCH_INTERRUPTSTACK=4096 @@ -30,7 +31,7 @@ CONFIG_RR_INTERVAL=200 CONFIG_SCHED_CHILD_STATUS=y CONFIG_SCHED_HAVE_PARENT=y CONFIG_SCHED_WAITPID=y -CONFIG_STM32N6_USART1=y +CONFIG_STM32_USART1=y CONFIG_SYSTEM_NSH=y CONFIG_TESTING_OSTEST=y CONFIG_USART1_SERIAL_CONSOLE=y
