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commit a8f55fbfd8ee4729da5bd253d6a9bc42bdb8e6bd Author: hanzhijian <[email protected]> AuthorDate: Thu Jun 18 01:15:48 2026 +0800 drivers/clk: use uintptr_t for register addresses Change the 'reg' field type from uint32_t to uintptr_t in all clock provider structs (clk_gate_s, clk_divider_s, clk_phase_s, clk_fractional_divider_s, clk_multiplier_s, clk_mux_s) and their corresponding clk_register_*() function prototypes. Also update clk_write() and clk_read() inline functions to take uintptr_t parameter and remove the now-redundant (uintptr_t) cast. On 32-bit embedded platforms uintptr_t equals uint32_t so there is no functional change. On 64-bit targets (e.g. sim) this fixes -Wint-to-pointer-cast warnings that GCC15 promotes to errors. Fixes: #16896 Signed-off-by: hanzhijian <[email protected]> --- drivers/clk/clk.h | 8 ++++---- include/nuttx/clk/clk_provider.h | 24 ++++++++++++------------ 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/clk/clk.h b/drivers/clk/clk.h index 320ed1e39c4..dd82ddcf5d1 100644 --- a/drivers/clk/clk.h +++ b/drivers/clk/clk.h @@ -49,14 +49,14 @@ * Inline Functions ****************************************************************************/ -static inline void clk_write(uint32_t reg, uint32_t value) +static inline void clk_write(uintptr_t reg, uint32_t value) { - *((volatile uint32_t *)(uintptr_t)reg) = value; + *((volatile uint32_t *)reg) = value; } -static inline uint32_t clk_read(uint32_t reg) +static inline uint32_t clk_read(uintptr_t reg) { - return *((volatile uint32_t *)(uintptr_t)reg); + return *((volatile uint32_t *)reg); } static inline bool clk_is_best_rate_closest(uint32_t rate, uint32_t now, diff --git a/include/nuttx/clk/clk_provider.h b/include/nuttx/clk/clk_provider.h index c64b174d4d4..a18e8fd09ea 100644 --- a/include/nuttx/clk/clk_provider.h +++ b/include/nuttx/clk/clk_provider.h @@ -134,7 +134,7 @@ struct clk_ops_s struct clk_gate_s { - uint32_t reg; + uintptr_t reg; uint8_t bit_idx; uint8_t flags; }; @@ -153,7 +153,7 @@ struct clk_fixed_factor_s struct clk_divider_s { - uint32_t reg; + uintptr_t reg; uint8_t shift; uint8_t width; uint16_t flags; @@ -161,7 +161,7 @@ struct clk_divider_s struct clk_phase_s { - uint32_t reg; + uintptr_t reg; uint8_t shift; uint8_t width; uint8_t flags; @@ -169,7 +169,7 @@ struct clk_phase_s struct clk_fractional_divider_s { - uint32_t reg; + uintptr_t reg; uint8_t mwidth; uint8_t nwidth; uint8_t mshift; @@ -179,7 +179,7 @@ struct clk_fractional_divider_s struct clk_multiplier_s { - uint32_t reg; + uintptr_t reg; uint8_t shift; uint8_t width; uint8_t flags; @@ -187,7 +187,7 @@ struct clk_multiplier_s struct clk_mux_s { - uint32_t reg; + uintptr_t reg; uint8_t width; uint8_t shift; uint8_t flags; @@ -205,7 +205,7 @@ FAR struct clk_s *clk_register(FAR const char *name, FAR struct clk_s *clk_register_gate(FAR const char *name, FAR const char *parent_name, - uint8_t flags, uint32_t reg, + uint8_t flags, uintptr_t reg, uint8_t bit_idx, uint8_t clk_gate_flags); @@ -221,34 +221,34 @@ FAR struct clk_s *clk_register_fixed_factor(FAR const char *name, FAR struct clk_s *clk_register_divider(FAR const char *name, FAR const char *parent_name, - uint8_t flags, uint32_t reg, + uint8_t flags, uintptr_t reg, uint8_t shift, uint8_t width, uint16_t clk_divider_flags); FAR struct clk_s *clk_register_phase(FAR const char *name, FAR const char *parent_name, - uint8_t flags, uint32_t reg, + uint8_t flags, uintptr_t reg, uint8_t shift, uint8_t width, uint8_t clk_phase_flags); FAR struct clk_s * clk_register_fractional_divider(FAR const char *name, FAR const char *parent_name, - uint8_t flags, uint32_t reg, + uint8_t flags, uintptr_t reg, uint8_t mshift, uint8_t mwidth, uint8_t nshift, uint8_t nwidth, uint8_t clk_divider_flags); FAR struct clk_s *clk_register_multiplier(FAR const char *name, FAR const char *parent_name, - uint8_t flags, uint32_t reg, + uint8_t flags, uintptr_t reg, uint8_t shift, uint8_t width, uint8_t clk_multiplier_flags); FAR struct clk_s *clk_register_mux(FAR const char *name, FAR const char * const *parent_names, uint8_t num_parents, uint8_t flags, - uint32_t reg, uint8_t shift, + uintptr_t reg, uint8_t shift, uint8_t width, uint8_t clk_mux_flags); #ifdef CONFIG_CLK_RPMSG
