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new 2b17b0c9924 arch/arm/stm32h5/adc: disable CONT for timer-triggered
circular DMA
2b17b0c9924 is described below
commit 2b17b0c9924fb287180725679abba30a29ddf5d9
Author: Joao Mario Lago <[email protected]>
AuthorDate: Wed Jun 24 14:39:11 2026 -0300
arch/arm/stm32h5/adc: disable CONT for timer-triggered circular DMA
Clear ADC_CFGR_CONT when using timer-triggered circular DMA so each
timer event starts a single conversion sequence. This prevents the ADC
from free-running after the first trigger and losing syncronization with
the timer.
Signed-off-by: Joao Mario Lago <[email protected]>
---
arch/arm/src/stm32h5/stm32_adc.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/src/stm32h5/stm32_adc.c b/arch/arm/src/stm32h5/stm32_adc.c
index 7fe90ea6464..e38f34e8a70 100644
--- a/arch/arm/src/stm32h5/stm32_adc.c
+++ b/arch/arm/src/stm32h5/stm32_adc.c
@@ -1445,7 +1445,18 @@ static int adc_setup(struct adc_dev_s *dev)
{
setbits |= ADC_CFGR_OVRMOD; /* overwrite on overrun */
setbits |= ADC_CFGR_DMACFG;
+# ifdef ADC_HAVE_TIMER
+ if (priv->tbase != 0)
+ {
+ clrbits |= ADC_CFGR_CONT;
+ }
+ else
+ {
+ setbits |= ADC_CFGR_CONT;
+ }
+# else
setbits |= ADC_CFGR_CONT;
+# endif
}
else
{
