adamfeuer commented on a change in pull request #1728: URL: https://github.com/apache/incubator-nuttx/pull/1728#discussion_r484514367
########## File path: boards/arm/sama5/giant-board/include/board_492mhz.h ########## @@ -0,0 +1,211 @@ +/**************************************************************************** + * boards/arm/sama5/sama5d2-xult/include/board_498mhz.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_498MHZ_H +#define __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_498MHZ_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. + * These definitions will configure operational clocking. + * + * This is the configuration results in a CPU clock of 498MHz: + * + * MAINOSC: Frequency = 24MHz (crystal) + * PLLA: PLL Multiplier = 40+1 to generate PLLACK = 984MHz + * Master Clock (MCK): Source = PLLACK/1, Prescalar = 1, MDIV = 6 to generate + * MCK = 164MHz + * CPU clock = 492MHz + */ + +/* Main oscillator register settings. + * + * The start up time should be should be: + * Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles. + */ + +#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration. + * + * Multipler = 20+1: PLLACK = 21 * 24MHz = 498MHz Review comment: @ghn-certi I just copied this file from the SAMA5D2-XULT one, was trying to stay true to what it was doing. I will take a closer look at this. ---------------------------------------------------------------- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. For queries about this service, please contact Infrastructure at: us...@infra.apache.org
