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The following commit(s) were added to refs/heads/master by this push:
new ce93fe7 arm: cxd56xx: Fix nvic settings for SMP
ce93fe7 is described below
commit ce93fe76e54783ecd9e7a9474f81d6db4421c8e0
Author: Masayuki Ishikawa <masayuki.ishik...@gmail.com>
AuthorDate: Wed Sep 9 11:59:25 2020 +0900
arm: cxd56xx: Fix nvic settings for SMP
Summary:
- I noticed that ostest sometimes stops with DEBUGASSERT
- Finally I found a bug that cpu1 can not disable interrupt
- This commit initializes nvic to fix this bug
Impact:
- Only affects cxd56 in SMP mode
Testing:
- spresense:smp and spresense:wifi_smp with DEBUG_ASSERTIONS=y
Signed-off-by: Masayuki Ishikawa <masayuki.ishik...@jp.sony.com>
---
arch/arm/src/cxd56xx/cxd56_cpustart.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/src/cxd56xx/cxd56_cpustart.c
b/arch/arm/src/cxd56xx/cxd56_cpustart.c
index 7a12fdd..dd4e0ea 100644
--- a/arch/arm/src/cxd56xx/cxd56_cpustart.c
+++ b/arch/arm/src/cxd56xx/cxd56_cpustart.c
@@ -114,6 +114,10 @@ static void appdsp_boot(void)
cpu = up_cpu_index();
DPRINTF("cpu = %d\n", cpu);
+ /* Setup NVIC */
+
+ up_irqinitialize();
+
/* Setup FPU */
fpuconfig();
