zyfeier opened a new pull request, #19783:
URL: https://github.com/apache/nuttx/pull/19783
## Summary
Remove the Infineon iLLD dependency from the arch/tricore cache and
performance-counter paths, replacing the iLLD intrinsics and register
structures with direct CSR (Core Special Function Register) accesses.
The series contains three commits, kept separate to match the internal
development history:
1. **add tricore_mtcr and tricore_mfcr macros** — introduce
`tricore_mtcr()` / `tricore_mfcr()` inline-assembly wrappers for the
MTCR/MFCR instructions in `arch/arch.h`, so arch/tricore code can access
CSRs without the iLLD intrinsics.
2. **cachecode donot depend on illd** — replace the iLLD register structures
(`Ifx_CPU_PCON0/1/2`, `Ifx_CPU_DCON0/1/2`) and `IfxCpu_cfg.h` cache macros
in `tricore_cache.c` with `tricore_mtcr()`/`tricore_mfcr()` plus locally
defined PCON/DCON CSR numbers and bit masks. `barriers.h` `UP_ISB()` /
`UP_DSB()` now emit the `isync` / `dsync` instructions directly instead of
the iLLD `__isync()` / `__dsync()` intrinsics.
3. **perf.c donot depend on illd** — replace `IfxCpu_resetAndStartCounters()`
and `IfxCpu_getClockCounter()` with direct CCTRL/CCNT CSR accesses.
The CSR register numbers previously pulled in from the iLLD `IfxCpu_reg.h`
are now defined locally in each file that needs them.
## Impact
- Area: arch/tricore cache and performance-counter paths.
- Behavior: unchanged.
- User / build / documentation / security / compatibility: no impact.
## Testing
- Build Host: Linux x86_64, GCC 11.3.1 (tricore-elf-gcc)
- Target: tricore, triboard_tc4x9_com:nsh
Build (0 errors, ELF produced):
```
LD: nuttx
```
Runtime (flashed to TC4x board, boots to NSH):
```
NuttShell (NSH) NuttX-13.0.0
nsh>
```
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