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commit 06198167877313d2853fd975d7aa5ec4f1b166df Author: raiden00pl <[email protected]> AuthorDate: Fri Aug 14 18:23:34 2026 +0200 boards/arm/stm32h5: add Nucleo-H503RB board support minimal bring-up for the ST Nucleo-H503RB Signed-off-by: raiden00pl <[email protected]> Assisted-by: Claude Code --- .../arm/stm32h5/boards/nucleo-h503rb/index.rst | 25 ++ Documentation/platforms/arm/stm32h5/index.rst | 2 +- arch/arm/src/stm32h5/hardware/stm32h50xxx_pinmap.h | 385 ++++++++++----------- boards/Kconfig | 13 + boards/arm/stm32h5/nucleo-h503rb/CMakeLists.txt | 23 ++ boards/arm/stm32h5/nucleo-h503rb/Kconfig | 4 + .../stm32h5/nucleo-h503rb/configs/nsh/defconfig | 38 ++ boards/arm/stm32h5/nucleo-h503rb/include/board.h | 257 ++++++++++++++ boards/arm/stm32h5/nucleo-h503rb/scripts/Make.defs | 36 ++ boards/arm/stm32h5/nucleo-h503rb/scripts/flash.ld | 99 ++++++ boards/arm/stm32h5/nucleo-h503rb/src/.gitignore | 2 + .../arm/stm32h5/nucleo-h503rb/src/CMakeLists.txt | 37 ++ boards/arm/stm32h5/nucleo-h503rb/src/Make.defs | 39 +++ .../arm/stm32h5/nucleo-h503rb/src/nucleo-h503rb.h | 113 ++++++ .../arm/stm32h5/nucleo-h503rb/src/stm32_autoleds.c | 83 +++++ boards/arm/stm32h5/nucleo-h503rb/src/stm32_boot.c | 84 +++++ .../arm/stm32h5/nucleo-h503rb/src/stm32_bringup.c | 100 ++++++ .../arm/stm32h5/nucleo-h503rb/src/stm32_buttons.c | 79 +++++ .../arm/stm32h5/nucleo-h503rb/src/stm32_userleds.c | 98 ++++++ 19 files changed, 1323 insertions(+), 194 deletions(-) diff --git a/Documentation/platforms/arm/stm32h5/boards/nucleo-h503rb/index.rst b/Documentation/platforms/arm/stm32h5/boards/nucleo-h503rb/index.rst new file mode 100644 index 00000000000..4a7b42ce64e --- /dev/null +++ b/Documentation/platforms/arm/stm32h5/boards/nucleo-h503rb/index.rst @@ -0,0 +1,25 @@ +================ +ST Nucleo-H503RB +================ + +.. tags:: chip:stm32, chip:stm32h5, chip:stm32h503 + +Board Information +================= + +This page discusses issues unique to NuttX configurations for the +STMicro NUCLEO-H503RB development board featuring the STM32H503RB +MCU. The STM32H503RB is a 250MHz Cortex-M33 operation with 128KBytes Flash +memory and 32KByte SRAM. + +Refer to the http://www.st.com website for further information about this +board (search keyword: NUCLEO-H503RB) + +Configurations +============== + +nsh +--- + +Configures the NuttShell (nsh) located at apps/examples/nsh. This +configuration enables a serial console on USART3 (Nucleo Virtual Console). diff --git a/Documentation/platforms/arm/stm32h5/index.rst b/Documentation/platforms/arm/stm32h5/index.rst index 2d9a49110dd..fafc133a003 100644 --- a/Documentation/platforms/arm/stm32h5/index.rst +++ b/Documentation/platforms/arm/stm32h5/index.rst @@ -17,7 +17,7 @@ Supported MCUs =========== ======= ================ MCU Support Note =========== ======= ================ -STM32H503 No +STM32H503 Yes STM32H523 No STM32H533 Yes STM32H562 No diff --git a/arch/arm/src/stm32h5/hardware/stm32h50xxx_pinmap.h b/arch/arm/src/stm32h5/hardware/stm32h50xxx_pinmap.h index bc8d3ecbca2..9422be00725 100644 --- a/arch/arm/src/stm32h5/hardware/stm32h50xxx_pinmap.h +++ b/arch/arm/src/stm32h5/hardware/stm32h50xxx_pinmap.h @@ -29,7 +29,6 @@ #include <nuttx/config.h> -#if defined(CONFIG_STM32_STM32H50XXX) /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -51,24 +50,24 @@ /* FDCAN */ -#define GPIO_FDCAN1_RX_1 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) -#define GPIO_FDCAN1_RX_2 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11) -#define GPIO_FDCAN1_RX_3 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3) -#define GPIO_FDCAN1_RX_4 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) -#define GPIO_FDCAN1_RX_5 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) -#define GPIO_FDCAN1_RX_6 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12) -#define GPIO_FDCAN1_RX_7 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) -#define GPIO_FDCAN1_RX_8 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8) -#define GPIO_FDCAN1_RX_9 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10) -#define GPIO_FDCAN1_TX_1 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12) -#define GPIO_FDCAN1_TX_2 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4) -#define GPIO_FDCAN1_TX_3 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) -#define GPIO_FDCAN1_TX_4 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7) -#define GPIO_FDCAN1_TX_5 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10) -#define GPIO_FDCAN1_TX_6 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13) -#define GPIO_FDCAN1_TX_7 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15) -#define GPIO_FDCAN1_TX_8 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7) -#define GPIO_FDCAN1_TX_9 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) +#define GPIO_FDCAN1_RX_1 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) +#define GPIO_FDCAN1_RX_2 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11) +#define GPIO_FDCAN1_RX_3 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3) +#define GPIO_FDCAN1_RX_4 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) +#define GPIO_FDCAN1_RX_5 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_FDCAN1_RX_6 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12) +#define GPIO_FDCAN1_RX_7 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) +#define GPIO_FDCAN1_RX_8 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8) +#define GPIO_FDCAN1_RX_9 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10) +#define GPIO_FDCAN1_TX_1 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12) +#define GPIO_FDCAN1_TX_2 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4) +#define GPIO_FDCAN1_TX_3 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) +#define GPIO_FDCAN1_TX_4 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7) +#define GPIO_FDCAN1_TX_5 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10) +#define GPIO_FDCAN1_TX_6 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13) +#define GPIO_FDCAN1_TX_7 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15) +#define GPIO_FDCAN1_TX_8 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7) +#define GPIO_FDCAN1_TX_9 (GPIO_ALT|GPIO_AF9|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) /* I2C */ @@ -93,155 +92,155 @@ /* SPI */ -#define GPIO_SPI1_SCK_1 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN2) -#define GPIO_SPI1_SCK_2 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN5) -#define GPIO_SPI1_SCK_3 (GPIO_ALT|GPIO_AF12|GPIO_PORTA|GPIO_PIN8) -#define GPIO_SPI1_SCK_4 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN3) -#define GPIO_SPI1_SCK_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN0) -#define GPIO_SPI1_SCK_6 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN5) -#define GPIO_SPI1_MISO_1 (GPIO_ALT|GPIO_AF12|GPIO_PORTA|GPIO_PIN0) -#define GPIO_SPI1_MISO_2 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN3) -#define GPIO_SPI1_MISO_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN6) -#define GPIO_SPI1_MISO_4 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN9) -#define GPIO_SPI1_MISO_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN4) -#define GPIO_SPI1_MISO_6 (GPIO_ALT|GPIO_AF4|GPIO_PORTC|GPIO_PIN2) -#define GPIO_SPI1_MISO_7 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN10) -#define GPIO_SPI1_MOSI_1 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN4) -#define GPIO_SPI1_MOSI_2 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN7) -#define GPIO_SPI1_MOSI_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN5) -#define GPIO_SPI1_MOSI_4 (GPIO_ALT|GPIO_AF4|GPIO_PORTC|GPIO_PIN3) -#define GPIO_SPI1_MOSI_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN7) -#define GPIO_SPI1_NSS_1 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN1) -#define GPIO_SPI1_NSS_2 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN4) -#define GPIO_SPI1_NSS_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN15) -#define GPIO_SPI1_NSS_4 (GPIO_ALT|GPIO_AF12|GPIO_PORTB|GPIO_PIN8) -#define GPIO_SPI1_NSS_5 (GPIO_ALT|GPIO_AF4|GPIO_PORTC|GPIO_PIN1) -#define GPIO_SPI1_NSS_6 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN8) - -#define GPIO_SPI2_SCK_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN5) -#define GPIO_SPI2_SCK_2 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN9) -#define GPIO_SPI2_SCK_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN12) -#define GPIO_SPI2_SCK_4 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN2) -#define GPIO_SPI2_SCK_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN10) -#define GPIO_SPI2_SCK_6 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN13) -#define GPIO_SPI2_MISO_1 (GPIO_ALT|GPIO_AF11|GPIO_PORTA|GPIO_PIN7) -#define GPIO_SPI2_MISO_2 (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN15) -#define GPIO_SPI2_MISO_3 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN5) -#define GPIO_SPI2_MISO_4 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN14) -#define GPIO_SPI2_MISO_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN2) -#define GPIO_SPI2_MOSI_1 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN8) -#define GPIO_SPI2_MOSI_2 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN1) -#define GPIO_SPI2_MOSI_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN15) -#define GPIO_SPI2_MOSI_4 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN1) -#define GPIO_SPI2_MOSI_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN3) -#define GPIO_SPI2_NSS_1 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN3) -#define GPIO_SPI2_NSS_2 (GPIO_ALT|GPIO_AF11|GPIO_PORTA|GPIO_PIN8) -#define GPIO_SPI2_NSS_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN11) -#define GPIO_SPI2_NSS_4 (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN4) -#define GPIO_SPI2_NSS_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN12) - -#define GPIO_SPI3_SCK_1 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN1) -#define GPIO_SPI3_SCK_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN15) -#define GPIO_SPI3_SCK_3 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN3) -#define GPIO_SPI3_SCK_4 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN7) -#define GPIO_SPI3_SCK_5 (GPIO_ALT|GPIO_AF6|GPIO_PORTC|GPIO_PIN10) -#define GPIO_SPI3_MISO_1 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN2) -#define GPIO_SPI3_MISO_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN4) -#define GPIO_SPI3_MISO_3 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN4) -#define GPIO_SPI3_MISO_4 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN15) -#define GPIO_SPI3_MISO_5 (GPIO_ALT|GPIO_AF6|GPIO_PORTC|GPIO_PIN11) -#define GPIO_SPI3_MOSI_1 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN3) -#define GPIO_SPI3_MOSI_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN5) -#define GPIO_SPI3_MOSI_3 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN9) -#define GPIO_SPI3_MOSI_4 (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN2) -#define GPIO_SPI3_MOSI_5 (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN5) -#define GPIO_SPI3_MOSI_6 (GPIO_ALT|GPIO_AF6|GPIO_PORTC|GPIO_PIN12) -#define GPIO_SPI3_NSS_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN0) -#define GPIO_SPI3_NSS_2 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN4) -#define GPIO_SPI3_NSS_3 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN15) -#define GPIO_SPI3_NSS_4 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN10) -#define GPIO_SPI3_NSS_5 (GPIO_ALT|GPIO_AF6|GPIO_PORTD|GPIO_PIN2) +#define GPIO_SPI1_SCK_1 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN2) +#define GPIO_SPI1_SCK_2 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN5) +#define GPIO_SPI1_SCK_3 (GPIO_ALT|GPIO_AF12|GPIO_PORTA|GPIO_PIN8) +#define GPIO_SPI1_SCK_4 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN3) +#define GPIO_SPI1_SCK_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN0) +#define GPIO_SPI1_SCK_6 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN5) +#define GPIO_SPI1_MISO_1 (GPIO_ALT|GPIO_AF12|GPIO_PORTA|GPIO_PIN0) +#define GPIO_SPI1_MISO_2 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN3) +#define GPIO_SPI1_MISO_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN6) +#define GPIO_SPI1_MISO_4 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN9) +#define GPIO_SPI1_MISO_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN4) +#define GPIO_SPI1_MISO_6 (GPIO_ALT|GPIO_AF4|GPIO_PORTC|GPIO_PIN2) +#define GPIO_SPI1_MISO_7 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN10) +#define GPIO_SPI1_MOSI_1 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN4) +#define GPIO_SPI1_MOSI_2 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN7) +#define GPIO_SPI1_MOSI_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN5) +#define GPIO_SPI1_MOSI_4 (GPIO_ALT|GPIO_AF4|GPIO_PORTC|GPIO_PIN3) +#define GPIO_SPI1_MOSI_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN7) +#define GPIO_SPI1_NSS_1 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN1) +#define GPIO_SPI1_NSS_2 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN4) +#define GPIO_SPI1_NSS_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN15) +#define GPIO_SPI1_NSS_4 (GPIO_ALT|GPIO_AF12|GPIO_PORTB|GPIO_PIN8) +#define GPIO_SPI1_NSS_5 (GPIO_ALT|GPIO_AF4|GPIO_PORTC|GPIO_PIN1) +#define GPIO_SPI1_NSS_6 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN8) + +#define GPIO_SPI2_SCK_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN5) +#define GPIO_SPI2_SCK_2 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN9) +#define GPIO_SPI2_SCK_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN12) +#define GPIO_SPI2_SCK_4 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN2) +#define GPIO_SPI2_SCK_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN10) +#define GPIO_SPI2_SCK_6 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN13) +#define GPIO_SPI2_MISO_1 (GPIO_ALT|GPIO_AF11|GPIO_PORTA|GPIO_PIN7) +#define GPIO_SPI2_MISO_2 (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN15) +#define GPIO_SPI2_MISO_3 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN5) +#define GPIO_SPI2_MISO_4 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN14) +#define GPIO_SPI2_MISO_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN2) +#define GPIO_SPI2_MOSI_1 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN8) +#define GPIO_SPI2_MOSI_2 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN1) +#define GPIO_SPI2_MOSI_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN15) +#define GPIO_SPI2_MOSI_4 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN1) +#define GPIO_SPI2_MOSI_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTC|GPIO_PIN3) +#define GPIO_SPI2_NSS_1 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN3) +#define GPIO_SPI2_NSS_2 (GPIO_ALT|GPIO_AF11|GPIO_PORTA|GPIO_PIN8) +#define GPIO_SPI2_NSS_3 (GPIO_ALT|GPIO_AF5|GPIO_PORTA|GPIO_PIN11) +#define GPIO_SPI2_NSS_4 (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN4) +#define GPIO_SPI2_NSS_5 (GPIO_ALT|GPIO_AF5|GPIO_PORTB|GPIO_PIN12) + +#define GPIO_SPI3_SCK_1 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN1) +#define GPIO_SPI3_SCK_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN15) +#define GPIO_SPI3_SCK_3 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN3) +#define GPIO_SPI3_SCK_4 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN7) +#define GPIO_SPI3_SCK_5 (GPIO_ALT|GPIO_AF6|GPIO_PORTC|GPIO_PIN10) +#define GPIO_SPI3_MISO_1 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN2) +#define GPIO_SPI3_MISO_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN4) +#define GPIO_SPI3_MISO_3 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN4) +#define GPIO_SPI3_MISO_4 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN15) +#define GPIO_SPI3_MISO_5 (GPIO_ALT|GPIO_AF6|GPIO_PORTC|GPIO_PIN11) +#define GPIO_SPI3_MOSI_1 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN3) +#define GPIO_SPI3_MOSI_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN5) +#define GPIO_SPI3_MOSI_3 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN9) +#define GPIO_SPI3_MOSI_4 (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN2) +#define GPIO_SPI3_MOSI_5 (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN5) +#define GPIO_SPI3_MOSI_6 (GPIO_ALT|GPIO_AF6|GPIO_PORTC|GPIO_PIN12) +#define GPIO_SPI3_NSS_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN0) +#define GPIO_SPI3_NSS_2 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN4) +#define GPIO_SPI3_NSS_3 (GPIO_ALT|GPIO_AF6|GPIO_PORTA|GPIO_PIN15) +#define GPIO_SPI3_NSS_4 (GPIO_ALT|GPIO_AF6|GPIO_PORTB|GPIO_PIN10) +#define GPIO_SPI3_NSS_5 (GPIO_ALT|GPIO_AF6|GPIO_PORTD|GPIO_PIN2) /* Timers */ -#define GPIO_TIM1_CH1OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) /* PA8 */ -#define GPIO_TIM1_CH1OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN13) /* PA13 */ -#define GPIO_TIM1_CH1OUT_3 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7) /* PB7 */ -#define GPIO_TIM1_CH1OUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) /* PC6 */ - -#define GPIO_TIM1_CH1NOUT_1 (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN3) /* PA3 */ -#define GPIO_TIM1_CH1NOUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PORTA|GPIO_PIN7) /* PA7 */ -#define GPIO_TIM1_CH1NOUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN13) /* PB13 */ - -#define GPIO_TIM1_CH2OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9) /* PA9 */ -#define GPIO_TIM1_CH2OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN14) /* PA14 */ -#define GPIO_TIM1_CH2OUT_3 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4) /* PB4 */ -#define GPIO_TIM1_CH2OUT_4 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) /* PB6 */ - -#define GPIO_TIM1_CH2NOUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PORTA|GPIO_PIN4) /* PA4 */ -#define GPIO_TIM1_CH2NOUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN0) /* PB0 */ -#define GPIO_TIM1_CH2NOUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN2) /* PB2 */ -#define GPIO_TIM1_CH2NOUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN7) /* PB7 */ -#define GPIO_TIM1_CH2NOUT_5 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN14) /* PB14 */ - -#define GPIO_TIM1_CH3OUT_1 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1) /* PA1 */ -#define GPIO_TIM1_CH3OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10) /* PA10 */ -#define GPIO_TIM1_CH3OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) /* PB5 */ -#define GPIO_TIM1_CH3OUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8) /* PC8 */ - -#define GPIO_TIM1_CH3NOUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN1) /* PB1 */ -#define GPIO_TIM1_CH3NOUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN6) /* PB6 */ -#define GPIO_TIM1_CH3NOUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN15) /* PB15 */ - -#define GPIO_TIM1_CH4OUT_1 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2) /* PA2 */ -#define GPIO_TIM1_CH4OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11) /* PA11 */ -#define GPIO_TIM1_CH4OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) /* PC9 */ -#define GPIO_TIM1_CH4OUT_4 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN12) /* PC12 */ - -#define GPIO_TIM1_CH4NOUT_1 (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN8) /* PA8 */ -#define GPIO_TIM1_CH4NOUT_2 (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN14) /* PA14 */ -#define GPIO_TIM1_CH4NOUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN4) /* PB4 */ -#define GPIO_TIM1_CH4NOUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN5) /* PC5 */ - -#define GPIO_TIM2_CH1OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0) /* PA0 */ -#define GPIO_TIM2_CH1OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5) /* PA5 */ -#define GPIO_TIM2_CH1OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN15) /* PA15 */ -#define GPIO_TIM2_CH1OUT_4 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN2) /* PB2 */ - -#define GPIO_TIM2_CH2OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1) /* PA1 */ -#define GPIO_TIM2_CH2OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3) /* PB3 */ -#define GPIO_TIM2_CH2OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN11) /* PC11 */ - -#define GPIO_TIM2_CH3OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2) /* PA2 */ -#define GPIO_TIM2_CH3OUT_2 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7) /* PA7 */ -#define GPIO_TIM2_CH3OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10) /* PB10 */ -#define GPIO_TIM2_CH3OUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN2) /* PD2 */ - -#define GPIO_TIM2_CH4OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3) /* PA3 */ -#define GPIO_TIM2_CH4OUT_2 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12) /* PA12 */ -#define GPIO_TIM2_CH4OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN4) /* PC4 */ -#define GPIO_TIM2_CH4OUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN12) /* PC12 */ - -#define GPIO_TIM3_CH1OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0) /* PA0 */ -#define GPIO_TIM3_CH1OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN6) /* PA6 */ -#define GPIO_TIM3_CH1OUT_3 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN14) /* PA14 */ -#define GPIO_TIM3_CH1OUT_4 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4) /* PB4 */ -#define GPIO_TIM3_CH1OUT_5 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) /* PC6 */ - -#define GPIO_TIM3_CH2OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7) /* PA7 */ -#define GPIO_TIM3_CH2OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11) /* PA11 */ -#define GPIO_TIM3_CH2OUT_3 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) /* PB5 */ -#define GPIO_TIM3_CH2OUT_4 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7) /* PC7 */ - -#define GPIO_TIM3_CH3OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) /* PA8 */ -#define GPIO_TIM3_CH3OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0) /* PB0 */ -#define GPIO_TIM3_CH3OUT_3 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) /* PB6 */ -#define GPIO_TIM3_CH3OUT_4 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8) /* PC8 */ - -#define GPIO_TIM3_CH4OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12) /* PA12 */ -#define GPIO_TIM3_CH4OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1) /* PB1 */ -#define GPIO_TIM3_CH4OUT_3 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15) /* PB15 */ -#define GPIO_TIM3_CH4OUT_4 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) /* PC9 */ +#define GPIO_TIM1_CH1OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) +#define GPIO_TIM1_CH1OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN13) +#define GPIO_TIM1_CH1OUT_3 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7) +#define GPIO_TIM1_CH1OUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) + +#define GPIO_TIM1_CH1NOUT_1 (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN3) +#define GPIO_TIM1_CH1NOUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PORTA|GPIO_PIN7) +#define GPIO_TIM1_CH1NOUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN13) + +#define GPIO_TIM1_CH2OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9) +#define GPIO_TIM1_CH2OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN14) +#define GPIO_TIM1_CH2OUT_3 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4) +#define GPIO_TIM1_CH2OUT_4 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) + +#define GPIO_TIM1_CH2NOUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PORTA|GPIO_PIN4) +#define GPIO_TIM1_CH2NOUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN0) +#define GPIO_TIM1_CH2NOUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN2) +#define GPIO_TIM1_CH2NOUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN7) +#define GPIO_TIM1_CH2NOUT_5 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN14) + +#define GPIO_TIM1_CH3OUT_1 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1) +#define GPIO_TIM1_CH3OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10) +#define GPIO_TIM1_CH3OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) +#define GPIO_TIM1_CH3OUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8) + +#define GPIO_TIM1_CH3NOUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN1) +#define GPIO_TIM1_CH3NOUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN6) +#define GPIO_TIM1_CH3NOUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN15) + +#define GPIO_TIM1_CH4OUT_1 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2) +#define GPIO_TIM1_CH4OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11) +#define GPIO_TIM1_CH4OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) +#define GPIO_TIM1_CH4OUT_4 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN12) + +#define GPIO_TIM1_CH4NOUT_1 (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN8) +#define GPIO_TIM1_CH4NOUT_2 (GPIO_ALT|GPIO_AF14|GPIO_PORTA|GPIO_PIN14) +#define GPIO_TIM1_CH4NOUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN4) +#define GPIO_TIM1_CH4NOUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PORTC|GPIO_PIN5) + +#define GPIO_TIM2_CH1OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0) +#define GPIO_TIM2_CH1OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5) +#define GPIO_TIM2_CH1OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN15) +#define GPIO_TIM2_CH1OUT_4 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN2) + +#define GPIO_TIM2_CH2OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1) +#define GPIO_TIM2_CH2OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3) +#define GPIO_TIM2_CH2OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN11) + +#define GPIO_TIM2_CH3OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2) +#define GPIO_TIM2_CH3OUT_2 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7) +#define GPIO_TIM2_CH3OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10) +#define GPIO_TIM2_CH3OUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN2) + +#define GPIO_TIM2_CH4OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3) +#define GPIO_TIM2_CH4OUT_2 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12) +#define GPIO_TIM2_CH4OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN4) +#define GPIO_TIM2_CH4OUT_4 (GPIO_ALT|GPIO_AF1|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN12) + +#define GPIO_TIM3_CH1OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0) +#define GPIO_TIM3_CH1OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN6) +#define GPIO_TIM3_CH1OUT_3 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN14) +#define GPIO_TIM3_CH1OUT_4 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4) +#define GPIO_TIM3_CH1OUT_5 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) + +#define GPIO_TIM3_CH2OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7) +#define GPIO_TIM3_CH2OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11) +#define GPIO_TIM3_CH2OUT_3 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) +#define GPIO_TIM3_CH2OUT_4 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7) + +#define GPIO_TIM3_CH3OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) +#define GPIO_TIM3_CH3OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0) +#define GPIO_TIM3_CH3OUT_3 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) +#define GPIO_TIM3_CH3OUT_4 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8) + +#define GPIO_TIM3_CH4OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12) +#define GPIO_TIM3_CH4OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1) +#define GPIO_TIM3_CH4OUT_3 (GPIO_ALT|GPIO_AF14|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15) +#define GPIO_TIM3_CH4OUT_4 (GPIO_ALT|GPIO_AF2|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) /* USART/UART/LPUART */ @@ -336,35 +335,35 @@ /* ADC1 */ -#define GPIO_ADC1_INP0_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN0) -#define GPIO_ADC1_INN1_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN0) -#define GPIO_ADC1_INP1_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN1) -#define GPIO_ADC1_INP3_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN6) -#define GPIO_ADC1_INN3_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN7) -#define GPIO_ADC1_INP4_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN4) -#define GPIO_ADC1_INN4_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN5) -#define GPIO_ADC1_INP5_0 (GPIO_ANALOG | GPIO_PORTB | GPIO_PIN1) -#define GPIO_ADC1_INN5_0 (GPIO_ANALOG | GPIO_PORTB | GPIO_PIN0) -#define GPIO_ADC1_INP7_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN7) -#define GPIO_ADC1_INP8_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN5) -#define GPIO_ADC1_INP9_0 (GPIO_ANALOG | GPIO_PORTB | GPIO_PIN0) -#define GPIO_ADC1_INP10_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN0) -#define GPIO_ADC1_INN10_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN1) -#define GPIO_ADC1_INP11_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN1) -#define GPIO_ADC1_INN11_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN2) -#define GPIO_ADC1_INP12_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN2) -#define GPIO_ADC1_INN12_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN3) -#define GPIO_ADC1_INP13_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN3) -#define GPIO_ADC1_INP14_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN2) -#define GPIO_ADC1_INP15_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN3) -#define GPIO_ADC1_INP18_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN4) -#define GPIO_ADC1_INN18_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN5) -#define GPIO_ADC1_INP19_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN5) +#define GPIO_ADC1_INP0_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN0) +#define GPIO_ADC1_INN1_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN0) +#define GPIO_ADC1_INP1_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN1) +#define GPIO_ADC1_INP3_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN6) +#define GPIO_ADC1_INN3_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN7) +#define GPIO_ADC1_INP4_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN4) +#define GPIO_ADC1_INN4_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN5) +#define GPIO_ADC1_INP5_0 (GPIO_ANALOG | GPIO_PORTB | GPIO_PIN1) +#define GPIO_ADC1_INN5_0 (GPIO_ANALOG | GPIO_PORTB | GPIO_PIN0) +#define GPIO_ADC1_INP7_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN7) +#define GPIO_ADC1_INP8_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN5) +#define GPIO_ADC1_INP9_0 (GPIO_ANALOG | GPIO_PORTB | GPIO_PIN0) +#define GPIO_ADC1_INP10_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN0) +#define GPIO_ADC1_INN10_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN1) +#define GPIO_ADC1_INP11_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN1) +#define GPIO_ADC1_INN11_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN2) +#define GPIO_ADC1_INP12_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN2) +#define GPIO_ADC1_INN12_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN3) +#define GPIO_ADC1_INP13_0 (GPIO_ANALOG | GPIO_PORTC | GPIO_PIN3) +#define GPIO_ADC1_INP14_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN2) +#define GPIO_ADC1_INP15_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN3) +#define GPIO_ADC1_INP18_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN4) +#define GPIO_ADC1_INN18_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN5) +#define GPIO_ADC1_INP19_0 (GPIO_ANALOG | GPIO_PORTA | GPIO_PIN5) /* USB */ -#define GPIO_USB_DM (GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN11) -#define GPIO_USB_DP (GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN12) -#define GPIO_USB_SOF (GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN8) -#endif /* CONFIG_STM32_STM32H50XXX */ +#define GPIO_USB_DM (GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN11) +#define GPIO_USB_DP (GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN12) +#define GPIO_USB_SOF (GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN8) + #endif /* __ARCH_ARM_SRC_STM32H5_HARDWARE_STM32H50XXX_PINMAP_H */ diff --git a/boards/Kconfig b/boards/Kconfig index 0835c3b8c3e..82b60caa038 100644 --- a/boards/Kconfig +++ b/boards/Kconfig @@ -3344,6 +3344,15 @@ config ARCH_BOARD_STM32L476_MDK The STM32L476ME is a Cortex-M4 optimised for low-power operation at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM. +config ARCH_BOARD_NUCLEO_H503RB + bool "NUCLEO_H503RB" + depends on ARCH_CHIP_STM32H503RB + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro Nucleo-H503RB board based on the STMicro STM32H503RB MCU. + config ARCH_BOARD_NUCLEO_H533RE bool "STMicro NUCLEO_H533RE" depends on ARCH_CHIP_STM32H533RE @@ -4162,6 +4171,7 @@ config ARCH_BOARD default "b-l072z-lrwan1" if ARCH_BOARD_B_L072Z_LRWAN1 default "b-l475e-iot01a" if ARCH_BOARD_B_L475E_IOT01A default "b-u585i-iot02a" if ARCH_BOARD_B_U585I_IOT02A + default "nucleo-h503rb" if ARCH_BOARD_NUCLEO_H503RB default "nucleo-h533re" if ARCH_BOARD_NUCLEO_H533RE default "nucleo-h563zi" if ARCH_BOARD_NUCLEO_H563ZI default "nucleo-n657x0-q" if ARCH_BOARD_NUCLEO_N657X0_Q @@ -4855,6 +4865,9 @@ endif if ARCH_BOARD_STM32L4R9AI_DISCO source "boards/arm/stm32l4/stm32l4r9ai-disco/Kconfig" endif +if ARCH_BOARD_NUCLEO_H503RB +source "boards/arm/stm32h5/nucleo-h503rb/Kconfig" +endif if ARCH_BOARD_NUCLEO_H533RE source "boards/arm/stm32h5/nucleo-h533re/Kconfig" endif diff --git a/boards/arm/stm32h5/nucleo-h503rb/CMakeLists.txt b/boards/arm/stm32h5/nucleo-h503rb/CMakeLists.txt new file mode 100644 index 00000000000..0a57c6fce2e --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/CMakeLists.txt @@ -0,0 +1,23 @@ +# ############################################################################## +# boards/arm/stm32h5/nucleo-h503rb/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +add_subdirectory(src) diff --git a/boards/arm/stm32h5/nucleo-h503rb/Kconfig b/boards/arm/stm32h5/nucleo-h503rb/Kconfig new file mode 100644 index 00000000000..f72f3c094ce --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/boards/arm/stm32h5/nucleo-h503rb/configs/nsh/defconfig b/boards/arm/stm32h5/nucleo-h503rb/configs/nsh/defconfig new file mode 100644 index 00000000000..86b22632e8f --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/configs/nsh/defconfig @@ -0,0 +1,38 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_STANDARD_SERIAL is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="nucleo-h503rb" +CONFIG_ARCH_BOARD_NUCLEO_H503RB=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32h5" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32H503RB=y +CONFIG_ARCH_CHIP_STM32H5=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=9251 +CONFIG_BUILTIN=y +CONFIG_FS_PROCFS=y +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INIT_STACKSIZE=3072 +CONFIG_LINE_MAX=64 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=32768 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_STACK_COLORATION=y +CONFIG_STM32_USART3=y +CONFIG_SYSTEM_NSH=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_USART3_SERIAL_CONSOLE=y diff --git a/boards/arm/stm32h5/nucleo-h503rb/include/board.h b/boards/arm/stm32h5/nucleo-h503rb/include/board.h new file mode 100644 index 00000000000..fc2fd6b3c12 --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/include/board.h @@ -0,0 +1,257 @@ +/**************************************************************************** + * boards/arm/stm32h5/nucleo-h503rb/include/board.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_STM32H5_NUCLEO_H503RB_INCLUDE_BOARD_H +#define __BOARDS_ARM_STM32H5_NUCLEO_H503RB_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#ifndef __ASSEMBLY__ +# include <stdint.h> +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* The Nucleo-H503RB supports using a HSE crystal (X3), but it is not + * populated by default, so this configuration runs off the 32 MHz HSI + * clock. + * + * System Clock Source : PLL1 + * SYSCLK Freq (MHz) : 250 + * HCLK Freq (MHz) : 250 + * PLL1 Freq (MHz) : 250 + * Flash Latency (WS) : 5 + * + * NOTE : The STM32H5 requires PLL1P to be configured, as this is used as the + * system clock source. A custom clock config function must be supplied to + * use a different system clock source. + */ + +#define STM32_SYSCLK_FREQUENCY 250000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_LSE_FREQUENCY 32768 + +#define STM32_BOARD_USEHSI 1 +#define STM32_BOARD_HSIDIV RCC_CR_HSIDIV(1) +#define STM32_HSI_FREQUENCY 32000000ul + +/* PLL1 config: Used to generate system clock + * PLL1DIVR expects N, P, Q, and R should be defined. + * With HSI Freq = 32 MHz, this gives 250 MHz pll1_y_ck output + */ + +#define STM32_PLLCFG_PLL1CFG (RCC_PLL1CFGR_PLL1SRC_HSI | \ + RCC_PLL1CFGR_PLL1RGE_4_8M | \ + RCC_PLL1CFGR_PLL1M(8) | \ + RCC_PLL1CFGR_PLL1PEN | \ + RCC_PLL1CFGR_PLL1QEN | \ + RCC_PLL1CFGR_PLL1REN) +#define STM32_PLLCFG_PLL1N RCC_PLL1DIVR_PLL1N(125) +#define STM32_PLLCFG_PLL1P RCC_PLL1DIVR_PLL1P(2) +#define STM32_PLLCFG_PLL1Q RCC_PLL1DIVR_PLL1Q(4) +#define STM32_PLLCFG_PLL1R RCC_PLL1DIVR_PLL1R(2) +#define STM32_PLLCFG_PLL1DIVR (STM32_PLLCFG_PLL1N | \ + STM32_PLLCFG_PLL1P | \ + STM32_PLLCFG_PLL1Q | \ + STM32_PLLCFG_PLL1R) + +#define STM32_VCO1_FRQ ((STM32_HSI_FREQUENCY / 8) * 125) +#define STM32_PLL1P_FREQUENCY (STM32_VCO1_FRQ / 2) +#define STM32_PLL1Q_FREQUENCY (STM32_VCO1_FRQ / 4) +#define STM32_PLL1R_FREQUENCY (STM32_VCO1_FRQ / 2) + +/* PLL2 config: Needed to use 2 ADC at max speed. */ + +#define STM32_PLLCFG_PLL2CFG (RCC_PLL2CFGR_PLL2SRC_HSI | \ + RCC_PLL2CFGR_PLL2RGE_4_8M | \ + RCC_PLL2CFGR_PLL2M(8) | \ + RCC_PLL2CFGR_PLL2REN) +#define STM32_PLLCFG_PLL2N RCC_PLL2DIVR_PLL2N(75) +#define STM32_PLLCFG_PLL2R RCC_PLL2DIVR_PLL2R(4) +#define STM32_PLLCFG_PLL2DIVR (STM32_PLLCFG_PLL2N | \ + STM32_PLLCFG_PLL2R) + +#define STM32_VCO2_FRQ ((STM32_HSI_FREQUENCY / 8) * 75) +#define STM32_PLL2R_FREQUENCY (STM32_VCO2_FRQ / 4) + +/* Enable CLK48; get it from HSI48 */ + +#if defined(CONFIG_STM32_USBFS) || defined(CONFIG_STM32_RNG) +# define STM32_USE_CLK48 1 +#endif + +#if defined(CONFIG_STM32_USBFS) +# define STM32_CLKUSB_SEL RCC_CCIPR4_USBSEL_HSI48KERCK +# define STM32_HSI48_SYNCSRC SYNCSRC_USB +#else +# define STM32_HSI48_SYNCSRC SYNCSRC_NONE +#endif + +#if defined(CONFIG_STM32_RNG) +# define STM32_CLKRNG_SEL RCC_CCIPR5_RNGSEL_HSI48KERCK +#endif + +/* Enable LSE (for the RTC) */ + +#define STM32_USE_LSE 1 + +/* Configure the HCLK divisor (for the AHB bus, core, memory, and DMA */ + +#define STM32_RCC_CFGR2_HPRE RCC_CFGR2_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY + +/* Configure the APB1 prescaler */ + +#define STM32_RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_HCLK1d2 /* PCLK1 = HCLK / 2 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY / 2) + +#define STM32_TIM2_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_TIM3_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_LPTIM2_CLKIN (STM32_PCLK1_FREQUENCY) + +/* Configure the APB2 prescaler */ + +#define STM32_RCC_CFGR2_PPRE2 RCC_CFGR2_PPRE2_HCLK1 /* PCLK2 = HCLK / 1 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY / 1) + +#define STM32_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) + +/* Configure the APB3 prescaler */ + +#define STM32_RCC_CFGR2_PPRE3 RCC_CFGR2_PPRE3_HCLK1 /* PCLK3 = HCLK / 1 */ +#define STM32_PCLK3_FREQUENCY (STM32_HCLK_FREQUENCY / 1) + +#define STM32_LPTIM1_CLKIN (STM32_PCLK3_FREQUENCY) + +/* LED definitions **********************************************************/ + +/* The Nucleo-H503RB has one user controllable LED, LD2 a Green LED + * connected to PA5. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LED + * in any way. + * The following definition is used to access the LED. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_NLEDS 1 + +#define BOARD_LED_GREEN BOARD_LED1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) + +/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in + * include/board.h and src/stm32_autoleds.c. The LED is used to encode OS- + * related events as follows: + * + * SYMBOL Meaning LED state + * Green + * ------------------- ----------------------- ----------- + */ + +#define LED_STARTED 0 /* NuttX has been started OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON */ +#define LED_INIRQ 2 /* In an interrupt N/C */ +#define LED_SIGNAL 2 /* In a signal handler N/C */ +#define LED_ASSERTION 2 /* An assertion failed N/C */ +#define LED_PANIC 3 /* The system has crashed Blinking */ + +/* Thus if the Green LED is statically on, NuttX has successfully booted and + * is, apparently, running normally. If the Green LED is flashing at + * approximately 2Hz, then a fatal error has been detected and the system + * has halted. + */ + +/* Button definitions *******************************************************/ + +/* The Nucleo-H503RB supports one button: Pushbutton B1, labeled "User", is + * connected to GPIO PC13. + * A high value will be sensed when the button is pressed. + */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Alternate function pin selections ****************************************/ + +/* USART3 GPIOs *************************************************************/ + +/* USART3 (Nucleo Virtual Console) */ + +#define GPIO_USART3_RX GPIO_USART3_RX_1 /* PA3 */ +#define GPIO_USART3_TX GPIO_USART3_TX_1 /* PA4 */ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_board_initialize + * + * Description: + * All STM32H5 architectures must provide the following entry point. + * This entry point is called early in the initialization -- after all + * memory has been configured and mapped but before any devices + * have been initialized. + * + ****************************************************************************/ + +void stm32_board_initialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_ARM_STM32H5_NUCLEO_H503RB_INCLUDE_BOARD_H */ diff --git a/boards/arm/stm32h5/nucleo-h503rb/scripts/Make.defs b/boards/arm/stm32h5/nucleo-h503rb/scripts/Make.defs new file mode 100644 index 00000000000..1741aec4bed --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/scripts/Make.defs @@ -0,0 +1,36 @@ +############################################################################## +# boards/arm/stm32h5/nucleo-h503rb/scripts/Make.defs +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################## + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv8-m/Toolchain.defs + +ARCHSCRIPT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)flash.ld + +CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 diff --git a/boards/arm/stm32h5/nucleo-h503rb/scripts/flash.ld b/boards/arm/stm32h5/nucleo-h503rb/scripts/flash.ld new file mode 100644 index 00000000000..b79a8459950 --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/scripts/flash.ld @@ -0,0 +1,99 @@ +/**************************************************************************** + * boards/arm/stm32h5/nucleo-h503rb/scripts/flash.ld + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP(*(.init_array EXCLUDE_FILE(*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o) .ctors)) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + . = ALIGN(4); + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(8); + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/boards/arm/stm32h5/nucleo-h503rb/src/.gitignore b/boards/arm/stm32h5/nucleo-h503rb/src/.gitignore new file mode 100644 index 00000000000..726d936e1e3 --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/boards/arm/stm32h5/nucleo-h503rb/src/CMakeLists.txt b/boards/arm/stm32h5/nucleo-h503rb/src/CMakeLists.txt new file mode 100644 index 00000000000..b3db7b56b17 --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/src/CMakeLists.txt @@ -0,0 +1,37 @@ +# ############################################################################## +# boards/arm/stm32h5/nucleo-h503rb/src/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +set(SRCS stm32_boot.c stm32_bringup.c) + +if(CONFIG_ARCH_LEDS) + list(APPEND SRCS stm32_autoleds.c) +else() + list(APPEND SRCS stm32_userleds.c) +endif() + +if(CONFIG_ARCH_BUTTONS) + list(APPEND SRCS stm32_buttons.c) +endif() + +target_sources(board PRIVATE ${SRCS}) + +set_property(GLOBAL PROPERTY LD_SCRIPT "${NUTTX_BOARD_DIR}/scripts/flash.ld") diff --git a/boards/arm/stm32h5/nucleo-h503rb/src/Make.defs b/boards/arm/stm32h5/nucleo-h503rb/src/Make.defs new file mode 100644 index 00000000000..7d57959a468 --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/src/Make.defs @@ -0,0 +1,39 @@ +############################################################################ +# boards/arm/stm32h5/nucleo-h503rb/src/Make.defs +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/Make.defs + +CSRCS = stm32_boot.c stm32_bringup.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +DEPPATH += --dep-path board +VPATH += :board +CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board diff --git a/boards/arm/stm32h5/nucleo-h503rb/src/nucleo-h503rb.h b/boards/arm/stm32h5/nucleo-h503rb/src/nucleo-h503rb.h new file mode 100644 index 00000000000..00bdb2595bb --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/src/nucleo-h503rb.h @@ -0,0 +1,113 @@ +/**************************************************************************** + * boards/arm/stm32h5/nucleo-h503rb/src/nucleo-h503rb.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_STM32H5_NUCLEO_H503RB_SRC_NUCLEO_H503RB_H +#define __BOARDS_ARM_STM32H5_NUCLEO_H503RB_SRC_NUCLEO_H503RB_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/compiler.h> +#include <stdint.h> + +#include "stm32_gpio.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#define HAVE_PROC 1 +#define HAVE_RTC_DRIVER 1 + +#if !defined(CONFIG_FS_PROCFS) +# undef HAVE_PROC +#endif + +#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No procfs support +# undef HAVE_PROC +#endif + +/* Check if we can support the RTC driver */ + +#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER) +# undef HAVE_RTC_DRIVER +#endif + +/* NUCLEO-H503RB GPIOs ******************************************************/ + +/* LED I/O Color + * LD2 PA5 Green + * - When the I/O is HIGH, the LED is on. + * - When the I/O is LOW, the LED is off + */ + +#define GPIO_LD2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHZ | \ + GPIO_OUTPUT_CLEAR | GPIO_PORTA | GPIO_PIN5) + +/* Button definitions *******************************************************/ + +/* B1 USER: the user button is connected to the I/O PC13 of the STM32 + * microcontroller. + */ + +#define MIN_IRQBUTTON BUTTON_USER +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | \ + GPIO_PORTC | GPIO_PIN13) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_bringup + * + * Description: + * + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + ****************************************************************************/ + +int stm32_bringup(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_ARM_STM32H5_NUCLEO_H503RB_SRC_NUCLEO_H503RB_H */ diff --git a/boards/arm/stm32h5/nucleo-h503rb/src/stm32_autoleds.c b/boards/arm/stm32h5/nucleo-h503rb/src/stm32_autoleds.c new file mode 100644 index 00000000000..75825e9c5e9 --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/src/stm32_autoleds.c @@ -0,0 +1,83 @@ +/**************************************************************************** + * boards/arm/stm32h5/nucleo-h503rb/src/stm32_autoleds.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdint.h> +#include <stdbool.h> +#include <nuttx/debug.h> + +#include <nuttx/board.h> + +#include "chip.h" +#include "arm_internal.h" +#include "stm32_gpio.h" +#include "nucleo-h503rb.h" + +#include <arch/board/board.h> + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure the LD2 GPIO for output. Initial state is OFF */ + + stm32_configgpio(GPIO_LD2); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led == 1 || led == 3) + { + stm32_gpiowrite(GPIO_LD2, true); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == 3) + { + stm32_gpiowrite(GPIO_LD2, false); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/boards/arm/stm32h5/nucleo-h503rb/src/stm32_boot.c b/boards/arm/stm32h5/nucleo-h503rb/src/stm32_boot.c new file mode 100644 index 00000000000..a5402a386bb --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/src/stm32_boot.c @@ -0,0 +1,84 @@ +/**************************************************************************** + * boards/arm/stm32h5/nucleo-h503rb/src/stm32_boot.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <nuttx/debug.h> + +#include <nuttx/board.h> + +#include "arm_internal.h" +#include "nucleo-h503rb.h" +#include "stm32_pwr.h" + +#include <arch/board/board.h> + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_board_initialize + * + * Description: + * All STM32 architectures must provide the following entry point. This + * entry point is called early in the initialization -- after all memory + * has been configured and mapped but before any devices have been + * initialized. + * + ****************************************************************************/ + +void stm32_board_initialize(void) +{ +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_late_initialize + * + * Description: + * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_late_initialize(). board_late_initialize() will + * be called immediately after up_initialize() is called and just before + * the initial application is started. This additional initialization + * phase may be used, for example, to initialize board-specific device + * drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_LATE_INITIALIZE +void board_late_initialize(void) +{ + /* Perform board-specific initialization here if so configured */ + + stm32_bringup(); +} +#endif diff --git a/boards/arm/stm32h5/nucleo-h503rb/src/stm32_bringup.c b/boards/arm/stm32h5/nucleo-h503rb/src/stm32_bringup.c new file mode 100644 index 00000000000..914d3977df4 --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/src/stm32_bringup.c @@ -0,0 +1,100 @@ +/**************************************************************************** + * boards/arm/stm32h5/nucleo-h503rb/src/stm32_bringup.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <sys/mount.h> +#include <sys/types.h> +#include <nuttx/debug.h> + +#include <nuttx/input/buttons.h> +#include <nuttx/leds/userled.h> +#include <nuttx/board.h> + +#include "nucleo-h503rb.h" + +#include <arch/board/board.h> + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + ****************************************************************************/ + +int stm32_bringup(void) +{ + int ret; + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount procfs at /proc: %d\n", ret); + } +#endif + +#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER) + /* Register the LED driver */ + + ret = userled_lower_initialize("/dev/userleds"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_INPUT_BUTTONS +#ifdef CONFIG_INPUT_BUTTONS_LOWER + iinfo("Initializing button driver\n"); + + /* Register the BUTTON driver */ + + ret = btn_lower_initialize("/dev/buttons"); + if (ret < 0) + { + ierr("ERROR: btn_lower_initialize() failed: %d\n", ret); + } +#else + /* Enable BUTTON support for some other purpose */ + + board_button_initialize(); +#endif +#endif /* CONFIG_INPUT_BUTTONS */ + + UNUSED(ret); + return OK; +} diff --git a/boards/arm/stm32h5/nucleo-h503rb/src/stm32_buttons.c b/boards/arm/stm32h5/nucleo-h503rb/src/stm32_buttons.c new file mode 100644 index 00000000000..301a459877a --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/src/stm32_buttons.c @@ -0,0 +1,79 @@ +/**************************************************************************** + * boards/arm/stm32h5/nucleo-h503rb/src/stm32_buttons.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdint.h> +#include <stdbool.h> +#include <errno.h> + +#include <nuttx/arch.h> +#include <nuttx/board.h> + +#include "stm32_gpio.h" +#include "nucleo-h503rb.h" + +#include <arch/board/board.h> + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +uint32_t board_button_initialize(void) +{ + /* Configure the single button as an input. NOTE that EXTI interrupts are + * also configured for the pin. + */ + + stm32_configgpio(GPIO_BTN_USER); + return NUM_BUTTONS; +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint32_t board_buttons(void) +{ + /* Check the state of the USER button. */ + + return stm32_gpioread(GPIO_BTN_USER) ? BUTTON_USER_BIT : 0; +} + +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/boards/arm/stm32h5/nucleo-h503rb/src/stm32_userleds.c b/boards/arm/stm32h5/nucleo-h503rb/src/stm32_userleds.c new file mode 100644 index 00000000000..5baed956f5e --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h503rb/src/stm32_userleds.c @@ -0,0 +1,98 @@ +/**************************************************************************** + * boards/arm/stm32h5/nucleo-h503rb/src/stm32_userleds.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdbool.h> +#include <nuttx/debug.h> + +#include <sys/param.h> + +#include <nuttx/board.h> +#include <arch/board/board.h> + +#include "stm32_gpio.h" +#include "nucleo-h503rb.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LED. If CONFIG_ARCH_LEDS is not defined, then the + * board_userled_initialize() is available to initialize the LED from user + * application logic. + * + ****************************************************************************/ + +uint32_t board_userled_initialize(void) +{ + /* Configure the LD2 GPIO for output */ + + stm32_configgpio(GPIO_LD2); + return BOARD_NLEDS; +} + +/**************************************************************************** + * Name: board_userled + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LED. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is + * available to control the LED from user application logic. + * + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED1) + { + stm32_gpiowrite(GPIO_LD2, ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + * + * Description: + * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board + * LED. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() + * is available to control the LED from user application logic. + * + ****************************************************************************/ + +void board_userled_all(uint32_t ledset) +{ + stm32_gpiowrite(GPIO_LD2, (ledset & BOARD_LED1_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */
