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commit 4d1dc6334a4c552bea0ee8ebb5302d765bba28a6 Author: Liam Howatt <[email protected]> AuthorDate: Wed Aug 19 16:02:22 2026 -0400 boards/stm32h5/nucleo-h563zi: Register SPI1 spidev. Add board spi1 initialization and generic spi chardev registration for nucleo-h563zi. Specify the SPI1 clock source and frequency on this board for the spi driver. Define the SPI pins for this board. The SPI_A CN7 header pins were used. Include stm32_spi.h in stm32h5/stm32.h. Signed-off-by: Liam Howatt <[email protected]> --- arch/arm/src/stm32h5/stm32.h | 1 + boards/arm/stm32h5/nucleo-h563zi/include/board.h | 13 ++ boards/arm/stm32h5/nucleo-h563zi/src/Make.defs | 4 + .../arm/stm32h5/nucleo-h563zi/src/nucleo-h563zi.h | 25 +++ .../arm/stm32h5/nucleo-h563zi/src/stm32_bringup.c | 12 ++ boards/arm/stm32h5/nucleo-h563zi/src/stm32_spi.c | 187 +++++++++++++++++++++ 6 files changed, 242 insertions(+) diff --git a/arch/arm/src/stm32h5/stm32.h b/arch/arm/src/stm32h5/stm32.h index 25d810170aa..a5ef98353bc 100644 --- a/arch/arm/src/stm32h5/stm32.h +++ b/arch/arm/src/stm32h5/stm32.h @@ -47,6 +47,7 @@ #include "stm32_lowputc.h" #include "stm32_pwr.h" #include "stm32_rcc.h" +#include "stm32_spi.h" #include "stm32_tim.h" #include "stm32_uart.h" #include "stm32_usbfs.h" diff --git a/boards/arm/stm32h5/nucleo-h563zi/include/board.h b/boards/arm/stm32h5/nucleo-h563zi/include/board.h index 618e7fb4291..187c1bbf6c0 100644 --- a/boards/arm/stm32h5/nucleo-h563zi/include/board.h +++ b/boards/arm/stm32h5/nucleo-h563zi/include/board.h @@ -183,6 +183,10 @@ #endif /* CONFIG_STM32_USE_HSE*/ +/* Select the SPI1 clock and tell driver the frequency */ +#define STM32_RCC_CCIPR3_SPI1SEL RCC_CCIPR3_SPI1SEL_PLL1QCK +#define STM32_SPI1_FREQUENCY STM32_PLL1Q_FREQUENCY + /* Enable CLK48; get it from HSI48 */ #if defined(CONFIG_STM32_USBFS) || defined(CONFIG_STM32_RNG) @@ -332,6 +336,15 @@ /* Alternate function pin selections ****************************************/ +/* SPI1: Arduino Connector CN7 */ + +#define GPIO_SPI1_NSS (GPIO_OUTPUT|GPIO_SPEED_2MHZ| \ + GPIO_PUSHPULL|GPIO_OUTPUT_SET| \ + GPIO_PORTD|GPIO_PIN14) /* PD14 */ +#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHZ) /* PA5 */ +#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_3) /* PG9 */ +#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_2|GPIO_SPEED_50MHZ) /* PB5 */ + /* ADC GPIOs ****************************************************************/ #define GPIO_ADC1_INP3 (GPIO_ADC1_INP3_0) diff --git a/boards/arm/stm32h5/nucleo-h563zi/src/Make.defs b/boards/arm/stm32h5/nucleo-h563zi/src/Make.defs index 58888944b0f..828ce6c96c1 100644 --- a/boards/arm/stm32h5/nucleo-h563zi/src/Make.defs +++ b/boards/arm/stm32h5/nucleo-h563zi/src/Make.defs @@ -34,6 +34,10 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y) CSRCS += stm32_buttons.c endif +ifeq ($(CONFIG_STM32_SPI),y) +CSRCS += stm32_spi.c +endif + ifeq ($(CONFIG_ADC),y) CSRCS += stm32_adc.c endif diff --git a/boards/arm/stm32h5/nucleo-h563zi/src/nucleo-h563zi.h b/boards/arm/stm32h5/nucleo-h563zi/src/nucleo-h563zi.h index 1c609efc589..7bbc2507f82 100644 --- a/boards/arm/stm32h5/nucleo-h563zi/src/nucleo-h563zi.h +++ b/boards/arm/stm32h5/nucleo-h563zi/src/nucleo-h563zi.h @@ -115,6 +115,31 @@ int stm32_bringup(void); +#ifdef CONFIG_STM32_SPI +/**************************************************************************** + * Name: stm32_spiregister + * + * Description: + * Called to register spi character driver of initialized + * spi device for the Nucleo-L432KC board. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_DRIVER +void stm32_spiregister(void); +#endif + +/**************************************************************************** + * Name: stm32_spiinitialize + * + * Description: + * Called to configure SPI chip select GPIO pins. + * + ****************************************************************************/ + +void stm32_spiinitialize(void); +#endif /* CONFIG_STM32_SPI */ + /**************************************************************************** * Name: stm32_adc_setup * diff --git a/boards/arm/stm32h5/nucleo-h563zi/src/stm32_bringup.c b/boards/arm/stm32h5/nucleo-h563zi/src/stm32_bringup.c index eb2cd7e53d4..2cfb9622260 100644 --- a/boards/arm/stm32h5/nucleo-h563zi/src/stm32_bringup.c +++ b/boards/arm/stm32h5/nucleo-h563zi/src/stm32_bringup.c @@ -146,6 +146,18 @@ int stm32_bringup(void) # endif #endif +#ifdef CONFIG_STM32_SPI + /* Cannot call at board init because irq_attach would be called before + * before irq_initialize is called. + */ + + stm32_spiinitialize(); + +#ifdef CONFIG_SPI_DRIVER + stm32_spiregister(); +#endif +#endif /* CONFIG_STM32_SPI */ + #ifdef CONFIG_PWM /* Initialize PWM and register the PWM device. */ diff --git a/boards/arm/stm32h5/nucleo-h563zi/src/stm32_spi.c b/boards/arm/stm32h5/nucleo-h563zi/src/stm32_spi.c new file mode 100644 index 00000000000..b314bb49ef3 --- /dev/null +++ b/boards/arm/stm32h5/nucleo-h563zi/src/stm32_spi.c @@ -0,0 +1,187 @@ +/**************************************************************************** + * boards/arm/stm32h5/nucleo-h563zi/src/stm32_spi.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdint.h> +#include <stdbool.h> +#include <nuttx/debug.h> +#include <errno.h> + +#include <nuttx/spi/spi.h> +#include <nuttx/spi/spi_transfer.h> +#include <arch/board/board.h> + +#include "chip.h" +#include <stm32.h> + +#include "nucleo-h563zi.h" + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* Global driver instances */ + +#ifdef CONFIG_STM32_SPI1 +struct spi_dev_s *g_spi1; +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_spiregister + * + * Description: + * Called to register spi character driver of + * initialized spi device for the Nucleo-H563ZI board. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_DRIVER +void stm32_spiregister(void) +{ +#ifdef CONFIG_STM32_SPI1 + int ret = spi_register(g_spi1, 1); + if (ret < 0) + { + spierr("ERROR: FAILED to register driver of SPI port 1\n"); + } +#endif +} +#endif + +/**************************************************************************** + * Name: stm32_spiinitialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Nucleo-H563ZI + * board. + * + ****************************************************************************/ + +void stm32_spiinitialize(void) +{ + /* NOTE: Clocking for SPI1 was already provided in stm32_rcc.c. + * Configurations of SPI pins is performed in stm32_spi.c. + * Here, we only initialize chip select pins unique to the board + * architecture. + */ + +#ifdef CONFIG_STM32_SPI1 + /* Configure SPI1-based devices */ + + g_spi1 = stm32_spibus_initialize(1); + if (!g_spi1) + { + spierr("ERROR: FAILED to initialize SPI port 1\n"); + } + else + { + spiinfo("INFO: SPI port 1 initialized\n"); + } + + /* Setup CS, EN & IRQ line IOs */ + + stm32_configgpio(GPIO_SPI1_NSS); +#endif +} + +/**************************************************************************** + * Name: stm32_spi1select and stm32_spi1status + * + * Description: + * The external functions, stm32_spi1select and stm32_spi1status + * must be provided by board-specific logic. They are implementations of + * the select and status methods of the SPI interface defined by struct + * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including + * up_spiinitialize()) are provided by common STM32 logic. To use this + * common SPI logic on your board: + * + * 1. Provide logic in stm32_board_initialize() to configure SPI chip + * select pins. + * 2. Provide stm32_spi1select() and stm32_spi1status() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board is + * configured. + * 3. Add a calls to up_spiinitialize() in your low level application + * initialization logic + * 4. The handle returned by up_spiinitialize() may then be used to bind + * the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %08X CS: %s\n", (int)devid, + selected ? "assert" : "de-assert"); + + stm32_gpiowrite(GPIO_SPI1_NSS, !selected); +} + +uint8_t stm32_spi1status(struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * OK on success or negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return -ENODEV; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */
