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commit f6aa5c115e2072fa0abd09d208c621728741212a Author: Jukka Laitinen <[email protected]> AuthorDate: Mon Sep 14 14:56:19 2026 +0300 arch/arm/src/imxrt/chip.h: Add cache line definitions for Cortex-M33 i.MXRT118x have a Cortex-M33, which is ARMv8-M. Add cache line definitions for this one. Signed-off-by: Jukka Laitinen <[email protected]> --- arch/arm/src/imxrt/chip.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/arm/src/imxrt/chip.h b/arch/arm/src/imxrt/chip.h index c31b4427e27..7cde382f5fc 100644 --- a/arch/arm/src/imxrt/chip.h +++ b/arch/arm/src/imxrt/chip.h @@ -45,10 +45,15 @@ #define ARMV7M_PERIPHERAL_INTERRUPTS IMXRT_IRQ_NEXTINT -/* Cache line sizes (in bytes)for the i.MX RT */ +/* Cache line sizes (in bytes) for the i.MX RT. */ -#define ARMV7M_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */ -#define ARMV7M_ICACHE_LINESIZE 32 /* 32 bytes (8 words) */ +#ifdef CONFIG_ARCH_CORTEXM33 +# define ARMV8M_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */ +# define ARMV8M_ICACHE_LINESIZE 32 /* 32 bytes (8 words) */ +#else +# define ARMV7M_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */ +# define ARMV7M_ICACHE_LINESIZE 32 /* 32 bytes (8 words) */ +#endif /**************************************************************************** * Pre-processor Definitions
