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new 80ccc5d9aa7 arch/risc-v/espressif: pick oneshot TIMG from SoC instance
count
80ccc5d9aa7 is described below
commit 80ccc5d9aa766e1de62360453ced24303b7902dc
Author: Marcio Ribeiro <[email protected]>
AuthorDate: Tue Sep 15 14:37:31 2026 -0300
arch/risc-v/espressif: pick oneshot TIMG from SoC instance count
Some SoCs have a single timer group, so a hardcoded GROUP_ID of 1
overflowed soc_timg_gptimer_signals and crashed in
periph_rcc_acquire_enter. Guard gptimer group 1 behind
TIMG_LL_GET(INST_NUM) as well.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Marcio Ribeiro <[email protected]>
---
arch/risc-v/src/common/espressif/esp_gptimer.c | 11 +++++++++--
arch/risc-v/src/common/espressif/esp_oneshot.c | 7 +++++--
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/risc-v/src/common/espressif/esp_gptimer.c
b/arch/risc-v/src/common/espressif/esp_gptimer.c
index ce9060c9ad2..13296d08bdf 100644
--- a/arch/risc-v/src/common/espressif/esp_gptimer.c
+++ b/arch/risc-v/src/common/espressif/esp_gptimer.c
@@ -134,6 +134,8 @@ static struct esp_timer_lowerhalf_s g_timer0_lowerhalf =
#endif
};
+#if TIMG_LL_GET(INST_NUM) > 1
+
/* TIMER1 lower-half */
static struct esp_timer_lowerhalf_s g_timer1_lowerhalf =
@@ -144,6 +146,7 @@ static struct esp_timer_lowerhalf_s g_timer1_lowerhalf =
.pm_lock = NULL,
#endif
};
+#endif
/****************************************************************************
* Private Functions
@@ -297,6 +300,7 @@ static int esp_timer_stop(struct timer_lowerhalf_s *lower)
}
timer_hal_context_t *hal = &(priv->hal);
+
timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(hal->timer_id),
false);
timer_ll_enable_counter(hal->dev, hal->timer_id, false);
@@ -371,6 +375,7 @@ static int esp_timer_getstatus(struct timer_lowerhalf_s
*lower,
volatile timg_hwtimer_reg_t *hw_timer =
&(hal->dev->hw_timer[hal->timer_id]);
+
alarm_value = ((uint64_t)hw_timer->alarmhi.tx_alarm_hi << 32) |
(hw_timer->alarmlo.tx_alarm_lo);
@@ -547,8 +552,8 @@ IRAM_ATTR static int esp_timer_isr(int irq, void *context,
void *arg)
*
* Description:
* Initialize a timer device.
- * Important: ESP32-C3|C6|H2 each has two timer groups.
- * Each group has one timer and one watchdog timer.
+ * Important: ESP32-C3|C6|H2 each has two timer groups, while ESP32-C2 has
+ * a single one. Each group has one timer and one watchdog timer.
* This initialization function is used to initialize the timer 0 of the
* specified group.
*
@@ -582,12 +587,14 @@ int esp_timer_initialize(int group_id)
lower->hal.timer_id = timer_id;
}
break;
+#if TIMG_LL_GET(INST_NUM) > 1
case 1:
{
lower = &g_timer1_lowerhalf;
lower->hal.timer_id = timer_id;
}
break;
+#endif
default:
{
return -ENODEV;
diff --git a/arch/risc-v/src/common/espressif/esp_oneshot.c
b/arch/risc-v/src/common/espressif/esp_oneshot.c
index 8c3567c5e90..b6bed9cbc68 100644
--- a/arch/risc-v/src/common/espressif/esp_oneshot.c
+++ b/arch/risc-v/src/common/espressif/esp_oneshot.c
@@ -55,9 +55,9 @@
* Pre-processor Definitions
****************************************************************************/
-/* Oneshot Timer is assigned to the Timer 0 of TimerGroup 1 */
+/* Oneshot Timer is assigned to the Timer 0 of the last TimerGroup */
-#define GROUP_ID 1
+#define GROUP_ID (TIMG_LL_GET(INST_NUM) - 1)
#define TIMER_ID 0
/* Resolution of 1 microsecond */
@@ -309,6 +309,7 @@ static void esp_oneshot_cancel(struct oneshot_lowerhalf_s
*lower)
else
{
timer_hal_context_t *hal = &(priv->hal);
+
timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(hal->timer_id),
false);
timer_ll_enable_counter(hal->dev, hal->timer_id, false);
@@ -546,6 +547,7 @@ int esp_oneshot_initialize(void)
{
struct oneshot_lowerhalf_s *lower = oneshot_initialize(0,
ONESHOT_RESOLUTION);
+
if (lower == NULL)
{
tmrerr("Failed to initialize oneshot timer\n");
@@ -560,6 +562,7 @@ int esp_oneshot_initialize(void)
#else
int ret = oneshot_register("/dev/oneshot", lower);
+
if (ret < 0)
{
tmrerr("Failed to register oneshot: %d\n", ret);
