jlaitine commented on code in PR #20363:
URL: https://github.com/apache/nuttx/pull/20363#discussion_r4105070574
##########
boards/arm/imxrt/imxrt1180-evk/include/imxrt118x_trdc_config.h:
##########
@@ -96,6 +96,63 @@
#define TRDC_NETC_BASE 0x60000000
#define TRDC_NETC_SIZE 0x01000000
+/* GPIO pin control and interrupt control settings. */
+
+struct trdc_gpio_config trdc_gpio[] =
+{
+ { IMXRT_GPIO2_BASE + IMXRT_GPIO_PCNS_OFFSET, 0x0 },
+ { IMXRT_GPIO2_BASE + IMXRT_GPIO_ICNS_OFFSET, 0x0 },
+ { IMXRT_GPIO2_BASE + IMXRT_GPIO_PCNP_OFFSET, 0x0 },
+ { IMXRT_GPIO2_BASE + IMXRT_GPIO_ICNP_OFFSET, 0x0 },
+ { IMXRT_GPIO3_BASE + IMXRT_GPIO_PCNS_OFFSET, 0x0 },
+ { IMXRT_GPIO3_BASE + IMXRT_GPIO_ICNS_OFFSET, 0x0 },
+ { IMXRT_GPIO3_BASE + IMXRT_GPIO_PCNP_OFFSET, 0x0 },
+ { IMXRT_GPIO3_BASE + IMXRT_GPIO_ICNP_OFFSET, 0x0 },
+ { IMXRT_GPIO4_BASE + IMXRT_GPIO_PCNS_OFFSET, 0x0 },
+ { IMXRT_GPIO4_BASE + IMXRT_GPIO_ICNS_OFFSET, 0x0 },
+ { IMXRT_GPIO4_BASE + IMXRT_GPIO_PCNP_OFFSET, 0x0 },
+ { IMXRT_GPIO4_BASE + IMXRT_GPIO_ICNP_OFFSET, 0x0 },
+ { IMXRT_GPIO5_BASE + IMXRT_GPIO_PCNS_OFFSET, 0x0 },
+ { IMXRT_GPIO5_BASE + IMXRT_GPIO_ICNS_OFFSET, 0x0 },
+ { IMXRT_GPIO5_BASE + IMXRT_GPIO_PCNP_OFFSET, 0x0 },
+ { IMXRT_GPIO5_BASE + IMXRT_GPIO_ICNP_OFFSET, 0x0 },
+ { IMXRT_GPIO6_BASE + IMXRT_GPIO_PCNS_OFFSET, 0x0 },
+ { IMXRT_GPIO6_BASE + IMXRT_GPIO_ICNS_OFFSET, 0x0 },
+ { IMXRT_GPIO6_BASE + IMXRT_GPIO_PCNP_OFFSET, 0x0 },
+ { IMXRT_GPIO6_BASE + IMXRT_GPIO_ICNP_OFFSET, 0x0 },
+};
+
+/* MDA settings matching NXP's APP_CommonTrdcDACSetting() configuration. */
+
+struct trdc_mda_config trdc_mda[] =
Review Comment:
good points, now fixed, thanks!
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