This is an automated email from the ASF dual-hosted git repository. xiaoxiang781216 pushed a commit to branch master in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 2bd1334ec4e9e5fe5b8cbd9d933f9fc25a8e018f Author: Justin Hammond <[email protected]> AuthorDate: Mon Aug 17 00:08:21 2026 +0800 arch/risc-v/eic7700x: Describe the pads through procfs. Implements the pinctrl get_pad method, so /proc/pinctrl and PINCTRLC_GETPAD carry what this block is actually holding: each layout's common fields with their validity bits, and the layout's own fields, the RGMII and mode-select voltage bits and the oscillator tuning, as key:value text. Names every pad and every documented function select in one PINCTRL_PADNAME() table, so func:2 on S_MODE reads as GPIO94 rather than as a number. The names are the manual's own; a pad's name describes its default function, not its current one. The table costs about 9 KiB and is built only with the file that reads it; the name helpers return NULL without it and the strings stay empty. Assisted-by: Claude:claude-opus-5 Signed-off-by: Justin Hammond <[email protected]> --- arch/risc-v/src/eic7700x/eic7700x_pinctrl.c | 389 +++++++++++++++++++++++- arch/risc-v/src/eic7700x/eic7700x_pinctrl.h | 45 +++ arch/risc-v/src/eic7700x/eic7700x_pinctrl_ops.c | 106 +++++++ 3 files changed, 539 insertions(+), 1 deletion(-) diff --git a/arch/risc-v/src/eic7700x/eic7700x_pinctrl.c b/arch/risc-v/src/eic7700x/eic7700x_pinctrl.c index 40cde71c9c5..1dc22401af2 100644 --- a/arch/risc-v/src/eic7700x/eic7700x_pinctrl.c +++ b/arch/risc-v/src/eic7700x/eic7700x_pinctrl.c @@ -337,9 +337,359 @@ static_assert(nitems(g_eic7700x_pad_bygpio) == EIC7700X_PAD_NGPIOS, static struct pinctrl_dev_s g_eic7700x_pinctrl_dev = { - .ops = &g_eic7700x_pinctrl_ops + .ops = &g_eic7700x_pinctrl_ops, + .npins = EIC7700X_PAD_NPADS }; +#ifdef HAVE_PINCTRL_TEXT + +/* Every pad's name and the name of each function select the manual + * documents, in select order, for /proc/pinctrl and PINCTRLC_GETPAD. + * The names are the manual's own; a pad's name describes its default + * function, not its current one. + */ + +static const struct pinctrl_padname_s +g_eic7700x_pad_names[EIC7700X_PAD_NPADS] = +{ + [EIC7700X_PAD_CHIP_MODE] = + PINCTRL_PADNAME("CHIP_MODE", "CHIP_MODE"), + [EIC7700X_PAD_MODE_SET0] = + PINCTRL_PADNAME("MODE_SET0", "SDIO0_DETECT", NULL, "GPIO13"), + [EIC7700X_PAD_MODE_SET1] = + PINCTRL_PADNAME("MODE_SET1", "SDIO0_WRITE_PROT", NULL, "GPIO14"), + [EIC7700X_PAD_MODE_SET2] = + PINCTRL_PADNAME("MODE_SET2", "SDIO1_DETECT", NULL, "GPIO15"), + [EIC7700X_PAD_MODE_SET3] = + PINCTRL_PADNAME("MODE_SET3", "SDIO1_WRITE_PROT", NULL, "GPIO16"), + [EIC7700X_PAD_XIN] = + PINCTRL_PADNAME("XIN", "XIN_24M"), + [EIC7700X_PAD_RESERVED0] = + PINCTRL_PADNAME("RESERVED0", "XOUT_24M"), + [EIC7700X_PAD_RST_OUT_N] = + PINCTRL_PADNAME("RST_OUT_N", "RST_OUT_N"), + [EIC7700X_PAD_KEY_RESET_N] = + PINCTRL_PADNAME("KEY_RESET_N", "KEY_RESET_N"), + [EIC7700X_PAD_RESERVED1] = + PINCTRL_PADNAME("RESERVED1", NULL), + [EIC7700X_PAD_RESERVED2] = + PINCTRL_PADNAME("RESERVED2", NULL), + [EIC7700X_PAD_RESERVED3] = + PINCTRL_PADNAME("RESERVED3", NULL), + [EIC7700X_PAD_GPIO0] = + PINCTRL_PADNAME("GPIO0", "GPIO0"), + [EIC7700X_PAD_POR_SEL] = + PINCTRL_PADNAME("POR_SEL", "POR_SEL"), + [EIC7700X_PAD_JTAG0_TCK] = + PINCTRL_PADNAME("JTAG0_TCK", "JTAG0_TCK", "SPI2_CLK", "GPIO1"), + [EIC7700X_PAD_JTAG0_TMS] = + PINCTRL_PADNAME("JTAG0_TMS", "JTAG0_TMS", "SPI2_D0", "GPIO2"), + [EIC7700X_PAD_JTAG0_TDI] = + PINCTRL_PADNAME("JTAG0_TDI", "JTAG0_TDI", "SPI2_D1", "GPIO3"), + [EIC7700X_PAD_JTAG0_TDO] = + PINCTRL_PADNAME("JTAG0_TDO", "JTAG0_TDO", "SPI2_D2", "GPIO4"), + [EIC7700X_PAD_JTAG0_TRST] = + PINCTRL_PADNAME("JTAG0_TRST", NULL), + [EIC7700X_PAD_SPI2_CS0_N] = + PINCTRL_PADNAME("SPI2_CS0_N", "SPI2_CS0_N", NULL, "GPIO6"), + [EIC7700X_PAD_JTAG1_TCK] = + PINCTRL_PADNAME("JTAG1_TCK", "JTAG1_TCK", NULL, "GPIO7"), + [EIC7700X_PAD_JTAG1_TMS] = + PINCTRL_PADNAME("JTAG1_TMS", "JTAG1_TMS", NULL, "GPIO8"), + [EIC7700X_PAD_JTAG1_TDI] = + PINCTRL_PADNAME("JTAG1_TDI", "JTAG1_TDI", NULL, "GPIO9"), + [EIC7700X_PAD_JTAG1_TDO] = + PINCTRL_PADNAME("JTAG1_TDO", "JTAG1_TDO", NULL, "GPIO10"), + [EIC7700X_PAD_JTAG1_TRST] = + PINCTRL_PADNAME("JTAG1_TRST", NULL), + [EIC7700X_PAD_SPI2_CS1_N] = + PINCTRL_PADNAME("SPI2_CS1_N", "SPI2_CS1_N", NULL, "GPIO12"), + [EIC7700X_PAD_PCIE_CLKREQ_N] = + PINCTRL_PADNAME("PCIE_CLKREQ_N", "PCIE_CLKREQ_N"), + [EIC7700X_PAD_PCIE_WAKE_N] = + PINCTRL_PADNAME("PCIE_WAKE_N", "PCIE_WAKE_N"), + [EIC7700X_PAD_PCIE_PERST_N] = + PINCTRL_PADNAME("PCIE_PERST_N", "PCIE_PERST_N"), + [EIC7700X_PAD_HDMI_SCL] = + PINCTRL_PADNAME("HDMI_SCL", "HDMI_SCL"), + [EIC7700X_PAD_HDMI_SDA] = + PINCTRL_PADNAME("HDMI_SDA", "HDMI_SDA"), + [EIC7700X_PAD_HDMI_CEC] = + PINCTRL_PADNAME("HDMI_CEC", "HDMI_CEC"), + [EIC7700X_PAD_JTAG2_TRST] = + PINCTRL_PADNAME("JTAG2_TRST", "JTAG2_TRST", NULL, "GPIO17"), + [EIC7700X_PAD_RGMII0_CLK_125] = + PINCTRL_PADNAME("RGMII0_CLK_125", "RGMII0_CLK_125"), + [EIC7700X_PAD_RGMII0_TXEN] = + PINCTRL_PADNAME("RGMII0_TXEN", "RGMII0_TXEN"), + [EIC7700X_PAD_RGMII0_TXCLK] = + PINCTRL_PADNAME("RGMII0_TXCLK", "RGMII0_TXCLK"), + [EIC7700X_PAD_RGMII0_TXD0] = + PINCTRL_PADNAME("RGMII0_TXD0", "RGMII0_TXD0"), + [EIC7700X_PAD_RGMII0_TXD1] = + PINCTRL_PADNAME("RGMII0_TXD1", "RGMII0_TXD1"), + [EIC7700X_PAD_RGMII0_TXD2] = + PINCTRL_PADNAME("RGMII0_TXD2", "RGMII0_TXD2"), + [EIC7700X_PAD_RGMII0_TXD3] = + PINCTRL_PADNAME("RGMII0_TXD3", "RGMII0_TXD3"), + [EIC7700X_PAD_I2S0_BCLK] = + PINCTRL_PADNAME("I2S0_BCLK", "I2S0_BCLK", NULL, "GPIO18"), + [EIC7700X_PAD_I2S0_WCLK] = + PINCTRL_PADNAME("I2S0_WCLK", "I2S0_WCLK", NULL, "GPIO19"), + [EIC7700X_PAD_I2S0_SDI] = + PINCTRL_PADNAME("I2S0_SDI", "I2S0_SDI", NULL, "GPIO20"), + [EIC7700X_PAD_I2S0_SDO] = + PINCTRL_PADNAME("I2S0_SDO", "I2S0_SDO", NULL, "GPIO21"), + [EIC7700X_PAD_I2S_MCLK] = + PINCTRL_PADNAME("I2S_MCLK", "I2S_MCLK", NULL, "GPIO22"), + [EIC7700X_PAD_RGMII0_RXCLK] = + PINCTRL_PADNAME("RGMII0_RXCLK", "RGMII0_RXCLK"), + [EIC7700X_PAD_RGMII0_RXDV] = + PINCTRL_PADNAME("RGMII0_RXDV", "RGMII0_RXDV"), + [EIC7700X_PAD_RGMII0_RXD0] = + PINCTRL_PADNAME("RGMII0_RXD0", "RGMII0_RXD0"), + [EIC7700X_PAD_RGMII0_RXD1] = + PINCTRL_PADNAME("RGMII0_RXD1", "RGMII0_RXD1"), + [EIC7700X_PAD_RGMII0_RXD2] = + PINCTRL_PADNAME("RGMII0_RXD2", "RGMII0_RXD2"), + [EIC7700X_PAD_RGMII0_RXD3] = + PINCTRL_PADNAME("RGMII0_RXD3", "RGMII0_RXD3"), + [EIC7700X_PAD_I2S2_BCLK] = + PINCTRL_PADNAME("I2S2_BCLK", "I2S2_BCLK", NULL, "GPIO23"), + [EIC7700X_PAD_I2S2_WCLK] = + PINCTRL_PADNAME("I2S2_WCLK", "I2S2_WCLK", NULL, "GPIO24"), + [EIC7700X_PAD_I2S2_SDI] = + PINCTRL_PADNAME("I2S2_SDI", "I2S2_SDI", NULL, "GPIO25"), + [EIC7700X_PAD_I2S2_SDO] = + PINCTRL_PADNAME("I2S2_SDO", "I2S2_SDO", NULL, "GPIO26"), + [EIC7700X_PAD_GPIO27] = + PINCTRL_PADNAME("GPIO27", "GPIO27", "SATA_ACT_LED"), + [EIC7700X_PAD_GPIO28] = + PINCTRL_PADNAME("GPIO28", "GPIO28"), + [EIC7700X_PAD_GPIO29] = + PINCTRL_PADNAME("GPIO29", "POR_TIME_SEL0", "EMMC_LED_CONTROL", "GPIO29"), + [EIC7700X_PAD_RGMII0_MDC] = + PINCTRL_PADNAME("RGMII0_MDC", "RGMII0_MDC"), + [EIC7700X_PAD_RGMII0_MDIO] = + PINCTRL_PADNAME("RGMII0_MDIO", "RGMII0_MDIO"), + [EIC7700X_PAD_RGMII0_INTB] = + PINCTRL_PADNAME("RGMII0_INTB", "RGMII0_INTB"), + [EIC7700X_PAD_RGMII1_CLK_125] = + PINCTRL_PADNAME("RGMII1_CLK_125", "RGMII1_CLK_125"), + [EIC7700X_PAD_RGMII1_TXEN] = + PINCTRL_PADNAME("RGMII1_TXEN", "RGMII1_TXEN"), + [EIC7700X_PAD_RGMII1_TXCLK] = + PINCTRL_PADNAME("RGMII1_TXCLK", "RGMII1_TXCLK"), + [EIC7700X_PAD_RGMII1_TXD0] = + PINCTRL_PADNAME("RGMII1_TXD0", "RGMII1_TXD0"), + [EIC7700X_PAD_RGMII1_TXD1] = + PINCTRL_PADNAME("RGMII1_TXD1", "RGMII1_TXD1"), + [EIC7700X_PAD_RGMII1_TXD2] = + PINCTRL_PADNAME("RGMII1_TXD2", "RGMII1_TXD2"), + [EIC7700X_PAD_RGMII1_TXD3] = + PINCTRL_PADNAME("RGMII1_TXD3", "RGMII1_TXD3"), + [EIC7700X_PAD_I2S1_BCLK] = + PINCTRL_PADNAME("I2S1_BCLK", "I2S1_BCLK", NULL, "GPIO30"), + [EIC7700X_PAD_I2S1_WCLK] = + PINCTRL_PADNAME("I2S1_WCLK", "I2S1_WCLK", NULL, "GPIO31"), + [EIC7700X_PAD_I2S1_SDI] = + PINCTRL_PADNAME("I2S1_SDI", "I2S1_SDI", NULL, "GPIO32"), + [EIC7700X_PAD_I2S1_SDO] = + PINCTRL_PADNAME("I2S1_SDO", "I2S1_SDO", NULL, "GPIO33"), + [EIC7700X_PAD_GPIO34] = + PINCTRL_PADNAME("GPIO34", "POR_TIME_SEL1", "SD0_LED_CONTROL", "GPIO34"), + [EIC7700X_PAD_RGMII1_RXCLK] = + PINCTRL_PADNAME("RGMII1_RXCLK", "RGMII1_RXCLK"), + [EIC7700X_PAD_RGMII1_RXDV] = + PINCTRL_PADNAME("RGMII1_RXDV", "RGMII1_RXDV"), + [EIC7700X_PAD_RGMII1_RXD0] = + PINCTRL_PADNAME("RGMII1_RXD0", "RGMII1_RXD0"), + [EIC7700X_PAD_RGMII1_RXD1] = + PINCTRL_PADNAME("RGMII1_RXD1", "RGMII1_RXD1"), + [EIC7700X_PAD_RGMII1_RXD2] = + PINCTRL_PADNAME("RGMII1_RXD2", "RGMII1_RXD2"), + [EIC7700X_PAD_RGMII1_RXD3] = + PINCTRL_PADNAME("RGMII1_RXD3", "RGMII1_RXD3"), + [EIC7700X_PAD_SPI1_CS0_N] = + PINCTRL_PADNAME("SPI1_CS0_N", "SPI1_CS0_N", NULL, "GPIO35"), + [EIC7700X_PAD_SPI1_CLK] = + PINCTRL_PADNAME("SPI1_CLK", "SPI1_CLK", NULL, "GPIO36"), + [EIC7700X_PAD_SPI1_D0] = + PINCTRL_PADNAME("SPI1_D0", "SPI1_D0", "I2C9_SCL", "GPIO37", "UART4_TX"), + [EIC7700X_PAD_SPI1_D1] = + PINCTRL_PADNAME("SPI1_D1", "SPI1_D1", "I2C9_SDA", "GPIO38", "UART4_RX"), + [EIC7700X_PAD_SPI1_D2] = + PINCTRL_PADNAME("SPI1_D2", "SPI1_D2", "SD1_LED_CONTROL", "GPIO39"), + [EIC7700X_PAD_SPI1_D3] = + PINCTRL_PADNAME("SPI1_D3", "SPI1_D3", "PWM1", "GPIO40"), + [EIC7700X_PAD_SPI1_CS1_N] = + PINCTRL_PADNAME("SPI1_CS1_N", "SPI1_CS1_N", "PWM2", "GPIO41"), + [EIC7700X_PAD_RGMII1_MDC] = + PINCTRL_PADNAME("RGMII1_MDC", "RGMII1_MDC"), + [EIC7700X_PAD_RGMII1_MDIO] = + PINCTRL_PADNAME("RGMII1_MDIO", "RGMII1_MDIO"), + [EIC7700X_PAD_RGMII1_INTB] = + PINCTRL_PADNAME("RGMII1_INTB", "RGMII1_INTB"), + [EIC7700X_PAD_USB0_PWREN] = + PINCTRL_PADNAME("USB0_PWREN", "USB0_PWREN", NULL, "GPIO42"), + [EIC7700X_PAD_USB1_PWREN] = + PINCTRL_PADNAME("USB1_PWREN", "USB1_PWREN", NULL, "GPIO43"), + [EIC7700X_PAD_I2C0_SCL] = + PINCTRL_PADNAME("I2C0_SCL", "I2C0_SCL", NULL, "GPIO44"), + [EIC7700X_PAD_I2C0_SDA] = + PINCTRL_PADNAME("I2C0_SDA", "I2C0_SDA", NULL, "GPIO45"), + [EIC7700X_PAD_I2C1_SCL] = + PINCTRL_PADNAME("I2C1_SCL", "I2C1_SCL", NULL, "GPIO46"), + [EIC7700X_PAD_I2C1_SDA] = + PINCTRL_PADNAME("I2C1_SDA", "I2C1_SDA", NULL, "GPIO47"), + [EIC7700X_PAD_I2C2_SCL] = + PINCTRL_PADNAME("I2C2_SCL", "I2C2_SCL", NULL, "GPIO48"), + [EIC7700X_PAD_I2C2_SDA] = + PINCTRL_PADNAME("I2C2_SDA", "I2C2_SDA", NULL, "GPIO49"), + [EIC7700X_PAD_I2C3_SCL] = + PINCTRL_PADNAME("I2C3_SCL", "I2C3_SCL", NULL, "GPIO50"), + [EIC7700X_PAD_I2C3_SDA] = + PINCTRL_PADNAME("I2C3_SDA", "I2C3_SDA", NULL, "GPIO51"), + [EIC7700X_PAD_I2C4_SCL] = + PINCTRL_PADNAME("I2C4_SCL", "I2C4_SCL", NULL, "GPIO52"), + [EIC7700X_PAD_I2C4_SDA] = + PINCTRL_PADNAME("I2C4_SDA", "I2C4_SDA", NULL, "GPIO53"), + [EIC7700X_PAD_I2C5_SCL] = + PINCTRL_PADNAME("I2C5_SCL", "I2C5_SCL", NULL, "GPIO54"), + [EIC7700X_PAD_I2C5_SDA] = + PINCTRL_PADNAME("I2C5_SDA", "I2C5_SDA", NULL, "GPIO55"), + [EIC7700X_PAD_UART0_TX] = + PINCTRL_PADNAME("UART0_TX", "UART0_TX", NULL, "GPIO56"), + [EIC7700X_PAD_UART0_RX] = + PINCTRL_PADNAME("UART0_RX", "UART0_RX", NULL, "GPIO57"), + [EIC7700X_PAD_UART1_TX] = + PINCTRL_PADNAME("UART1_TX", "UART1_TX", NULL, "GPIO58"), + [EIC7700X_PAD_UART1_RX] = + PINCTRL_PADNAME("UART1_RX", "UART1_RX", NULL, "GPIO59"), + [EIC7700X_PAD_UART1_CTS] = + PINCTRL_PADNAME("UART1_CTS", "UART1_CTS", "I2C6_SCL", "GPIO60"), + [EIC7700X_PAD_UART1_RTS] = + PINCTRL_PADNAME("UART1_RTS", "UART1_RTS", "I2C6_SDA", "GPIO61"), + [EIC7700X_PAD_UART2_TX] = + PINCTRL_PADNAME("UART2_TX", "UART2_TX", "I2C7_SCL", "GPIO62"), + [EIC7700X_PAD_UART2_RX] = + PINCTRL_PADNAME("UART2_RX", "UART2_RX", "I2C7_SDA", "GPIO63"), + [EIC7700X_PAD_JTAG2_TCK] = + PINCTRL_PADNAME("JTAG2_TCK", "JTAG2_TCK", NULL, "GPIO64"), + [EIC7700X_PAD_JTAG2_TMS] = + PINCTRL_PADNAME("JTAG2_TMS", "JTAG2_TMS", NULL, "GPIO65"), + [EIC7700X_PAD_JTAG2_TDI] = + PINCTRL_PADNAME("JTAG2_TDI", "JTAG2_TDI", NULL, "GPIO66"), + [EIC7700X_PAD_JTAG2_TDO] = + PINCTRL_PADNAME("JTAG2_TDO", "JTAG2_TDO", NULL, "GPIO67"), + [EIC7700X_PAD_FAN_PWM] = + PINCTRL_PADNAME("FAN_PWM", "FAN_PWM", NULL, "GPIO68"), + [EIC7700X_PAD_FAN_TACH] = + PINCTRL_PADNAME("FAN_TACH", "FAN_TACH", NULL, "GPIO69"), + [EIC7700X_PAD_MIPI_CSI0_XVS] = + PINCTRL_PADNAME("MIPI_CSI0_XVS", "MIPI_CSI0_XVS", NULL, "GPIO70"), + [EIC7700X_PAD_MIPI_CSI0_XHS] = + PINCTRL_PADNAME("MIPI_CSI0_XHS", "MIPI_CSI0_XHS", NULL, "GPIO71"), + [EIC7700X_PAD_MIPI_CSI0_MCLK] = + PINCTRL_PADNAME("MIPI_CSI0_MCLK", "MIPI_CSI0_MCLK", NULL, "GPIO72"), + [EIC7700X_PAD_MIPI_CSI1_XVS] = + PINCTRL_PADNAME("MIPI_CSI1_XVS", "MIPI_CSI1_XVS", NULL, "GPIO73"), + [EIC7700X_PAD_MIPI_CSI1_XHS] = + PINCTRL_PADNAME("MIPI_CSI1_XHS", "MIPI_CSI1_XHS", NULL, "GPIO74"), + [EIC7700X_PAD_MIPI_CSI1_MCLK] = + PINCTRL_PADNAME("MIPI_CSI1_MCLK", "MIPI_CSI1_MCLK", NULL, "GPIO75"), + [EIC7700X_PAD_MIPI_CSI2_XVS] = + PINCTRL_PADNAME("MIPI_CSI2_XVS", "MIPI_CSI2_XVS", NULL, "GPIO76"), + [EIC7700X_PAD_MIPI_CSI2_XHS] = + PINCTRL_PADNAME("MIPI_CSI2_XHS", "MIPI_CSI2_XHS", NULL, "GPIO77"), + [EIC7700X_PAD_MIPI_CSI2_MCLK] = + PINCTRL_PADNAME("MIPI_CSI2_MCLK", "MIPI_CSI2_MCLK", NULL, "GPIO78"), + [EIC7700X_PAD_MIPI_CSI3_XVS] = + PINCTRL_PADNAME("MIPI_CSI3_XVS", "MIPI_CSI3_XVS", NULL, "GPIO79"), + [EIC7700X_PAD_MIPI_CSI3_XHS] = + PINCTRL_PADNAME("MIPI_CSI3_XHS", "MIPI_CSI3_XHS", NULL, "GPIO80"), + [EIC7700X_PAD_MIPI_CSI3_MCLK] = + PINCTRL_PADNAME("MIPI_CSI3_MCLK", "MIPI_CSI3_MCLK", NULL, "GPIO81"), + [EIC7700X_PAD_MIPI_CSI4_XVS] = + PINCTRL_PADNAME("MIPI_CSI4_XVS", "MIPI_CSI4_XVS", NULL, "GPIO82"), + [EIC7700X_PAD_MIPI_CSI4_XHS] = + PINCTRL_PADNAME("MIPI_CSI4_XHS", "MIPI_CSI4_XHS", NULL, "GPIO83"), + [EIC7700X_PAD_MIPI_CSI4_MCLK] = + PINCTRL_PADNAME("MIPI_CSI4_MCLK", "MIPI_CSI4_MCLK", NULL, "GPIO84"), + [EIC7700X_PAD_MIPI_CSI5_XVS] = + PINCTRL_PADNAME("MIPI_CSI5_XVS", "MIPI_CSI5_XVS", NULL, "GPIO85"), + [EIC7700X_PAD_MIPI_CSI5_XHS] = + PINCTRL_PADNAME("MIPI_CSI5_XHS", "MIPI_CSI5_XHS", NULL, "GPIO86"), + [EIC7700X_PAD_MIPI_CSI5_MCLK] = + PINCTRL_PADNAME("MIPI_CSI5_MCLK", "MIPI_CSI5_MCLK", NULL, "GPIO87"), + [EIC7700X_PAD_SPI3_CS_N] = + PINCTRL_PADNAME("SPI3_CS_N", "SPI3_CS_N", NULL, "GPIO88"), + [EIC7700X_PAD_SPI3_CLK] = + PINCTRL_PADNAME("SPI3_CLK", "SPI3_CLK", NULL, "GPIO89"), + [EIC7700X_PAD_SPI3_DI] = + PINCTRL_PADNAME("SPI3_DI", "SPI3_DI", NULL, "GPIO90"), + [EIC7700X_PAD_SPI3_DO] = + PINCTRL_PADNAME("SPI3_DO", "SPI3_DO", NULL, "GPIO91"), + [EIC7700X_PAD_GPIO92] = + PINCTRL_PADNAME("GPIO92", + "I2C8_SCL", "MIPI_CSI_XTRIG0", "GPIO92", "UART3_TX"), + [EIC7700X_PAD_GPIO93] = + PINCTRL_PADNAME("GPIO93", + "I2C8_SDA", "MIPI_CSI_XTRIG1", "GPIO93", "UART3_RX"), + [EIC7700X_PAD_S_MODE] = + PINCTRL_PADNAME("S_MODE", "S_MODE", NULL, "GPIO94"), + [EIC7700X_PAD_GPIO95] = + PINCTRL_PADNAME("GPIO95", "LPDDR_REFCLK_SEL", NULL, "GPIO95"), + [EIC7700X_PAD_SPI0_CS_N] = + PINCTRL_PADNAME("SPI0_CS_N", "SPI0_CS_N", NULL, "GPIO96"), + [EIC7700X_PAD_SPI0_CLK] = + PINCTRL_PADNAME("SPI0_CLK", "SPI0_CLK", NULL, "GPIO97"), + [EIC7700X_PAD_SPI0_D0] = + PINCTRL_PADNAME("SPI0_D0", "SPI0_D0", NULL, "GPIO98"), + [EIC7700X_PAD_SPI0_D1] = + PINCTRL_PADNAME("SPI0_D1", "SPI0_D1", NULL, "GPIO99"), + [EIC7700X_PAD_SPI0_D2] = + PINCTRL_PADNAME("SPI0_D2", "SPI0_D2", NULL, "GPIO100"), + [EIC7700X_PAD_SPI0_D3] = + PINCTRL_PADNAME("SPI0_D3", "SPI0_D3", NULL, "GPIO101"), + [EIC7700X_PAD_I2C10_SCL] = + PINCTRL_PADNAME("I2C10_SCL", "I2C10_SCL", NULL, "GPIO102"), + [EIC7700X_PAD_I2C10_SDA] = + PINCTRL_PADNAME("I2C10_SDA", "I2C10_SDA", NULL, "GPIO103"), + [EIC7700X_PAD_I2C11_SCL] = + PINCTRL_PADNAME("I2C11_SCL", "I2C11_SCL", NULL, "GPIO104"), + [EIC7700X_PAD_I2C11_SDA] = + PINCTRL_PADNAME("I2C11_SDA", "I2C11_SDA", NULL, "GPIO105"), + [EIC7700X_PAD_GPIO106] = + PINCTRL_PADNAME("GPIO106", "GPIO106"), + [EIC7700X_PAD_BOOT_SEL0] = + PINCTRL_PADNAME("BOOT_SEL0", "BOOT_SEL0", NULL, "GPIO107"), + [EIC7700X_PAD_BOOT_SEL1] = + PINCTRL_PADNAME("BOOT_SEL1", "BOOT_SEL1", NULL, "GPIO108"), + [EIC7700X_PAD_BOOT_SEL2] = + PINCTRL_PADNAME("BOOT_SEL2", "BOOT_SEL2", NULL, "GPIO109"), + [EIC7700X_PAD_BOOT_SEL3] = + PINCTRL_PADNAME("BOOT_SEL3", "BOOT_SEL3", NULL, "GPIO110"), + [EIC7700X_PAD_GPIO111] = + PINCTRL_PADNAME("GPIO111", "GPIO111"), + [EIC7700X_PAD_RESERVED4] = + PINCTRL_PADNAME("RESERVED4", NULL), + [EIC7700X_PAD_RESERVED5] = + PINCTRL_PADNAME("RESERVED5", NULL), + [EIC7700X_PAD_RESERVED6] = + PINCTRL_PADNAME("RESERVED6", NULL), + [EIC7700X_PAD_RESERVED7] = + PINCTRL_PADNAME("RESERVED7", NULL), + [EIC7700X_PAD_LPDDR_REF_CLK] = + PINCTRL_PADNAME("LPDDR_REF_CLK", "LPDDR_REF_CLK"), + [EIC7700X_PAD_ADDR_RGMII0_SEL_MODE] = + PINCTRL_PADNAME("ADDR_RGMII0_SEL_MODE", NULL), + [EIC7700X_PAD_ADDR_RGMII1_SEL_MODE] = + PINCTRL_PADNAME("ADDR_RGMII1_SEL_MODE", NULL), +}; + +#endif /* HAVE_PINCTRL_TEXT */ + /**************************************************************************** * Private Functions ****************************************************************************/ @@ -447,3 +797,40 @@ unsigned int eic7700x_pinctrl_count(FAR unsigned int *changed) return EIC7700X_PAD_NPADS; } + +/**************************************************************************** + * Name: eic7700x_pad_name + * + * Description: + * The manual's name for a pad, or NULL if the pad id is out of range or + * the name tables are not built. + * + ****************************************************************************/ + +FAR const char *eic7700x_pad_name(unsigned int pad) +{ +#ifdef HAVE_PINCTRL_TEXT + return pinctrl_padname(g_eic7700x_pad_names, EIC7700X_PAD_NPADS, pad); +#else + return NULL; +#endif +} + +/**************************************************************************** + * Name: eic7700x_pad_funcname + * + * Description: + * The name of function select func on pad, or NULL if the manual does + * not document it or the name tables are not built. + * + ****************************************************************************/ + +FAR const char *eic7700x_pad_funcname(unsigned int pad, unsigned int func) +{ +#ifdef HAVE_PINCTRL_TEXT + return pinctrl_funcname(g_eic7700x_pad_names, EIC7700X_PAD_NPADS, + pad, func); +#else + return NULL; +#endif +} diff --git a/arch/risc-v/src/eic7700x/eic7700x_pinctrl.h b/arch/risc-v/src/eic7700x/eic7700x_pinctrl.h index 9f72ddfd60c..937544db5df 100644 --- a/arch/risc-v/src/eic7700x/eic7700x_pinctrl.h +++ b/arch/risc-v/src/eic7700x/eic7700x_pinctrl.h @@ -39,6 +39,16 @@ * Pre-processor Definitions ****************************************************************************/ +/* Whether anything wants a pad's name in text. The names cost about nine + * kilobytes, so they are only compiled when something will print them. + * GPIO_PROCFS is a consumer to come: the GPIO driver's procfs entry names + * the pad behind each line. + */ + +#if defined(CONFIG_PINCTRL_PROCFS) || defined(CONFIG_GPIO_PROCFS) +# define HAVE_PINCTRL_TEXT 1 +#endif + /* How many distinct reset values the 166 pads have between them. The * manual gives a reset value per field; reassembled into words they * collapse to this many, so the table stores an index instead of a word. @@ -153,6 +163,41 @@ int eic7700x_pinctrl_initialize(void); unsigned int eic7700x_pinctrl_count(FAR unsigned int *changed); +/**************************************************************************** + * Name: eic7700x_pad_name + * + * Description: + * The manual's name for a pad. + * + * Input Parameters: + * pad - The pad id, an enum eic7700x_pad_e value + * + * Returned Value: + * The name, or NULL if the pad id is out of range or the name tables + * are not built. + * + ****************************************************************************/ + +FAR const char *eic7700x_pad_name(unsigned int pad); + +/**************************************************************************** + * Name: eic7700x_pad_funcname + * + * Description: + * The name of one of a pad's function selects. + * + * Input Parameters: + * pad - The pad id, an enum eic7700x_pad_e value + * func - The function select + * + * Returned Value: + * The name, or NULL if the manual does not document that select or the + * name tables are not built. + * + ****************************************************************************/ + +FAR const char *eic7700x_pad_funcname(unsigned int pad, unsigned int func); + /**************************************************************************** * Name: eic7700x_pad_lookup * diff --git a/arch/risc-v/src/eic7700x/eic7700x_pinctrl_ops.c b/arch/risc-v/src/eic7700x/eic7700x_pinctrl_ops.c index abcf10fe933..7a0b3f95433 100644 --- a/arch/risc-v/src/eic7700x/eic7700x_pinctrl_ops.c +++ b/arch/risc-v/src/eic7700x/eic7700x_pinctrl_ops.c @@ -29,6 +29,8 @@ #include <stdint.h> #include <inttypes.h> #include <errno.h> +#include <stdio.h> +#include <string.h> #include <nuttx/debug.h> #include <nuttx/pinctrl/pinctrl.h> @@ -52,6 +54,9 @@ static int eic7700x_pinctrl_setslewrate(FAR struct pinctrl_dev_s *dev, uint32_t pin, uint32_t slewrate); static int eic7700x_pinctrl_selectgpio(FAR struct pinctrl_dev_s *dev, uint32_t pin); +static int eic7700x_pinctrl_getpad(FAR struct pinctrl_dev_s *dev, + uint32_t pin, + FAR struct pinctrl_padinfo_s *info); /**************************************************************************** * Public Data @@ -72,6 +77,7 @@ const struct pinctrl_ops_s g_eic7700x_pinctrl_ops = .set_driver = eic7700x_pinctrl_setdriver, .set_slewrate = eic7700x_pinctrl_setslewrate, .select_gpio = eic7700x_pinctrl_selectgpio, + .get_pad = eic7700x_pinctrl_getpad, }; /**************************************************************************** @@ -357,6 +363,106 @@ static int eic7700x_pinctrl_selectgpio(FAR struct pinctrl_dev_s *dev, PINCTRL_GEN_IE); } +/**************************************************************************** + * Name: eic7700x_pinctrl_getpad + * + * Description: + * Describe one pad for the framework: the common fields the pad's + * layout has, with their validity bits, and the layout's own fields as + * key:value text. The name helpers return NULL when the name tables + * are not built, which leaves the strings empty as the contract asks. + * + * Input Parameters: + * dev - The pinctrl device + * pin - The pad id + * info - Receives the pad description + * + * Returned Value: + * OK, or -EINVAL if the id names no pad. + * + ****************************************************************************/ + +static int eic7700x_pinctrl_getpad(FAR struct pinctrl_dev_s *dev, + uint32_t pin, + FAR struct pinctrl_padinfo_s *info) +{ + FAR const struct eic7700x_pad_s *desc; + FAR const char *name; + uint32_t val; + + desc = eic7700x_pad_lookup(pin); + if (desc == NULL) + { + return -EINVAL; + } + + val = getreg32(EIC7700X_PINCTRL_PAD(pin)); + + name = eic7700x_pad_name(pin); + if (name != NULL) + { + strlcpy(info->name, name, sizeof(info->name)); + } + + switch (desc->shape) + { + case EIC7700X_PADSHAPE_GENERAL: + info->have = PINCTRL_HAVE_FUNCTION | PINCTRL_HAVE_STRENGTH | + PINCTRL_HAVE_PULL | PINCTRL_HAVE_INPUT | + PINCTRL_HAVE_SCHMITT; + info->function = (val & PINCTRL_GEN_FUNC_MASK) >> + PINCTRL_GEN_FUNC_SHIFT; + info->strength = (val & PINCTRL_GEN_DS_MASK) >> + PINCTRL_GEN_DS_SHIFT; + info->pullup = (val & PINCTRL_GEN_PU) != 0; + info->pulldown = (val & PINCTRL_GEN_PD) != 0; + info->input = (val & PINCTRL_GEN_IE) != 0; + info->schmitt = (val & PINCTRL_GEN_SMT) != 0; + + name = eic7700x_pad_funcname(pin, info->function); + if (name != NULL) + { + strlcpy(info->funcname, name, sizeof(info->funcname)); + } + break; + + case EIC7700X_PADSHAPE_RGMII: + info->have = PINCTRL_HAVE_STRENGTH | PINCTRL_HAVE_PULL | + PINCTRL_HAVE_INPUT | PINCTRL_HAVE_SCHMITT; + info->strength = (val & PINCTRL_RGMII_DS_MASK) >> + PINCTRL_RGMII_DS_SHIFT; + info->pullup = (val & PINCTRL_RGMII_PU) != 0; + info->pulldown = (val & PINCTRL_RGMII_PD) != 0; + info->input = (val & PINCTRL_RGMII_IE) != 0; + info->schmitt = (val & PINCTRL_RGMII_SMT) != 0; + + snprintf(info->extra, sizeof(info->extra), "ms:%u", + (unsigned int)((val & + (PINCTRL_RGMII_MS2 | PINCTRL_RGMII_MS1)) >> 8)); + break; + + case EIC7700X_PADSHAPE_OSC: + info->have = PINCTRL_HAVE_STRENGTH; + info->strength = (val & PINCTRL_OSC_DS_MASK) >> + PINCTRL_OSC_DS_SHIFT; + + snprintf(info->extra, sizeof(info->extra), "frs:%u rd:%u", + (unsigned int)((val & PINCTRL_OSC_FRS_MASK) >> + PINCTRL_OSC_FRS_SHIFT), + (unsigned int)((val & PINCTRL_OSC_RD_MASK) >> + PINCTRL_OSC_RD_SHIFT)); + break; + + default: + snprintf(info->extra, sizeof(info->extra), "ms1:%u ms2:%u", + (val & PINCTRL_MODESEL_MS1) != 0, + (val & PINCTRL_MODESEL_MS2) != 0); + break; + } + + return OK; +} + /**************************************************************************** * Public Functions ****************************************************************************/
