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commit a48fd7363aca68258d6015c33f204bbc71581368 Author: Jukka Laitinen <[email protected]> AuthorDate: Tue Sep 29 14:11:00 2026 +0300 arch/arm/imxrt: Fix rgpio interrupt definitions Pack the LOWLEVEL/HIGHLEVEL/RISINGEDGE/FALLINGEDGE directly into correct bits in pinset. Signed-off-by: Jukka Laitinen <[email protected]> --- arch/arm/src/imxrt/imxrt_rgpio.h | 27 +++++++++++---------------- arch/arm/src/imxrt/imxrt_rgpioirq.c | 17 ++++++++++------- 2 files changed, 21 insertions(+), 23 deletions(-) diff --git a/arch/arm/src/imxrt/imxrt_rgpio.h b/arch/arm/src/imxrt/imxrt_rgpio.h index a6577a24dbd..194b93fd231 100644 --- a/arch/arm/src/imxrt/imxrt_rgpio.h +++ b/arch/arm/src/imxrt/imxrt_rgpio.h @@ -46,9 +46,9 @@ * * 1111 1100 0000 0000 * 5432 1098 7654 3210 - * ENCODING MMVX BEEG GGGP PPPP - * GPIO INPUT 00.. BEEG GGGP PPPP - * INT INPUT 11.. BEEG GGGP PPPP + * ENCODING MMVX IIIG GGGP PPPP + * GPIO INPUT 00.. ...G GGGP PPPP + * INT INPUT 10.. IIIG GGGP PPPP * GPIO OUTPUT 01V. ...G GGGP PPPP */ @@ -68,20 +68,15 @@ # define GPIO_OUTPUT_ZERO (0u << GPIO_OUTPUT_SHIFT) # define GPIO_OUTPUT_ONE (1u << GPIO_OUTPUT_SHIFT) -/* Interrupt "both edges" flag: bit 11 (only for GPIO_INTERRUPT) */ +/* Interrupt edge/level configuration: bits 9-11 (only for GPIO_INTERRUPT) */ -#define GPIO_INTBOTHCFG_SHIFT (11) -#define GPIO_INTBOTHCFG_MASK (1u << GPIO_INTBOTHCFG_SHIFT) -# define GPIO_INTBOTH_EDGES (1u << GPIO_INTBOTHCFG_SHIFT) - -/* Interrupt edge/level configuration: bits 9-10 (only for GPIO_INTERRUPT) */ - -#define GPIO_INTCFG_SHIFT (9) -#define GPIO_INTCFG_MASK (0x3u << GPIO_INTCFG_SHIFT) -# define GPIO_INT_LOWLEVEL (0u << GPIO_INTCFG_SHIFT) -# define GPIO_INT_HIGHLEVEL (1u << GPIO_INTCFG_SHIFT) -# define GPIO_INT_RISINGEDGE (2u << GPIO_INTCFG_SHIFT) -# define GPIO_INT_FALLINGEDGE (3u << GPIO_INTCFG_SHIFT) +#define GPIO_INTCFG_SHIFT (9 + IMXRT_PINSET_GPIO_SHIFT) +#define GPIO_INTCFG_MASK ((imxrt_pinset_t)7 << GPIO_INTCFG_SHIFT) +# define GPIO_INT_LOWLEVEL ((imxrt_pinset_t)0 << GPIO_INTCFG_SHIFT) +# define GPIO_INT_HIGHLEVEL ((imxrt_pinset_t)1 << GPIO_INTCFG_SHIFT) +# define GPIO_INT_RISINGEDGE ((imxrt_pinset_t)2 << GPIO_INTCFG_SHIFT) +# define GPIO_INT_FALLINGEDGE ((imxrt_pinset_t)3 << GPIO_INTCFG_SHIFT) +# define GPIO_INTBOTH_EDGES ((imxrt_pinset_t)4 << GPIO_INTCFG_SHIFT) /* GPIO Port Number: bits 5-8 (GPIO1..GPIO6) */ diff --git a/arch/arm/src/imxrt/imxrt_rgpioirq.c b/arch/arm/src/imxrt/imxrt_rgpioirq.c index 3065f5c2eec..72b2a66ac56 100644 --- a/arch/arm/src/imxrt/imxrt_rgpioirq.c +++ b/arch/arm/src/imxrt/imxrt_rgpioirq.c @@ -207,8 +207,7 @@ int imxrt_gpioirq_enable(gpio_pinset_t pinset) uint16_t gpio = IMXRT_PINSET_GPIO(pinset); uint32_t port = (gpio & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; uint32_t pin = (gpio & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT; - uint32_t both = (gpio & GPIO_INTBOTHCFG_MASK) >> GPIO_INTBOTHCFG_SHIFT; - uint32_t icr = (gpio & GPIO_INTCFG_MASK); + imxrt_pinset_t intcfg = (pinset & GPIO_INTCFG_MASK); uint32_t regval; uintptr_t regaddr; @@ -218,26 +217,30 @@ int imxrt_gpioirq_enable(gpio_pinset_t pinset) regval = getreg32(regaddr); regval &= ~IMXRT_GPIO_ICRN_MASK; - if (both) + if (intcfg == GPIO_INTBOTH_EDGES) { regval |= IMXRT_GPIO_ICRN_BOTH; } - else if (icr == GPIO_INT_LOWLEVEL) + else if (intcfg == GPIO_INT_LOWLEVEL) { regval |= IMXRT_GPIO_ICRN_ZERO; } - else if (icr == GPIO_INT_HIGHLEVEL) + else if (intcfg == GPIO_INT_HIGHLEVEL) { regval |= IMXRT_GPIO_ICRN_ONE; } - else if (icr == GPIO_INT_RISINGEDGE) + else if (intcfg == GPIO_INT_RISINGEDGE) { regval |= IMXRT_GPIO_ICRN_RISING; } - else + else if (intcfg == GPIO_INT_FALLINGEDGE) { regval |= IMXRT_GPIO_ICRN_FALLING; } + else + { + return -EINVAL; + } putreg32(regval, regaddr); return OK;
