jsanchez-2g opened a new pull request, #20411: URL: https://github.com/apache/nuttx/pull/20411
## Summary An explicit `CONFIG_STM32_SPI2=y` request is dropped during configuration on STM32G0B1 because its chip definition does not select `STM32_HAVE_SPI2`, the dependency of `STM32_SPI2`. Add that capability selection under `STM32_STM32G0B1` so boards can enable the existing SPI2 driver. ST documents SPI2 in [DS13560, section 3.23](https://www.st.com/resource/en/datasheet/stm32g0b1re.pdf). This is a single-line capability correction with no additional patch dependencies. ## Impact SPI2 becomes selectable for STM32G0B1 devices. It remains disabled unless requested; boards enabling it must supply the normal SPI2 pin mappings and callbacks. No driver, transfer, DMA, interrupt, or public API code changes. Other chip families are unaffected. ## Testing Configuration checks ran on Linux/WSL using `make olddefconfig`, with Apache NuttX baseline `6bec3b6f5bf` and the same one-line patch. The submission is based on `b38b03072a1`; the two intervening commits only change ESP32-C2 board files. Apps snapshot: `f49869092529935bcb3092388ea7a178c0885910` from the integrated workspace. Starting from `nucleo-g0b1re:nsh`, each case reloaded the same seed, selected the indicated chip and requested or disabled SPI2. CE and G071 substitutions were configuration-only controls, not board build claims. All 12 configuration commands succeeded: | Chip | SPI2 requested | Before patch | After patch | | --- | --- | --- | --- | | STM32G0B1RE | no | disabled | disabled | | STM32G0B1RE | yes | disabled | enabled | | STM32G0B1CE | no | disabled | disabled | | STM32G0B1CE | yes | disabled | enabled | | STM32G071RB | no | disabled | disabled | | STM32G071RB | yes | disabled | disabled | Hardware evidence comes from the existing Golgi STM32G0B1CE integration firmware containing this exact capability fix. The September 25, 2026 checkpoint records successful clean-configure build and hardware verification of build 7248. Golgi uses SPI2 for its voltage-correction ADC. The archived ELF identifies GCC 13.2.1 20231009; its resolved configuration and symbols confirm SPI2 was included: ```text CONFIG_ARCH_CHIP_STM32G0B1CE=y CONFIG_STM32_HAVE_SPI2=y CONFIG_STM32_SPI2=y # CONFIG_STM32_SPI2_DMA is not set 200030d0 B g_spi2 2000039c d g_spi2dev 08032368 t g_spi2ops 08001254 T stm32_spi2select 08001266 T stm32_spi2status 08009e74 T stm32_spibus_initialize ``` The archived ELF, BIN, HEX and MAP checksums were rechecked successfully. The archive retains images, configuration, build metadata and an acceptance summary; it does not contain a full compiler or serial transcript. This is prior hardware verification of the integrated firmware containing the fix, not a new hardware run of this standalone Apache-based commit. Local contribution checks passed on signed commit `d1594853dd3`: ```text ./tools/checkpatch.sh -c -u -m -g upstream/master..HEAD All checks pass. ``` -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
