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The following commit(s) were added to refs/heads/asf-site by this push:
new 589c523c47 Publishing web: 890094796b49fd1f4fae464de0a99ed02518b7ef
docs: 437306409e8a553ad82a08e6e8cafa382ee77c15
589c523c47 is described below
commit 589c523c47ea67bee06b3ff8fa82a34450a2c1fc
Author: Alin Jerpelea <[email protected]>
AuthorDate: Fri Oct 2 00:44:09 2026 +0000
Publishing web: 890094796b49fd1f4fae464de0a99ed02518b7ef docs:
437306409e8a553ad82a08e6e8cafa382ee77c15
---
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index ae60e9f3fe..3f53944051 100644
--- a/content/docs/10.0.0/index.html
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VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such as fork()).</p>
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<p class="caption"><span class="caption-text">Table of Contents</span></p>
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index fa4ee0cfed..a76c97bcb2 100644
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index fed45641e6..7a04972e9e 100644
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index 16910a2bb7..17399e617f 100644
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index ba4aec0da3..3d130e6cde 100644
--- a/content/docs/12.5.0/index.html
+++ b/content/docs/12.5.0/index.html
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VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such
as fork()).</p>
-<p>Last Updated: 01 October 26 at 10:53</p>
+<p>Last Updated: 02 October 26 at 00:27</p>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Table of
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b/content/docs/12.5.0/searchindex.js
index f60aef35ec..17d9de0031 100644
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index c2a8d2f0c8..6bde63c1eb 100644
--- a/content/docs/12.5.1/index.html
+++ b/content/docs/12.5.1/index.html
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+<p>Last Updated: 02 October 26 at 00:28</p>
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<p class="caption" role="heading"><span class="caption-text">Table of
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b/content/docs/12.5.1/searchindex.js
index 2d7defcd72..e30a1f1032 100644
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diff --git a/content/docs/12.6.0/index.html b/content/docs/12.6.0/index.html
index 07c265e062..2fc5af8112 100644
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<p class="caption" role="heading"><span class="caption-text">Table of
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<ul class="current">
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b/content/docs/12.6.0/searchindex.js
index 9ef46acaf0..4c7dc50fcd 100644
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index b97ee19139..b97cbb726c 100644
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b/content/docs/12.7.0/searchindex.js
index ef1ccca0c1..f828dac42a 100644
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index 62bc9e6220..0aa86a927e 100644
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<p class="caption" role="heading"><span class="caption-text">Table of
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<ul class="current">
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b/content/docs/12.8.0/searchindex.js
index 94e2ffa788..2f2dab94c2 100644
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<p class="caption" role="heading"><span class="caption-text">Table of
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<ul class="current">
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b/content/docs/12.9.0/searchindex.js
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b/content/docs/13.0.0/searchindex.js
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b/content/docs/13.0.1/guides/fully_linked_elf.html
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b/content/docs/13.0.1/searchindex.js
index a39e47add4..743c3ca976 100644
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\ No newline at end of file
+Search.setIndex({"docnames": ["_tags/arch-arm", "_tags/arch-arm64",
"_tags/arch-armv8m", "_tags/arch-avr", "_tags/arch-cm33", "_tags/arch-example",
"_tags/arch-mips", "_tags/arch-renesas", "_tags/arch-risc-v",
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diff --git
a/content/docs/latest/_sources/platforms/arm/ra8m1/boards/ek-ra8m1/index.rst.txt
b/content/docs/latest/_sources/platforms/arm/ra8m1/boards/ek-ra8m1/index.rst.txt
index 1c001c3856..9ec46c21d4 100644
---
a/content/docs/latest/_sources/platforms/arm/ra8m1/boards/ek-ra8m1/index.rst.txt
+++
b/content/docs/latest/_sources/platforms/arm/ra8m1/boards/ek-ra8m1/index.rst.txt
@@ -105,6 +105,41 @@ Without ``CONFIG_ARCH_LEDS``, the LEDs are available
through the
``userled`` upper half at ``/dev/userleds`` (bit 0 = LED1, bit 1 = LED2,
bit 2 = LED3), or individually through the ``ULEDIOC_SETLED`` ioctl.
+Arduino Shield GPIO
+====================
+
+The Arduino Uno shield header's D2-D5 are wired as inputs and D6-D13 as
+outputs, through the generic GPIO expander driver (``CONFIG_DEV_GPIO``):
+
+ ==== ============= ========= ==========
+ Pin R7FA8M1AHECBD Direction Device
+ ==== ============= ========= ==========
+ D2 P906 Input /dev/gpio0
+ D3 P907 Input /dev/gpio1
+ D4 P905 Input /dev/gpio2
+ D5 P601 Input /dev/gpio3
+ D6 P602 Output /dev/gpio4
+ D7 P908 Output /dev/gpio5
+ D8 P909 Output /dev/gpio6
+ D9 P603 Output /dev/gpio7
+ D10 P413 Output /dev/gpio8
+ D11 P411 Output /dev/gpio9
+ D12 P410 Output /dev/gpio10
+ D13 P412 Output /dev/gpio11
+ ==== ============= ========= ==========
+
+D0/D1 are not registered here: they are SCI9's RXD9/TXD9 pins (see
+`Serial Console`_ below). The inputs are plain floating inputs, with no
+pull-up or pull-down.
+
+``src/ra8m1_gpio.c`` registers these pins with ``gpio_pin_register()``.
+``apps/examples/gpio`` reads or writes any of them from ``nsh``:
+
+.. code-block:: console
+
+ nsh> gpio /dev/gpio0
+ nsh> gpio -o 1 /dev/gpio4
+
Serial Console
===============
@@ -120,6 +155,32 @@ SCI9:
SCI9 is the serial console in the default configurations, at 115200 8N1.
+Timers
+======
+
+Any of the GPT channels can be registered as a timer. The board registers
+GPT0 (32-bit) as ``/dev/timer0`` and GPT9 (16-bit) as ``/dev/timer1`` when
+``CONFIG_RA_GPT0_GPT`` and ``CONFIG_RA_GPT9_GPT`` are set (see the
+``GPT`` section of the RA8M1 platform page). No pins are used. PCLKD, which
+clocks the timers, is 120 MHz in this port.
+
+The ``timer-gpio`` configuration builds on ``nsh`` with both channels
+enabled, the GPIO expander driver (see `Arduino Shield GPIO`_ above), and
+``apps/examples/timer_gpio`` built in. Unlike ``apps/examples/timer``,
+which only logs samples to the console, ``timer_gpio`` toggles a GPIO pin
+once per timer period -- so the timer's actual accuracy can be checked
+directly with an oscilloscope or logic analyzer on the pin, rather than
+trusted from console output alone:
+
+.. code-block:: console
+
+ nsh> timer_gpio -t /dev/timer0 -g /dev/gpio4
+
+The period comes from ``CONFIG_EXAMPLES_TIMER_GPIO_INTERVAL`` (200 ms in
+this configuration). Note that ``/dev/timer1`` (GPT9, 16-bit) tops out at
+about 559 ms at this port's 120 MHz PCLKD: a period that fits
+``/dev/timer0`` may return ``-ERANGE`` on ``/dev/timer1``.
+
Loading Code
============
@@ -165,3 +226,12 @@ nsh-leds
Same as ``nsh``, but without ``ostest``, and enables the ``userled``
driver on ``/dev/userleds`` (``CONFIG_ARCH_LEDS`` is not set, so NuttX
does not drive the LEDs itself; see `LEDs`_ above).
+
+timer-gpio
+----------
+
+Same as ``nsh``, but registers GPT0 and GPT9 as ``/dev/timer0`` and
+``/dev/timer1``, enables the GPIO expander driver on the Arduino shield
+header (see `Arduino Shield GPIO`_ above), and builds in
+``apps/examples/gpio`` and ``apps/examples/timer_gpio`` (see `Timers`_
+above).
diff --git a/content/docs/latest/_sources/platforms/arm/ra8m1/index.rst.txt
b/content/docs/latest/_sources/platforms/arm/ra8m1/index.rst.txt
index 11437e9b1c..4eaffc2453 100644
--- a/content/docs/latest/_sources/platforms/arm/ra8m1/index.rst.txt
+++ b/content/docs/latest/_sources/platforms/arm/ra8m1/index.rst.txt
@@ -46,7 +46,7 @@ KINT No
ELC No
DTC No
DMAC No
-GPT No
+GPT Yes Timer only: /dev/timerN (GPT0-7 32-bit, GPT8-13 16-bit)
AGT No
RTC No
WDT No
@@ -95,13 +95,35 @@ GPIO
Pins can be configured/operated using ``ra_gpio_*`` functions.
+GPT
+---
+
+The General PWM Timer (GPT) has 8 32-bit channels (GPT0-7) and 6 16-bit
+channels (GPT8-13). NuttX uses a channel as a generic timer, registered as
+``/dev/timerN`` through the upper-half timer driver (``CONFIG_TIMER``): the
+channel counts up in saw-wave PWM mode, with the clock taken from PCLKD
+divided by the smallest of 1, 2, 4, 8, 16, 32, 64, 256 or 1024 that fits the
+requested timeout, and the overflow interrupt is the timer expiry. The
+PWM, capture, dead time and ELC/hardware trigger functions are not
+supported.
+
+Each channel is enabled with ``CONFIG_RA_GPTn_GPT`` (under
+``CONFIG_RA_GPT_TIMER``) and registered by the board with
+``ra_gpt_timer_initialize()``. The timeout is set with
+``TCIOC_SETTIMEOUT`` in microseconds and can be changed while the timer is
+running. The longest timeout is about 4295 s on a 32-bit channel, and
+about 559 ms on a 16-bit channel at a PCLKD of 120 MHz.
+
ICU
---
The Interrupt Controller Unit routes peripheral events to NVIC vectors:
-any event can be routed to any of its IELSR slots. NuttX assigns SCI_B
-events to fixed slots (four per channel) and calls ``ra_attach_icu()`` at
-start-up to route the enabled channels' events into them.
+any event can be routed to any of its IELSR slots. NuttX gives each event
+that an enabled peripheral needs a slot, packed from the first slot in the
+order they are listed in ``ra8m1_irq.h``, so only the events of the
+peripherals a build enables use a slot: four for each SCI_B UART, and one
+(the counter overflow) for each GPT channel. ``ra_attach_icu()`` calls at
+start-up route those events into their slots.
Supported Boards
=================
diff --git a/content/docs/latest/guides/fully_linked_elf.html
b/content/docs/latest/guides/fully_linked_elf.html
index 802c1afc48..fddcdddaec 100644
--- a/content/docs/latest/guides/fully_linked_elf.html
+++ b/content/docs/latest/guides/fully_linked_elf.html
@@ -490,7 +490,7 @@ NuttX package: <code class="docutils literal
notranslate"><span class="pre">nutt
<div
class="admonition-here-is-an-alternative-minimal-and-possibly-outdated-version
admonition">
<p class="admonition-title">Here is an alternative minimal (and possibly
outdated) version</p>
<div class="sphinx_collapse docutils">
-<input class="sphinx_collapse__input"
id="2dfafb06-141a-44c7-a81a-07916b102113"
name="2dfafb06-141a-44c7-a81a-07916b102113" type="checkbox"><label
class="sphinx_collapse__label" for="2dfafb06-141a-44c7-a81a-07916b102113"><i
class="sphinx_collapse__icon"></i>Show content:</label><div
class="sphinx_collapse__content docutils">
+<input class="sphinx_collapse__input"
id="1d921949-678d-43b3-9321-77b5c2c136b6"
name="1d921949-678d-43b3-9321-77b5c2c136b6" type="checkbox"><label
class="sphinx_collapse__label" for="1d921949-678d-43b3-9321-77b5c2c136b6"><i
class="sphinx_collapse__icon"></i>Show content:</label><div
class="sphinx_collapse__content docutils">
<div class="highlight-text notranslate"><div
class="highlight"><pre><span></span>SECTIONS
{
.text 0x00000000 :
diff --git a/content/docs/latest/guides/partially_linked_elf.html
b/content/docs/latest/guides/partially_linked_elf.html
index f97203498e..0792f6c487 100644
--- a/content/docs/latest/guides/partially_linked_elf.html
+++ b/content/docs/latest/guides/partially_linked_elf.html
@@ -516,7 +516,7 @@ NuttX package: <code class="docutils literal
notranslate"><span class="pre">nutt
<div
class="admonition-here-is-an-alternative-minimal-and-possibly-outdated-version
admonition">
<p class="admonition-title">Here is an alternative minimal (and possibly
outdated) version</p>
<div class="sphinx_collapse docutils">
-<input class="sphinx_collapse__input"
id="f5674cd6-ac1d-4170-ba60-0d9c1064c6ba"
name="f5674cd6-ac1d-4170-ba60-0d9c1064c6ba" type="checkbox"><label
class="sphinx_collapse__label" for="f5674cd6-ac1d-4170-ba60-0d9c1064c6ba"><i
class="sphinx_collapse__icon"></i>Show content:</label><div
class="sphinx_collapse__content docutils">
+<input class="sphinx_collapse__input"
id="eab5fade-14b1-4820-a116-8025a1783d96"
name="eab5fade-14b1-4820-a116-8025a1783d96" type="checkbox"><label
class="sphinx_collapse__label" for="eab5fade-14b1-4820-a116-8025a1783d96"><i
class="sphinx_collapse__icon"></i>Show content:</label><div
class="sphinx_collapse__content docutils">
<div class="highlight-text notranslate"><div
class="highlight"><pre><span></span>SECTIONS
{
.text 0x00000000 :
diff --git a/content/docs/latest/index.html b/content/docs/latest/index.html
index e08e82a390..e56377fce9 100644
--- a/content/docs/latest/index.html
+++ b/content/docs/latest/index.html
@@ -197,7 +197,7 @@ standards. Additional standard APIs from Unix and other
common RTOS’s (such as
VxWorks) are adopted for functionality not available under these standards, or
for functionality that is not appropriate for deeply-embedded environments
(such
as fork()).</p>
-<p>Last Updated: 01 October 26 at 11:10</p>
+<p>Last Updated: 02 October 26 at 00:42</p>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Table of
Contents</span></p>
<ul class="current">
diff --git a/content/docs/latest/objects.inv b/content/docs/latest/objects.inv
index bcff4af86d..7ff941799a 100644
Binary files a/content/docs/latest/objects.inv and
b/content/docs/latest/objects.inv differ
diff --git a/content/docs/latest/platforms/arm/ra8m1/boards/ek-ra8m1/index.html
b/content/docs/latest/platforms/arm/ra8m1/boards/ek-ra8m1/index.html
index 7316e5fb90..6fca3cf51c 100644
--- a/content/docs/latest/platforms/arm/ra8m1/boards/ek-ra8m1/index.html
+++ b/content/docs/latest/platforms/arm/ra8m1/boards/ek-ra8m1/index.html
@@ -490,6 +490,93 @@ defined. In that case, the usage is defined in <code
class="docutils literal no
bit 2 = LED3), or individually through the <code class="docutils literal
notranslate"><span class="pre">ULEDIOC_SETLED</span></code> ioctl.</p>
</section>
</section>
+<section id="arduino-shield-gpio">
+<h2>Arduino Shield GPIO<a class="headerlink" href="#arduino-shield-gpio"
title="Permalink to this heading"></a></h2>
+<p>The Arduino Uno shield header’s D2-D5 are wired as inputs and D6-D13 as
+outputs, through the generic GPIO expander driver (<code class="docutils
literal notranslate"><span class="pre">CONFIG_DEV_GPIO</span></code>):</p>
+<blockquote>
+<div><table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Pin</p></th>
+<th class="head"><p>R7FA8M1AHECBD</p></th>
+<th class="head"><p>Direction</p></th>
+<th class="head"><p>Device</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>D2</p></td>
+<td><p>P906</p></td>
+<td><p>Input</p></td>
+<td><p>/dev/gpio0</p></td>
+</tr>
+<tr class="row-odd"><td><p>D3</p></td>
+<td><p>P907</p></td>
+<td><p>Input</p></td>
+<td><p>/dev/gpio1</p></td>
+</tr>
+<tr class="row-even"><td><p>D4</p></td>
+<td><p>P905</p></td>
+<td><p>Input</p></td>
+<td><p>/dev/gpio2</p></td>
+</tr>
+<tr class="row-odd"><td><p>D5</p></td>
+<td><p>P601</p></td>
+<td><p>Input</p></td>
+<td><p>/dev/gpio3</p></td>
+</tr>
+<tr class="row-even"><td><p>D6</p></td>
+<td><p>P602</p></td>
+<td><p>Output</p></td>
+<td><p>/dev/gpio4</p></td>
+</tr>
+<tr class="row-odd"><td><p>D7</p></td>
+<td><p>P908</p></td>
+<td><p>Output</p></td>
+<td><p>/dev/gpio5</p></td>
+</tr>
+<tr class="row-even"><td><p>D8</p></td>
+<td><p>P909</p></td>
+<td><p>Output</p></td>
+<td><p>/dev/gpio6</p></td>
+</tr>
+<tr class="row-odd"><td><p>D9</p></td>
+<td><p>P603</p></td>
+<td><p>Output</p></td>
+<td><p>/dev/gpio7</p></td>
+</tr>
+<tr class="row-even"><td><p>D10</p></td>
+<td><p>P413</p></td>
+<td><p>Output</p></td>
+<td><p>/dev/gpio8</p></td>
+</tr>
+<tr class="row-odd"><td><p>D11</p></td>
+<td><p>P411</p></td>
+<td><p>Output</p></td>
+<td><p>/dev/gpio9</p></td>
+</tr>
+<tr class="row-even"><td><p>D12</p></td>
+<td><p>P410</p></td>
+<td><p>Output</p></td>
+<td><p>/dev/gpio10</p></td>
+</tr>
+<tr class="row-odd"><td><p>D13</p></td>
+<td><p>P412</p></td>
+<td><p>Output</p></td>
+<td><p>/dev/gpio11</p></td>
+</tr>
+</tbody>
+</table>
+</div></blockquote>
+<p>D0/D1 are not registered here: they are SCI9’s RXD9/TXD9 pins (see
+<a class="reference internal" href="#serial-console">Serial Console</a>
below). The inputs are plain floating inputs, with no
+pull-up or pull-down.</p>
+<p><code class="docutils literal notranslate"><span
class="pre">src/ra8m1_gpio.c</span></code> registers these pins with <code
class="docutils literal notranslate"><span
class="pre">gpio_pin_register()</span></code>.
+<code class="docutils literal notranslate"><span
class="pre">apps/examples/gpio</span></code> reads or writes any of them from
<code class="docutils literal notranslate"><span
class="pre">nsh</span></code>:</p>
+<div class="highlight-console notranslate"><div
class="highlight"><pre><span></span><span class="go">nsh> gpio
/dev/gpio0</span>
+<span class="go">nsh> gpio -o 1 /dev/gpio4</span>
+</pre></div>
+</div>
+</section>
<section id="serial-console">
<h2>Serial Console<a class="headerlink" href="#serial-console"
title="Permalink to this heading"></a></h2>
<p>The EK-RA8M1’s on-board debugger (a J-Link) provides a virtual COM port on
@@ -513,6 +600,28 @@ SCI9:</p>
</div></blockquote>
<p>SCI9 is the serial console in the default configurations, at 115200 8N1.</p>
</section>
+<section id="timers">
+<h2>Timers<a class="headerlink" href="#timers" title="Permalink to this
heading"></a></h2>
+<p>Any of the GPT channels can be registered as a timer. The board registers
+GPT0 (32-bit) as <code class="docutils literal notranslate"><span
class="pre">/dev/timer0</span></code> and GPT9 (16-bit) as <code
class="docutils literal notranslate"><span
class="pre">/dev/timer1</span></code> when
+<code class="docutils literal notranslate"><span
class="pre">CONFIG_RA_GPT0_GPT</span></code> and <code class="docutils literal
notranslate"><span class="pre">CONFIG_RA_GPT9_GPT</span></code> are set (see the
+<code class="docutils literal notranslate"><span class="pre">GPT</span></code>
section of the RA8M1 platform page). No pins are used. PCLKD, which
+clocks the timers, is 120 MHz in this port.</p>
+<p>The <code class="docutils literal notranslate"><span
class="pre">timer-gpio</span></code> configuration builds on <code
class="docutils literal notranslate"><span class="pre">nsh</span></code> with
both channels
+enabled, the GPIO expander driver (see <a class="reference internal"
href="#arduino-shield-gpio">Arduino Shield GPIO</a> above), and
+<code class="docutils literal notranslate"><span
class="pre">apps/examples/timer_gpio</span></code> built in. Unlike <code
class="docutils literal notranslate"><span
class="pre">apps/examples/timer</span></code>,
+which only logs samples to the console, <code class="docutils literal
notranslate"><span class="pre">timer_gpio</span></code> toggles a GPIO pin
+once per timer period – so the timer’s actual accuracy can be checked
+directly with an oscilloscope or logic analyzer on the pin, rather than
+trusted from console output alone:</p>
+<div class="highlight-console notranslate"><div
class="highlight"><pre><span></span><span class="go">nsh> timer_gpio -t
/dev/timer0 -g /dev/gpio4</span>
+</pre></div>
+</div>
+<p>The period comes from <code class="docutils literal notranslate"><span
class="pre">CONFIG_EXAMPLES_TIMER_GPIO_INTERVAL</span></code> (200 ms in
+this configuration). Note that <code class="docutils literal
notranslate"><span class="pre">/dev/timer1</span></code> (GPT9, 16-bit) tops
out at
+about 559 ms at this port’s 120 MHz PCLKD: a period that fits
+<code class="docutils literal notranslate"><span
class="pre">/dev/timer0</span></code> may return <code class="docutils literal
notranslate"><span class="pre">-ERANGE</span></code> on <code class="docutils
literal notranslate"><span class="pre">/dev/timer1</span></code>.</p>
+</section>
<section id="loading-code">
<h2>Loading Code<a class="headerlink" href="#loading-code" title="Permalink to
this heading"></a></h2>
<p>This port produces a flat image (no TrustZone), so it is flashed with
@@ -550,6 +659,14 @@ the <code class="docutils literal notranslate"><span
class="pre">ostest</span></
driver on <code class="docutils literal notranslate"><span
class="pre">/dev/userleds</span></code> (<code class="docutils literal
notranslate"><span class="pre">CONFIG_ARCH_LEDS</span></code> is not set, so
NuttX
does not drive the LEDs itself; see <a class="reference internal"
href="#leds">LEDs</a> above).</p>
</section>
+<section id="timer-gpio">
+<h3>timer-gpio<a class="headerlink" href="#timer-gpio" title="Permalink to
this heading"></a></h3>
+<p>Same as <code class="docutils literal notranslate"><span
class="pre">nsh</span></code>, but registers GPT0 and GPT9 as <code
class="docutils literal notranslate"><span
class="pre">/dev/timer0</span></code> and
+<code class="docutils literal notranslate"><span
class="pre">/dev/timer1</span></code>, enables the GPIO expander driver on the
Arduino shield
+header (see <a class="reference internal" href="#arduino-shield-gpio">Arduino
Shield GPIO</a> above), and builds in
+<code class="docutils literal notranslate"><span
class="pre">apps/examples/gpio</span></code> and <code class="docutils literal
notranslate"><span class="pre">apps/examples/timer_gpio</span></code> (see <a
class="reference internal" href="#timers">Timers</a>
+above).</p>
+</section>
</section>
</section>
diff --git a/content/docs/latest/platforms/arm/ra8m1/index.html
b/content/docs/latest/platforms/arm/ra8m1/index.html
index 6aae3c891e..67e1eaad0c 100644
--- a/content/docs/latest/platforms/arm/ra8m1/index.html
+++ b/content/docs/latest/platforms/arm/ra8m1/index.html
@@ -187,6 +187,7 @@
<li class="toctree-l5"><a class="reference internal"
href="#clock">CLOCK</a></li>
<li class="toctree-l5"><a class="reference internal" href="#sci">SCI</a></li>
<li class="toctree-l5"><a class="reference internal" href="#gpio">GPIO</a></li>
+<li class="toctree-l5"><a class="reference internal" href="#gpt">GPT</a></li>
<li class="toctree-l5"><a class="reference internal" href="#icu">ICU</a></li>
</ul>
</li>
@@ -401,8 +402,8 @@ EK-RA8M1) has been tested; the others are selectable but
untested.</p>
<td></td>
</tr>
<tr class="row-odd"><td><p>GPT</p></td>
-<td><p>No</p></td>
-<td></td>
+<td><p>Yes</p></td>
+<td><p>Timer only: /dev/timerN (GPT0-7 32-bit, GPT8-13 16-bit)</p></td>
</tr>
<tr class="row-even"><td><p>AGT</p></td>
<td><p>No</p></td>
@@ -502,12 +503,32 @@ SCI_B5-8); each channel’s baud rate generator runs from
SCICLK.</p>
<h3>GPIO<a class="headerlink" href="#gpio" title="Permalink to this
heading"></a></h3>
<p>Pins can be configured/operated using <code class="docutils literal
notranslate"><span class="pre">ra_gpio_*</span></code> functions.</p>
</section>
+<section id="gpt">
+<h3>GPT<a class="headerlink" href="#gpt" title="Permalink to this
heading"></a></h3>
+<p>The General PWM Timer (GPT) has 8 32-bit channels (GPT0-7) and 6 16-bit
+channels (GPT8-13). NuttX uses a channel as a generic timer, registered as
+<code class="docutils literal notranslate"><span
class="pre">/dev/timerN</span></code> through the upper-half timer driver
(<code class="docutils literal notranslate"><span
class="pre">CONFIG_TIMER</span></code>): the
+channel counts up in saw-wave PWM mode, with the clock taken from PCLKD
+divided by the smallest of 1, 2, 4, 8, 16, 32, 64, 256 or 1024 that fits the
+requested timeout, and the overflow interrupt is the timer expiry. The
+PWM, capture, dead time and ELC/hardware trigger functions are not
+supported.</p>
+<p>Each channel is enabled with <code class="docutils literal
notranslate"><span class="pre">CONFIG_RA_GPTn_GPT</span></code> (under
+<code class="docutils literal notranslate"><span
class="pre">CONFIG_RA_GPT_TIMER</span></code>) and registered by the board with
+<code class="docutils literal notranslate"><span
class="pre">ra_gpt_timer_initialize()</span></code>. The timeout is set with
+<code class="docutils literal notranslate"><span
class="pre">TCIOC_SETTIMEOUT</span></code> in microseconds and can be changed
while the timer is
+running. The longest timeout is about 4295 s on a 32-bit channel, and
+about 559 ms on a 16-bit channel at a PCLKD of 120 MHz.</p>
+</section>
<section id="icu">
<h3>ICU<a class="headerlink" href="#icu" title="Permalink to this
heading"></a></h3>
<p>The Interrupt Controller Unit routes peripheral events to NVIC vectors:
-any event can be routed to any of its IELSR slots. NuttX assigns SCI_B
-events to fixed slots (four per channel) and calls <code class="docutils
literal notranslate"><span class="pre">ra_attach_icu()</span></code> at
-start-up to route the enabled channels’ events into them.</p>
+any event can be routed to any of its IELSR slots. NuttX gives each event
+that an enabled peripheral needs a slot, packed from the first slot in the
+order they are listed in <code class="docutils literal notranslate"><span
class="pre">ra8m1_irq.h</span></code>, so only the events of the
+peripherals a build enables use a slot: four for each SCI_B UART, and one
+(the counter overflow) for each GPT channel. <code class="docutils literal
notranslate"><span class="pre">ra_attach_icu()</span></code> calls at
+start-up route those events into their slots.</p>
</section>
</section>
<section id="supported-boards">
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b/content/docs/latest/searchindex.js
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